焊盘知识！

alooha

焊盘知识

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一个典型的四层板padstack如图所示:
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PADSTACK：就是一组PAD的总称。

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Copper pad：在布线层(routing layer),注意不是内层,任何孔都会带有一个尺寸大于钻孔的铜盘(copper pad).对内布线层这个铜盘大概14 mils,外布线层更大.如果这里需要导线连接,那么这个可以提供一个可供焊接的"盘". 对上下两个布线层(top and bottom routing layers)这个盘可以起到加固作用,防止"拨皮".如图中PIN->TOP,PIN->BOTTOM.

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Plating barrel:孔的周围被镀上锡膏后是不是象个圆桶.

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ANTIPAD:它就是一个在PLANE LAYER(内层)用于隔离孔与内层电器连接的围绕在孔周围的隔离环.如果孔在内层中不需要电器连接,就需要ANTIPAD来隔离. 在GERBER胶片中ANTIPAD表现为一个黑色或有色色环.其内径当然要大于孔的外径.

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现在考虑内层(plane layer),假设我们要一个40 mil的孔,我们就需要一个7mils 宽的铜环. 这样铜盘就是54mil宽（内径27mil）.如果这个铜盘在该层不要导线连接,那么它就需要一个宽15 mils的"护城河"(宽度依赖于扳子的breakdown标准而定).而这个"护城河"就是"antipad".决大多数PCB设计软件都将内层表示成"负片"形式,这样有铜的地方就表现为"空"的,相反无铜的地方表现为有"色"的. 这样,这里的"antipad"会显示为一个有色环.(如果在routing layers,那么相反) 于是,我们可以得到这个antipad其宽为54 mils,外宽84 mils.在这个隔离环的内部的铜都连接在"锡桶"(plating barrel)上.如图中，从上到下的第三层（即第二内层）上有一个ANTIPAD，说明该孔和该层无电器连接。

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Thermal relief：另一方面,如果这个铜盘在该层需要导线连接,那么这个隔离环将被修改为轮辐状,用以将隔离环的内部的铜连接到隔离环的外部,这就是所说的thermal relief. 当然,我们完全可以将隔离环完全去掉,而使隔离环内外部成为一体.但为什么不那么做呢,原因是这样容易使焊盘在焊接时形成冷焊, 因为这样大大增加了焊盘的导热性.所以为了既保证焊盘的电器连接,又防止这样的高导热性,我们将其做为"轮辐"状.对于过孔,它是一个特例. 因为过孔是不需要焊接的,所以就不存在上面高导热的情况.所以我们索性就将其隔离环内外部不通过"轮辐"而完全连接起来.因为这样的电导性更好. 当然如果你非要使用轮辐.也不无不可,但是对于那些需要加过孔来平衡PCB板散热的设计中,使用这种完全连接的过孔效果更好! 图中第一内层到孔有电器连接。

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hustyangjun

主要还是为了过锡时散热均匀

pcb007

我也来贴个图：
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; B: p1 Y6 O: G( Iwww.eda365.comSolder Mask  - A green layer of Solder Resist is coated on the external layers of a PCB to prevent the copper from oxidizing when exposed to air for a long period of time. The Solder Mask is the opening that exposes the Pad for Soldering, preventing the solder from flooding the adjoining copper.
! S. r+ z9 q( k5 {  K, l; k, tEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛 Pad - Through Hole Pad has large hole and is used for mounting and soldering Leaded Components to the board. Via pad is usually smaller as it is only used for inter-layer connection. Surface Mount Devices, the pad does not have a hole in it.  EDA365论坛网4 K) C1 m8 I. j6 F8 V9 N0 Q
Solder Paste Mask - Solder Paste are used only on Surface Mount Devices, the paste is made up of tin and silver alloy which is printed on Component Pads by pressing it over the Solder     Paste Mask. It melts into liquid form when passing through a Reflow Machine and solidifies as it cools attaching the pins of the component on to the pads.
" [0 n5 _! t8 f7 O0 aPlated Through  - The Plated Through Hole is used for inter-layer connections, linking the electrical  Hole  signals from one layer to another by plating the walls of the hole with metallic alloy. The Through Hole Pads and Vias in multiple layer designs have plated through holes. The plating also serves to improve mounting strength for Leaded Component.  EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛+ |  q5 n5 o( I
Relief Connection - To prevent the heat from leaking too fast from the pad to the plane, creating Cold Joints, Air Gaps are introduced. The resulting Relief Connections are used for connecting the copper plane to the pad or via having the same Net.   Plane Clearance - As a Plane is almost all copper, any Via or Through Hole Pad introduced that belongs to a different Net will certainly be shorted to it. To prevent this, an Anti-Pad or a cut out must be made to allow clearance for the hole to go through without touching any part of the Plane.

changxk0375

楼上的好图！！！

tianhao

一步到位！！！

superlish

顶！没啥好说的！

309007

顶l

coco

俺也顶一下,因为焊盘描述的太形象啦!

SHADOW

好贴，支持！

droden

好帖！！太形象生动了，我一直都在琢磨这个问题

killerljj

good！www.eda365.com% q4 T) Q6 z3 M
以上两位老兄能否提供下资料来源以供兄弟们参考？
, i' Q* H1 |& u# c! y5 X) wEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛谢谢！！！！www.eda365.com" Q+ h, }" p& |8 ^7 H/ K
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[ 本帖最后由 killerljj 于 2007-11-21 20:55 编辑 ]

killerljj

偶也跟一贴！EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛0 I" k* H2 [; L! e* @( ?2 O
以下内容来自《high speed digital system design》。
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* W* S8 D3 k0 eA via is a small hole drilled through a PCB that is used to make connections between variousEDA365论坛: u& [4 Y7 p. J) c6 t" G
layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
' C/ W; g# |2 Z6 E+ a5 Q! hthe antipad. The barrel is a conductive material that fills the hole to allow an electrical
/ Q8 z* L, L% F" nEDA365论坛网connection between layers, the pad is used to connect the barrel to the component or trace,www.eda365.com- g! i! V! y" m; \4 p( j! o) R
and the antipad is a clearance hole between the pad and the metal on a layer to which no
, ]1 y: P* ^0 I+ o: Q' }$ wEDA365论坛connection is required. The most common type of via is called a through-hole via because it
4 I; e% b( [7 H8 o6 h5 w5 r6 \is made by drilling a hole through the board, filling it with solder, and making connections onEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛, q7 e3 {/ [7 \" y0 t& W9 U
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip
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a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the
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layer 3. Blind and buried vias have a slightly different construction. Since through-hole viaswww.eda365.com" B) ?. i* I1 _* u  m5 b4 |
are by far the most common used in industry, they are the focus of this discussion.
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Notice that the via model is simply a pi network. The capacitors represent the via pad" s0 A6 @* ?! Q) o0 B
capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via
, X- S( [$ i% [$ y- l" m1 uEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛structures are so small, they can be modeled as lumped elements. This assumption, of
, V7 h  s1 m( D/ u$ kEDA365论坛course, will break down when the delay of the via is larger than one-tenth of the edge rate.! O; X2 x1 b5 w' l) s5 m  ^
The main effect that via capacitance has on a signal is that it will slow down the signal edgeEDA365论坛网7 H& `$ P0 U- \. W+ D6 t) n; [
rate, especially after several transitions. The amount that the signal edge rate will be slowedEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛: h% T. U. s! b
can be estimated by examining the degradation of a signal transmitted through a capacitiveEDA365论坛$ Q# ]+ d: _) {/ Q* g/ e
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutivewww.eda365.com, k$ Z+ F9 e; G/ e6 y7 ?8 Q4 X
vias are placed in close proximity to one another, it will lower the effective characteristic
2 I$ O, _% C% O+ T" l( E. i0 n7 uEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance isEDA365论坛' c/ z  e- Q" t- M. }
[Johnson and Graham, 1993]EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛3 C& j/ w0 ^* Y. U( b( C3 T

3 }# |1 r1 K8 x, sEDA365论坛网[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ]

admin

这下完美了，连计算都给出来了，主题可以改成史上最全焊盘介绍了！

surz168

{96FC0D4C-0660-4EAF-997D-86052CF147EC}.gif (30.82 KB)
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好贴，支持！

forevercgh

受教了

tianhao

我刚看见一个这样的孔,,不知道设成这样的原因,,借个地儿请教一下EDA365论坛网( A$ e& n) C0 D+ P9 U9 s
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原文地址:2 l, ]- B8 e' U, l: Y

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liuhanxin_HAMP

THANKS！

butterfl6

真是好帖啊，大家都来学习

libsuo

学习了

Allen