发本SI方面的新书——Jitter, Noise, and Signal Integrity at High-Speed

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Jitter Noise and Signal Integrity at High-Speed[Jitter Noise and Signal Integrity at High-Speed (Prentice Hall Modern Semiconductor Design Series' Sub Series: PH Signal Integrity Library)
By Mike Peng Li

Publisher: Prentice Hall PTR
Number Of Pages: 400
Publication Date: 2007-11-29 & a; R5 h5 \2 C  k; e$ M' H
ISBN-10 / ASIN: 0132429616 EDA365论坛网% M* _, w1 M# w& f* X  |  Q1 o
ISBN-13 / EAN: 9780132429610
Binding: Hardcover

Product Description:
State-of-the-art JNB and SI Problem-Solving: Theory, Analysis, Methods, and ApplicationsEDA365论坛& [2 q( o$ r6 w2 M1 \
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Jitter, noise, and bit error (JNB) and signal integrity (SI) have become today‘s greatest challenges in high-speed digital design. Now, there’s a comprehensive and up-to-date guide to overcoming these challenges, direct from Dr. Mike Peng Li, cochair of the PCI Express jitter standard committee.

One of the field’s most respected experts, Li has brought together the latest theory, analysis, methods, and practical applications, demonstrating how to solve difficult JNB and SI problems in both link components and complete systems. Li introduces the fundamental terminology, definitions, and concepts associated with JNB and SI, as well as their sources and root causes. He guides readers from basic math, statistics, circuit and system models all the way through final applications. Emphasizing clock and serial data communications applications, he covers JNB and SI simulation, modeling, diagnostics, debugging, compliance testing, and much more. EDA365论坛网" l: ~; I! {1 L7 Y! y4 U0 I3 |
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Coverage includes   x' B* w- o5 s& K8 h2 l

JNB component classification, interrelationships, measurement references, and transfer functions
Statistical techniques and signal processing theory for quantitatively understanding and modeling JNB and related components
Jitter, noise, and BER: physical/mathematical foundations and statistical signal processing views
Jitter separation methods in statistical distribution, time, and frequency domains EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛+ G2 |2 i8 X- w' h
Clock jitter in detail: phase, period, and cycle-to-cycle jitter, and key interrelationships among them 9 Z8 ^- f7 E8 `# Z4 t
PLL jitter in clock generation and clock recovery
Jitter, noise, and SI mechanisms in high-speed link systems
Quantitative modeling and analysis for jitter, noise, and SI
Testing requirements and methods for links and systems
Emerging trends in high-speed JNB and SIEDA365论坛网; _: K$ z$ t: t+ S. T6 P: u: M
As data rates continue to accelerate, engineers encounter increasingly complex JNB and SI problems. In Jitter, Noise, and Signal Integrity at High-Speed, Dr. Li provides powerful new tools for solving these problems–quickly, efficiently, and reliably. EDA365论坛网3 X4 m- y0 ^4 R& K$ U0 K2 w

Preface xv
Acknowledgements xxi
About the Author xxiiiwww.eda365.com4 n0 s: {' T5 i& Y5 |

Chapter 1: Introduction 1www.eda365.com6 t/ w; W/ O9 \; T
Chapter 2: Statistical Signal and Linear Theory for Jitter, Noise, and Signal Integrity 27* y/ _1 c" X' w; |. s
Chapter 3: Source, Mechanism, and Math Model for Jitter and Noise 75; I0 w% L5 X# `7 I# |) M; j! O; O! V
Chapter 4: Jitter, Noise, BER (JNB), and Interrelationships 109EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛, _* H; |! O7 h
Chapter 5: Jitter and Noise Separation and Analysis in Statistical Domain 131( @2 j6 K- {& l( m' G
Chapter 6: Jitter and Noise Separation and Analysis in the Time and Frequency Domains 163
Chapter 7: Clock Jitter 185
Chapter 8: PLL Jitter and Transfer Function Analysis 209
Chapter 9: Jitter and Signal Integrity Mechanisms for High-Speed Links 253
Chapter 10: Modeling and Analysis for Jitter and Signaling Integrity for High-Speed Links 281
Chapter 11: Testing and Analysis for Jitter and Signaling Integrity for High-Speed Links 309EDA365论坛网: x% K+ o, {1 p6 V
Chapter 12: Book Summary and Future Challenges 345EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛* e! L- |1 @" @7 Y+ \/ d

Index 353
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EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛' j2 A, N9 R/ \
Summary: New Base-Line Book
Rating: 5EDA365论坛网! R. q) g+ J+ S+ O  v5 U, f) i  }
Statistical methods are being combined with signal integrity methods for high-speed, high data rate, lossy www.eda365.com  l& f4 a4 Z, }( W
channel design. This book becomes a valuable resource for defining, classifying and providing the EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛1 X7 ~$ C& ~9 ^4 d+ [! Q0 R* b9 s
mathematical basis and graphical insight for jitter and noise terminology and the related techniques that
are now becoming commonplace in EDA tools, presentations, application notes, and used in several standards.
Even IBIS is adding an algorithm modeling interface feature to help access propretary information provided & H3 U6 B# x' ^. m
by semiconductor vendors for more efficient channel analysis and design optimization. EDA365论坛* R4 k6 E7 n( ^; b2 ^9 l& A/ Z6 R' g

Some inconsistent font sizing within equations and elsewhere are annoying. However, the book's primary
value is that it becomes a new base-line for general and reasonably comprehensive information on jitter
and noise methodology for today's needs and future advances.

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Summary: Jitter, Noise, and Signal IntegrityEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛: y1 L- e+ D' c4 A9 C  j
Rating: 5
In this book, Mike Li offers an experienced perspective of the role jitter and signal integrity play in modern high-speed communication. While incorporating his own contributions to the modeling and testing of jitter in systems, his book provides a broader basis of understanding to the student seeking to build a foundation on the complexities of signal integrity at high-speeds. EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛/ P. K2 Q- G1 [  I9 Q

The material of this book is a significant departure from other texts that discuss high-speed signal integrity. It focuses on the fundamentals of how different phenomena lead to different source of jitter and ISI and how we, as system designers, can untangle these problems. The text seeks to clearly distinguish different definitions of jitter and how these variously used terms are interrelated. Most importantly, the flow of the book helps demonstrate how jitter propagates through the system and helps analyze jitter in different system blocks.
EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛2 t4 D7 r  N( q/ p* E- ?' O% Y$ ^
This an important and exciting are at the heart of future high-speed electrical and optical and this is one of the first books that deciphering the challenges facing engineers in maintaining communication reliability.

Summary: Jitter, Noise, and Signal Integrity at High-SpeedEDA365论坛- r# G6 }6 D0 ]+ {2 Z
Rating: 5
This book covers the state-of-the-art knowledge in high-speed wireline communication, including jitter analysis, system architecture, clock and PLL fundamentals as well as many more critical and advanced topics. It addresses cutting edge technology in the fields of design, modeling, and verification. It is one of the best books and must have so far in this area. Dr. Li's instrumental book can provide students, engineers, or researchers solid knowledge to understand, design and test high-speed
serial interfaces.
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Summary: A good book for novice and experts on SerDes testingEDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛- b& D: k$ {4 c
Rating: 5
This book has introduced the new concepts and techniques on jitter and noise. In the first half of the book, I found all the upto date information not only on concepts and terminologies, but also the mathematical models behind them. That makes this book useful for both novice and experts. As an very active player in the SerDes testing world, I found myself interested in even some of the introduction sections because of the math and modeling in a graphical view.

In older books, you can NOT find the new jitter and noise separation/interaction described in this. In some new ones, it does NOT have this much of detail. The second half of the book is particularly helpful for people that are getting into the practical test and measurement of jitter and noise for high speed serial links. EDA365论坛网" n; t$ h0 v" x2 N. K

Near the end, the book dig into the design concept to give just enough concepts for a test engineer to understand why he is seeing what he is seeing. & D( v( W- Q: _, |/ t" a
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Over all, this is a book that can be used by a novice to get started in this fast paced new field, and it can also serve as a good reference for experts to dig out just what you need - a equation for a rough estimate, or a plot to help visualize the trend in your mind.
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Yi Cai, Ph.D.
Technical Manager EDA365论坛0 P4 z8 S8 `8 `
Read-Channel & PHY Core IP Test Engineering and Characterization EDA365论坛网* a4 H7 r5 J8 D5 x& n  R
Storage Peripherals Group, LSI
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Summary: building jitter theory to work on high speed serial link PHY layer performanceEDA365论坛网# [3 m. }' }& r
Rating: 5
This is one of the best books available today for people who need to quantitatively deal with jitter/BER etc. in high speed serial communication though one book does not fit to all.

This book is not a tutorial or a how-to book which helps us quickly obtain some basic knowledge and apply it to fix relatively simple problems we face. This book is not a collection of examples/practices in which we try to find similar problems and solutions to our own problems. EDA365论坛网+ }. M# [% S! n5 F+ [

In order to tackle more difficult/complicated problems, we would need more sophisticated knowledge/tools or we may even need to develop them ourselves upon existing knowledge base. This book serves as a text book describing such knowledge base by arranging the development in the past decade in orderly manner so that we can learn them in shorter time than reading a lot of articles one by one. EDA365论坛2 J2 C6 ^* `7 e8 G, S# R

The problem here is occasional bit error in a high speed serial link. In order to deal with the "occasional" error occurrence, statistical treatment is required. The problem occurs in a system. Most of actual systems can be approximated by linear systems, or linear approximation usually provides us with good insight. Thus the basics of statistics and linear system are reviewed at the beginning. Jitter discussion begins with categorizing jitter in various components, which are related to the bit error rate. These jitter components are to be obtained from actual measurements in practice (there are several methods), and used to estimate the possible bit error rate of a system. Then after discussing the jitter behavior in PLL and clock signal, modeling high speed serial link (Tx, channel and Rx) is discussed. EDA365论坛; u8 b5 i( X' @5 B3 `3 l
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If a reader is more interested in signal integrity than jitter/bit error rate, he/she may not be satisfied with the amount of the signal integrity discussion in this book. What matters in the end, however, is bit error rate not signal integrity. He/she has a good chance to be back to this book after learning more about signal integrity itself.EDA365论坛网站|PCB论坛|PCB layout论坛|SI仿真技术论坛. T: }! r7 L$ _6 Z# L
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[ 本帖最后由 snowwolfe 于 2008-7-30 13:56 编辑 ]

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