6 ]( n- U! i$ @0 T
file:///C:/Users/F2159499/AppData/Local/Temp/artED06.tmpLAN
7 F9 o) I0 n; I6 }0 B* ruthe length of the LAN signal traces should be kept as short as possible(<3000 mils), LAN chip/phy to be located near the connector
9 \2 g! U0 \3 a w/ n3 V. l1 ~+ P6 F+ I8 `& P/ B4 q
uall traces are routed referencing to GND throughout the length
4 U8 F3 {7 E! Iuall traces not to cross any GND or power VCC plane split (moat)
+ ~: c* w- s. ] u all LAN signal traces not to lie adjacent to any CLK traces
3 B7 P" `! P9 d: T' Y6 \& y2 ~
ucheck their unity of LAN differential pairs trace width and spacing
1 E: v1 `, Y/ B o& iudifferential pair termination located on chip side and should be populated
. Z+ o7 n4 c$ A3 }; Q0 b
5 w6 `' t& C4 e9 V5 R/ D
" _$ [2 J" b' I# R' f3 k8 B
# R2 M2 M$ u$ v1 Y N
2 }1 ^ N ?& `; s# h
3 [; {: C2 v# L S6 d8 `
2 Z! M) p4 y( c& }) R
