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本帖最后由 stupid 于 2013-4-30 23:17 编辑
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某一天,一个叫马克的人发起了帖子,采用了滚动刷屏的方法,4个帖子,一个内容:招人! g T, f2 `- U$ F8 g4 s) u# R) d
' ~- G$ ?4 @: [. b首帖Date: Mon, 7 Jan 2013 17:36:56 +0000
4 c5 U7 r& p3 B1 k D- E/ L' b% H4 f: t2贴 Date: Fri, 15 Feb 2013 00:22:29 +0000: f3 D3 P. | N9 m6 G
3贴 Date: Thu, 14 Mar 2013 04:49:58 +0000
8 I8 i' [6 s/ u- O) f6 H! e4贴Date: Thu, 25 Apr 2013 18:37:34 +0000
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My Team is looking for a Senior Staff Engineer(Backplane Architect)/Principle / h% J' ~. ^' h2 k6 N5 l) b
Engineer;
0 l F; l- [& y" wResponsibilities/Description;, b/ h/ S- ] D0 ^
Responsible for providing the backplane architecture and 10G+ High Speed SI3 }/ S8 t8 p* C/ K9 l" O8 `: \
solutions for Next Generation telecommunications equipment in the router,
/ s$ |6 x E4 a4 Zswitch and transmission product lines to meet system design requirements.* _; F$ L6 I L8 G
Experience in co-designing of ASIC, Package, PCB and System interconnects
4 S# R) a3 @: kdesired. including:
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) D# N K% S) u c- Design and analysis of multi-gigabit serial links for Backplane and
7 T* A% b1 ? v: Q6 m chip-to-chip interfaces meeting CEI, XFI, XLAUI, SFI, 10Gbase-KR, PCIe, and
7 w8 }! `" t% \, q4 I8 T7 ^ other standards.* `! |- C3 {; \ M$ u
- Familiar with ASIC, Hardware, interconnect teams to evaluate design7 u n, ]; b( ~& F! }' D
tradeoffs and optimize design performance / risk / cost /manufacturability.( q, H6 |; D/ }0 [+ H9 i
- To evaluate package designs, characterization of SerDes, and design7 S9 ?6 |: R: M/ }3 x) y
experiments to do the same.0 V% [ I/ t* d% p9 c! a0 d N$ g
- Modeling of electromagnetic 3-D structures.
# @; ~! ^& K8 n2 d, W6 {% I- Modeling and analyzing power delivery networks (PDN).
' T0 A# Y8 l- c0 [8 e E- Familiar with memory technologies such as DDR2/DDR3 is preferred.
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7 e s' g& x* O, b3 D; P, qQualifications/Requirements:+ p* a% x3 C/ [ W3 k M* l
g! J- D% D+ K1 g- Performing physical measurements to collect data for design
" Y% |* M q9 F- r! H% P6 m( d4 r validation and simulation correlations.( U8 Y$ A- y+ r: Y3 ~
- Knowledgeable in using most major SI/PI tools: HFSS, CST, HSPICE,
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other tools.
5 k( J" f3 P' S% k- Experience in correlating simulation results with lab measurements! ]( n! f7 R6 R7 J8 r4 s# I3 \( k
using oscilloscopes, TDRs, VNAs, BertScope is a plus. Must be self+ F$ d+ x" _, W+ o% p# W
motivated with strong communication and teamwork skills.
5 e$ d) u. f+ H3 g% N- The working experience in Core router or Edge router similar product
: x9 V1 E# @" u t& r' W& Q h in large telecomm infrastructure company.
- K8 a$ ?% [$ |! W! J9 l& I A MSEE, or a PhD is preferred, with 10years of experience.1 n0 U& e% c+ |, b
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Some portion of time will be spent in Shenzhen working with the HQ SI team.
$ ^* B4 |3 i# zTravel will be about 30-60% to China.# S4 M5 l# s5 w1 s, V
, w) R3 y! c* k* {- pPlease contact mark.apton@xxxxxxxxxx
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b n. o! g6 J插个广告,有符合以上条件,又愿意在深圳工作的人速速联系我 dbm@chinafastprint.com |
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