Cadence迎来了Hotfix_SPB17.00.002_wint_1of1补丁

pzt648485640

下载：http://pan.baidu.com/s/1gdhBNzl
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DATE: 05-01-2015   HOTFIX VERSION: 002
" x& s3 a! C; k# b ===================================================================================================================================
$ R$ J2 r) ]6 f4 }4 u  I' [ CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1 z( s. Q( y7 O, c6 b* Z 1315048 allegro_EDITOR INTERFACES       IPC2581 translation inconsistency on negative layer
1362745 CONSTRAINT_MGR OTHER            Allegro PCB Editor crashes on opening Constraint Manager with any design
1373412 ALLEGRO_EDITOR GRAPHICS         SigXP Print Canvas : Via model seems to be filled by black Via box.
! ^8 @' V7 n1 J. @. J6 D0 D 1376765 CONSTRAINT_MGR ANALYSIS        SETUP/Hold spreadsheet lists only one pin pair
1399646 ASI_SI         OTHER            Should be able to run mbs2brd with SI/PI base licenses
" ]/ _+ s. S! z+ G 1400215 SIG_INTEGRITY  REPORTS          cross talk failure on certain nets in PCB SI 16.6
" \/ f! J+ g, }; l+ {% E' l8 v1 y 1400302 ALLEGRO_EDITOR MANUFACT         Copper Thieving is working differently in SPB16.6 as compared to SPB16.5
1400755 ALLEGRO_EDITOR SHAPE            Updating the shapes on the ATTACHED deisgn causes a short to a pad.
1400813 ALLEGRO_EDITOR SHAPE            PCB Editor crashes when you delete islands from all the layers and save the board
& b4 Z9 o6 B1 n 1404174 SIP_LAYOUT     OTHER            Creating bounding shapes generates INCORRECT shapes and DRCs
1404184 ALLEGRO_EDITOR INTERFACES       Step package mapping - Save is disabled for certain symbol
0 p# F6 `/ C  d6 G9 i2 i 1406457 ALLEGRO_EDITOR SCRIPTS          Unable to launch allegro.exe -orcad after update hotfix 046
1407123 ALLEGRO_EDITOR OTHER            Lines with zero line width are not being printed in PDF format
- U7 S0 A; E* y3 l  z1 Y0 y 1407483 ALLEGRO_EDITOR REFRESH          The 'refresh symbol' command creates an unrouted connection in a fully routed design
1408072 SIP_LAYOUT     OTHER            Net assignment for a BGA component fails on running the File - Import - Netlist-in wizard command.
# @4 N( K7 x  K, U( M7 t 1410857 ALLEGRO_EDITOR DRC_CONSTR       Diff Pair Uncoupled length DRC gives different results in SPB16.3,  SPB16.5, and SPB16.6.
1413235 ALLEGRO_EDITOR INTERACTIV       Find by Query with Via Structures: GUI freeze
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3 b- y( U' ?6 Z* O: G0 j DATE: 04-03-2015   HOTFIX VERSION: 001
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6 ~3 P6 l8 b. a, w  C CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
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491042  concept_HDL    SECTION          Prevent PackagerXL from changing visibility on SEC attribute
$ l$ F+ z! o+ }6 D 1205900 ALLEGRO_EDITOR INTERACTIV       additional object polygon-rectangle for "snap to pick"
1327533 SIP_LAYOUT     REPORTS          Metal Usage Report fails
3 U3 W$ X8 j) P6 e 1341177 ALLEGRO_EDITOR PLACEMENT        "Place Replicate Unmatched Component Interface" window size should be increased to show "Matched Component"
% W% a0 X  x- P  ~3 v 1360269 SIP_LAYOUT     REPORTS          Getting incorrect results in the Metal Usage report of SiP Layout when the variable METAL_USAGE_REPORT_NOARCS is set
7 T, }5 v& J  @ 1361281 ALLEGRO_EDITOR INTERACTIV       Moving stacked vs non-stacked via's should be the same.
8 Z) N7 Q  K! B0 I; I 1366525 ALLEGRO_EDITOR INTERACTIV       Add replace via with via structure command to Allegro PCB
1368091 ALLEGRO_EDITOR INTERACTIV       Snap pick to fuction should see fiiled rectangle as a shape
1371510 APD           DATABASE         How to show DRC when tack point of wirebond out of finger boundary
) h. G8 w) Z7 e 1373564 ASI_PI         GUI              Impedance results are incorrect in PFE
1374703 ALLEGRO_EDITOR SHAPE            Inconsistent behavior on shape voiding
3 b6 H! j, o( ]# z$ n$ G 1376851 CONSTRAINT_MGR UI_FORMS         CM workbooks change after simulating
" m. Y0 K( @: ~+ T/ z5 T: z8 y! { 1377555 ALLEGRO_EDITOR DRC_CONSTR       The "Line to SMD Pin Same Net Spacing" DRC toggles everytime we run "Force Update" of Dynamic Shapes.
) ^( U+ D' u8 L 1378032 ALLEGRO_EDITOR REPORTS          Report command and batch mode give different Waived DRC Report results in PCB Editor
$ P. y7 H+ Y+ {7 N# ~2 Y 1378611 ALLEGRO_EDITOR INTERFACES       Enable STEP export to convert the mixed unit into one single unit
& A4 M5 ^$ y, A' M6 O0 O 1379240 APD            PLACEMENT        Placement gives error regarding the difference in units between the database and symbol, which is not the case
; h* Q' f8 a, X. L5 i 1394908 ALLEGRO_EDITOR DATABASE         Database crashes on doing "Show Element" on selected net
' X2 n+ A$ Z' f& t' N% G$ @2 m 1395541 ALLEGRO_EDITOR PLOTTING         Export PDF not correct for Phantom lines
7 s8 l7 n/ f& q1 G4 M 1395747 CONSTRAINT_MGR INTERACTIV       Rename refdes causes Allegro to crash. Possibly due to CM being open.
1396915 APD            STREAM_IF        The question about MIRROR geometry function from stream out
1398184 ALLEGRO_EDITOR MANUFACT         Mismatch in backdrill data with IPC-2581 export

allanwang

谢谢楼主分享！

qiuzhang

现在补丁小了好多了，试试

zxpchx

是不是和原来16.6的升级方式一样？

qiuzhang

打上补丁，在运行下破解就行了

zgyzgy

可以转低版本了吗？

pzt648485640

zxpchx 发表于 2015-5-7 13:20
' C. ?" s. N. ^是不是和原来16.6的升级方式一样？

是的

dzkcool

更新太勤快，希望Cadence能出一个实时联网设计的功能

金志峰

上次论坛不是发过一个? 不是说不是独立的安装文件?

wolfshiao

暫時還沒用到17.0的,
6 J. }' d4 U- h7 R  B. W: N3 T: h先下來放著先囉!!
& h# U+ c2 e+ w& U1 S3 w) c6 b感謝大大的分享了..

penny190

謝謝分享喔

我wo

謝謝分享

xiesonny

这个很赞呀，可惜了，我用17。0有问题。不知道你们有木有，我觉得破解有点问题

viiv9999

感谢，哪位成功了呀！！！！！！！！

czxjuren

安装补丁后，c:\4.png