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本帖最后由 zgyzgy 于 2015-7-22 23:17 编辑 - V% B# ~1 y4 S' E( X1 T# a
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DATE: 07-16-2015 HOTFIX VERSION: 053
: J" G; u6 w& W+ C===================================================================================================================================
1 r, x, P0 ~8 Y8 b9 XCCRID PRODUCT PRODUCTLEVEL2 TITLE
2 a. \) d1 R, V5 Q! U& D- C===================================================================================================================================- k# Z6 F% B7 ~$ Q1 S
1045706 SIP_LAYOUT INTERACTIVE Enhance the Split Via command to be able to split a stacked via into multiple vias8 P6 W2 ^. e# D' `
1356381 allegro_EDITOR INTERFACE_DESIGN PCB Editor hangs when adding net to a net group0 j" M! ?0 U2 P! ]/ ~' K
1416250 concept_HDL CORE Save hierarchy from TDO crashes DesignEntryHDL. t3 B, ?* w/ V. g
1424166 ALLEGRO_EDITOR SHAPE Dynamic shapes will not fill using the zcopy command
9 b& c' @% Q% n& g0 L1424853 ALLEGRO_EDITOR INTERFACES Error message "Failed to add (LW)POLYLINE" when importing DXF file into PCB Editor
6 p3 x; z* ?, M8 |$ R; j% h1426668 ALLEGRO_EDITOR DRC_CONSTR Require shape DRCs with route keepout
/ Q6 X7 [: @' q# R; l( P' [1427168 F2B DESIGNVARI Variant directives don't get created in CPM while creating variants
- j4 S2 M5 G& T1427481 PCB_LIBRARIAN IMPORT_TEXT To enhance the import txt file in the PDV, u& I, m, ~6 j
1428336 PCB_LIBRARIAN CORE Symbol Pin Property Attributes not editable with HF49
0 E4 E; q% z: [3 ~! d1430405 ALLEGRO_EDITOR MANUFACT Running Export - IPC-2581: The exported .xml data does not contain the Probe figures or the probe information; f% A! j# e x1 X+ l
1431570 PCB_LIBRARIAN VERIFICATION PDV con2con should read additional properties like NC_PINS from part_table view independant on PACK_TYPE0 H: a+ L. L8 B ^6 p+ a! O
1431591 ADW LRM LRM should be able to Autofix the parts with $PART_NUMBER even if the SYNC_PROPERTIES has a value of PART_NUMBER
& f" q; J* a$ ?5 {1431875 APD EDIT_ETCH When trying to multi-route a group of nets, APD crashes with the .SAV error.
; \$ C8 h; B2 L% C+ e7 m& j1 X! D1434375 ALLEGRO_EDITOR INTERFACES Running Export - IPC-2581: The last or largest pin in a series of pins listed in pinOneCfg.txt is selected
8 Z$ ?/ q2 L1 N1 H. `7 a; q1434975 ALLEGRO_EDITOR MANUFACT Running Testprep > Manual causes Allegro PCB Editor to crash
) @; U2 }2 K& f* }1435685 F2B PACKAGERXL Export Physical indicates 36 errors are found during backannotation, but the backannotate.log file contains no errors
9 l! h K+ e" _' G6 R" R1436206 SIP_LAYOUT ASSY_RULE_CHECK Ignore shapes autogenerated by the crosshatch void fill routine in the acute angle shape boundary ADRC check/ D! [6 u3 }: R6 _5 u+ o/ y1 A
1436699 CONCEPT_HDL INTERFACE_DESIGN model assignment not working if signal_model exists within a block
! M+ R1 W- s! c g" Q: ], D1436989 ALLEGRO_EDITOR OTHER PCB Editor crashes after pouring copper planes
/ w( h0 G* I# _. w& }+ B1437150 APD DIE_GENERATOR Creating a die using the Compose from Geometry command gives error, "E-(SPMHA1-70): Pin is outside of the extents"9 P7 v0 T/ q( ?, h8 T; M& X
1437287 CONCEPT_HDL CHECKPLUS CheckPlus Segmentation Fault in LINUX% M5 T1 R& Z" D- S8 V) M
1437560 ALLEGRO_EDITOR OTHER APD crashes when running gloss with dielectric generation for the given testcase.
) m6 F" G: e) S3 M" ~1437565 F2B DESIGNVARI Variant Hier BOM report puts Block DNI in wrong report section/ m4 |5 k- Y- O0 ] u) E* K
1437725 APD EDIT_ETCH Route > Slide exhibits erratic behavior on differential pairs
% L& D, G' }3 M) q2 Q& G9 q1437748 SIP_LAYOUT INTERACTIVE Allegro Editor and APD have the command opengl report defined in the menu. Please add this to the SIP menu structure
0 X! o, h) e, _% ~- _1438933 CONCEPT_HDL CONSTRAINT_MGR Model Defined Differential Objects are named differently h+ C0 c2 w7 ]1 ~0 d8 ` s8 B
1439104 ASI_SI SPDIF SPDIF popup window
& P) r4 L% a" _$ ?2 l1439574 CONCEPT_HDL CORE How do you rotate groups of objects in windows mode?; M/ t& R# S& _3 W( g' d, a* D
1440393 ALLEGRO_EDITOR INTERFACES Ability to extract STEP properties from DRA requested
) |* V# y$ k5 ^3 C, }& r1440589 ALLEGRO_EDITOR DATABASE Edit - Change crashes the database with errors.
( H- @9 f4 m: w$ t* s" r9 i1441665 CONCEPT_HDL CORE Property not annotated visible as set in ppt_optionset.dat
7 ]% S. l; Y1 q" r5 q1441672 SIP_LAYOUT ASSY_RULE_CHECK ADRC Hangs and does not close R7 h+ g+ Y/ s) B
1441724 SIP_LAYOUT PLATING_BAR Need to be able to set the Plating Bar Width.4 k4 i. x7 A, |; F/ Q# X+ G
1442144 ALLEGRO_EDITOR SCRIPTS PCB Editor crashes when replaying script
8 D' z5 |2 _% p, Y W1442798 ALLEGRO_EDITOR DATABASE PCB Editor crashes when running dbdoctor
3 S6 ]8 C5 ?2 A a& W1443693 ALLEGRO_EDITOR SCRIPTS Change Accelerator keys for new orcad shape Menu
0 X6 Q& F7 e- M/ |8 P* O2 [( C# L1443738 F2B DESIGNVARI Automatically exclude Nets or Ground Symbols from the Group while adding to Variant
/ [4 r) C! F7 u3 C: U1444066 CONCEPT_HDL CORE Replace parts in variant view crash DEHDL if cpm library list contains nonexisting libraries.1 Z! p0 w( `7 h* D' s8 f
1444076 CONCEPT_HDL CORE Replacing parts in variants backannotates ALL injected properties in variant view! H9 p- _/ z2 R
1444676 ALLEGRO_EDITOR SCRIPTS difference in PCB Editor and OrCAD PCB Editor menus in Hotfix 51
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发表于 2015-7-22 23:15
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