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本帖最后由 zgyzgy 于 2015-9-28 08:23 编辑
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9 q3 T* X, O7 N' Y; r) y8 sDATE: 09-25-2015 HOTFIX VERSION: 058" U% k2 ~+ y1 L
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878770 Pspice ENCRYPTION unix2dos should not be required on encrypted model
% f% u9 E. |! c6 P; h1450418 allegro_EDITOR PLACEMENT PCB Editor crashes while peRForming Place replicate update6 p) @7 t, S% L) \% V
1457138 concept_HDL CONSTRAINT_MGR The devices.dml file is different between the _automodel and CM launch0 C6 p# y- t0 X3 z
1462678 CONCEPT_HDL CORE Error "cannot write drawing because of errors" does not show marker window
. B5 a+ E# X" ?& B, D4 s5 n) d0 }1465933 F2B PACKAGERXL Illegal characters in LOCATION property are not being detected; error message is ineffective" K v) h$ J7 b- Y8 `: l$ N3 w0 f
1466513 F2B BOM Batch utility to check if design needs packaging
! M5 W0 ?5 ^& `/ R6 b1466610 CONCEPT_HDL ARCHIVER Archiver should include full cpm file, not just local file, y& N2 e+ D1 u( h
1467283 CONCEPT_HDL CORE Tools > Options does not warn if the .cpm file is read-only
" p! y q" X& J+ X% O1 _1467287 CONCEPT_HDL CORE DEHDL should flag illegal LOCATION property characters
, g" |8 @: s1 n. R" Z! X# Q- T1467817 ALLEGRO_EDITOR SHAPE Route keepout disappears after adding connect on pad. U3 ?: K+ P1 ^% E
1468454 ALLEGRO_EDITOR DRC_CONSTR DRCs appear when removing cline fillets
: V" P8 I; W t' l+ U1469330 CONCEPT_HDL CREFER For center justified sig_name properties, the $XR annotation is placed too far away! A( R! U: n3 z9 J) s# e9 L. a
1470339 SIP_LAYOUT SYMB_EDIT_APPMOD Tool crashes when the Reconnect by pin location option is used with the Refresh co-design die command+ j( U" f0 i8 `
1470524 F2B PACKAGERXL Improve the "SPI_ERROR: Failed to save project file "project.cpm". An unspecified error occurred." error message
w& h% k D9 Y1471183 CONSTRAINT_MGR CONCEPT_HDL Ability for the cmDiff Report 'single file' option to be available via the command line! H; e1 h( l# {0 }" k- j g
1471200 CONSTRAINT_MGR OTHER Remove the temp basecopy pstcmdb2.dat file in the physical folder after netrev completes
& B! ~; g$ g: o1471993 CONSTRAINT_MGR CONCEPT_HDL Backannotating constraints is not processing all objects
# W$ l# g0 n5 q$ C1472046 ALLEGRO_EDITOR OTHER Gloss option Eliminate unused stacked vias not removing unused microvias from the stack
9 J$ ]) I% |) g8 I* k1473056 ALLEGRO_EDITOR ARTWORK Gerber export has additional phantom data not on design
2 _3 b% S& y4 [1474005 SIP_LAYOUT EDIT_ETCH Slide command doesn't work as expected
7 g3 N% r- G' }3 m1474164 APD DATABASE Using Gloss - Dielectric causes APD to crash; L1 ]' K; F7 N: j9 b: a$ n/ f" \
1474179 ALLEGRO_EDITOR MANUFACT NC Route command: ncroutebits_auto.txt file is not generated for a rectangular slot& H: ~2 r) {7 V
1474736 SIP_LAYOUT OTHER Cannot create bounding shape# i# Y& Z& Z2 r) @
1478070 CONCEPT_HDL PDF schematic editor crashes when selecting the pagesetup for the PDF Publisher5 A) [/ V; y( A7 ?# y) [7 s& y
, S. M. Y$ L/ _正在上传文件中，分享链接稍后。。。。。。/ t1 f# `6 l/ a" J+ i' G) k( r
5 U# ~+ H# E1 _) t8 @3 p2 Q1 l" Fhttp://pan.baidu.com/s/1o6MQWae
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发表于 2015-9-27 22:50
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