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Checking for Invalid References7 }( F1 l# T4 N# o+ O. R2 M3 V. p
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (4.00, 2.10) , G% ]" x$ u/ z& n) `
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (9.70, 2.00)
* m, D1 c2 {( K! N9 q( aERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK3 AND BANK4 (9.80, 2.10)
# W, N2 G9 e* T7 _8 Y) l1 FERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK3 AND BANK4 (4.40, 2.10) " E2 t. D! Q5 S
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK5 AND BANK6 (2.60, 2.30) 8 `' s S- d" X0 L& N7 E
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 BANK5 AND BANK6 (8.00, 2.30)
1 j) u" d- @: K: Z, e+ R. z1 L: \ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 POWER AND CONFIG (2.30, 1.40) : Y- I7 @$ m0 W( @1 D2 Z$ K
ERROR [DRC0026] This reference has already been assigned to a different package type. U2: SCHEMATIC1, EP2C20 POWER AND CONFIG (4.40, 6.40) 5 D* ~$ o6 a2 ~; w `
我调用元件的时候操作方法一样,但只有BANK7 AND BANK8 没有报错,其余几个都报错了.
- S# c( K C a% X, l- r( z5 u S) o还有就是我在多页原理图中使用分层端口符号,结果报错:
( v9 H! B8 z8 cERROR [DRC0003] Port has a type which is inconsistent with other ports on the net DRAM_CKE: SCHEMATIC1, EP2C20 BANK1 AND BANK2 (2.70, 4.80)
2 u- d# M. }3 @5 g我是在一个电路图上设置端口为output,另一个图上则为input,结果就产生上面的错误,改成一致的就没问题了,但我不明白的是,从原理上说不是一个input,一个output才连接正常吗?为什么都是input或output才可以?我看网上下载的原理图也是一个input,一个output?
, W1 t8 C! g% U. L5 w不知道怎么办了, E! F* U d# P7 @
请教大家怎么修改啊.谢谢了" a9 P- U' y7 }# D% o
8 N. t8 ~( v% I6 ]$ T P7 j[ 本帖最后由 elmma 于 2008-3-2 13:36 编辑 ] |
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