[ 已解决]在哪能看到各个补丁包的修改内容呢？有谁整理过了

leilei4908

5 E; P8 a- U9 t
看到多数人发的补丁包都附有Fixed CCRs，也就是修改内容的介绍
这个具体在哪能看得到呢？
/ o( A9 s! I: x- }9 `在本地有对应的文件吗？
想知道17.2的029到060一共修改了哪些内容
一个个去找，太麻烦了，还不一定找的全

# {% i8 t& ?% u8 k2 }2 W$ s. M找到了，在
/ {! @. z+ z/ Q( i; R%cdsroot%\README_CCR.txt

lilacbear

Readme for SPB Release version 17.2
# d8 N" T$ G+ ?/ n2 s) x! V
Copyright (c) 2019 Cadence Design Systems, Inc.
All rights reserved worldwide.
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Fixed CCRs: SPB 17.2 HF060
10-11-2019
========================================================================================================================================================
+ s! T  T0 a: F0 N  J% K& V& HCCRID   Product            ProductLevel2 Title
# {$ n, J- y. X+ N! J* a: K========================================================================================================================================================
6 B: [- Q" d1 o, u& Q4 ?2137594 ADW                DBADMIN       EDM is not allowing to modify step model
2115805 ADW                DBEDITOR      'BOTH' in ALT_SYMBOLS prevents correct generation of part_table.ptf
; t) d3 y0 c  Y4 |# t! @3 }8 P( a' v2135452 ADW                DBEDITOR      DBEditor poor performance in high latency networks
. ?8 C8 t  |: \9 ^/ O/ h1 j2142315 ADW                LIBDISTRIBUTI EDM Library Server stops often and adwserver.out file is extremely large, more than 1GB
2155396 ALLEGRO_EDITOR     DATABASE      Netlist error when importing from Capture CIS
2118231 ALLEGRO_EDITOR     DRC_CONSTR    Crash during DRC: DBDoctor exits with error 'Illegal database pointer encountered'
) Y7 i" h6 j% m7 b! x; i* y& i7 Z# H2150923 ALLEGRO_EDITOR     DRC_CONSTR    Via at SMD fit DRC not detected with rounded rectangle pads
6 v8 Z' d! A* J. e2 M2140441 ALLEGRO_EDITOR     EDIT_ETCH     Drill hole to line DRC while sliding but 'Allow DRC' is not selected in the Options tab
2141329 ALLEGRO_EDITOR     INTERFACE_DES Error message (SPMHSY-49) displayed on running 'Tools' - 'Database Check'
3 k2 {. e$ y; c# t6 t  n2126562 ALLEGRO_EDITOR     MODULES       Create Module File / Place replicate assigns incorrect netname
2150410 ALLEGRO_EDITOR     SCHEM_FTB     netrev.lst is created in the wrong folder
3 d6 i6 s6 c, ?1 D2136158 ALLEGRO_EDITOR     STEP          Update STEP Mapping Data Only should be seperate Menu/Command.
2137801 APD                VIA_STRUCTURE High speed via structure instance not adding properly
! W# `2 M& F# m  W$ l2145072 CONCEPT_HDL        CORE          Error on choosing 'Enable Hierarchical Variant'
- \) e+ B6 z9 ?) I8 M) @, S1 j. `2124843 PCB_LIBRARIAN      CORE          Prompt displayed for license choice marked to be used as default
2141656 PCB_LIBRARIAN      CORE          Part Developer pop-up option 'Edit' for symbols displays an error message
2125794 PCB_LIBRARIAN      SYMBOL_EDITOR Part Developer new Symbol Editor: cannot move inverted pins that contain circle and dot
2161864 PULSE              R2PLM         Second publish with CPM-derived item number and cadName set to $NUMBER causes 'an item is not unique' error
1997911 SIP_LAYOUT         ORBITIO_IF    Support keepout translation between OrbitIO and Allegro layout/physical editors
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* w  [, d. ?0 w" m4 {- ^5 ]Fixed CCRs: SPB 17.2 HF059
09-13-2019
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
2 }3 P% a/ ?# n& I/ r0 c" T2112454 ADW                DBEDITOR      Icons in DBEditor do not start applications after renaming a model
2120548 ADW                LIBIMPORT     Missing alternate footprints from vault area after library import.
2143314 ADW                PART_BROWSER  Component Browser does not start after installing HotFix 057 of release 17.2-2016
4 b. g% x2 y' d7 @& c' {8 ?- s2122302 ALLEGRO_EDITOR     ARTWORK       Coverlay details not being output to Artwork data as per the visibility
2135521 ALLEGRO_EDITOR     ARTWORK       Artwork dimensions do not match Allegro PCB Editor
2054584 ALLEGRO_EDITOR     DATABASE      Through hole mechanical pin in zone area without Soldermask Top still shows a pad on Soldermask Top
2111444 ALLEGRO_EDITOR     DATABASE      No soldermask for mechanical holes within zone
# `8 G! _7 \- D& V2115596 ALLEGRO_EDITOR     DATABASE      Unused Pad Suppression removes pin connected to shape using Net_short property
2135436 ALLEGRO_EDITOR     EDIT_ETCH     Allegro PCB Editor crashes when routing with VOID_SAME_NET property on cline
1825020 ALLEGRO_EDITOR     INTERACTIV    GUI ( Quickplace ) not adjusted to current resolution
8 J7 M# c& I, ?6 d& j( L+ o1949705 ALLEGRO_EDITOR     INTERACTIV    Quickplace GUI not adjusted to lower resolution
+ J' h7 X% z: n5 {+ @+ G3 i5 O% U. n2023090 ALLEGRO_EDITOR     INTERACTIV    Dialog boxes do not fit vertically on the screen
- K# G7 m+ i7 E- J2 J5 V2109940 ALLEGRO_EDITOR     INTERACTIV    Quickplace pop-up window does not fit vertically on the screen
$ X6 R' E3 w: j2 F0 r" n8 A2136823 ALLEGRO_EDITOR     INTERACTIV    Cannot resize or move dialog box to access buttons
3 f4 A, \5 H- m' t6 S  r& y2116748 ALLEGRO_EDITOR     IN_DESIGN_ANA Impedance vision data not available for cline segments for some nets
" c: h% ~  p- w, i0 Y2138977 ALLEGRO_EDITOR     IN_DESIGN_ANA Impedance check results are incorrect and Crosstalk analysis stops running after updating to HotFix 057
2132628 ALLEGRO_EDITOR     NC            Improve the User Preference description for BACKDRILL_OVERSIZE_OPTION
8 {" G7 t/ q3 {" @" B. `2152244 ALLEGRO_EDITOR     SCHEM_FTB     Netrev.lst is written in the package folder
- Q4 [* G9 R, i  q$ \4 X/ y, P2152493 ALLEGRO_EDITOR     SCHEM_FTB     netrev.lst is not created in the correct folder - error displayed for neltist import
1 o# y% }% S9 A2 u+ Z0 b5 a, q1 S2104559 ALLEGRO_EDITOR     SHAPE         PCB Editor crashes while performing shape operation 'andnot'
2108207 ALLEGRO_EDITOR     SHAPE         No Void Overlap option is not working in AMB
3 m9 X7 F: U' ], r3 y2125571 ALLEGRO_EDITOR     SHAPE         Allegro PCB Editor crashes for a RAVEL rule
2140707 ALLEGRO_EDITOR     SHAPE         Allegro PCB Editor crashes on creating dynamic shape
6 }$ e$ K! f$ a2 U2 Y2078434 ALLEGRO_PROD_TOOLB CORE          Shield Router - cline end caps treated differently than cline-segment end caps
5 s3 ~3 \* }0 ]% g: Q2101020 ALLEGRO_PROD_TOOLB CORE          Productivity Toolbox Z-DRC with multiple net classes: script selects only the last two classes in a group
2029279 CAPTURE            SCHEMATICS    Slow response when selecting parts in schematic
! i) w% P; S7 a2 n2039931 CAPTURE            SCHEMATICS    Slowness in OrCAD Capture when ITC is enabled
- a& }' K5 z, x* J2106942 CAPTURE            SCHEMATICS    Inter-tool communication needs to be disabled to resolve the lag issues in Capture
2131683 RF_PCB             ROUTING       PCB Editor stops responding on using RF - Add Connect
1 F# F0 [1 v# S6 y3 u- [2126505 SCM                OTHER         Thevenin Termination dialog displays resistors incorrectly
2102383 SIP_LAYOUT         WLP           Advanced WLP Non-standard fillets not working properly: fillets not added
7 q$ E: d6 O* g& L
3 v: }3 l8 J# j  C, S: f
% F# i1 X' N" r  z+ l' `: u- HFixed CCRs: SPB 17.2 HF058
2 v( I9 w; ^1 ^2 F2 @08-16-2019
8 d) Z' s) l& j- B2 Y! _0 p6 F========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
9 ?. X7 {( A1 x# m2113265 ADW                LIBDISTRIBUTI Various DB operations take too long, rebooting server seems to fix the problem
2122941 ADW                LIBDISTRIBUTI Lib_dist execution taking too long to run, Capture CIS DBC File appears to be taking the most of the time
2127319 ADW                LIBDISTRIBUTI Library distribution fails at cisexport function with error (ORCIS-6250)
2107578 ALLEGRO_EDITOR     3D_CANVAS     Allegro 3D Canvas shows split layer
/ t& n, d$ E3 n) M2099538 ALLEGRO_EDITOR     EDIT_ETCH     'Glossing - Via Eliminate' shifts traces to another layer
& }: B7 g! T% s2031883 ALLEGRO_EDITOR     INTERACTIV    Sub-Drawing: clipboard origin point is not set correctly
2100433 ALLEGRO_EDITOR     INTERACTIV    Pad Edit displays error for extents (SPMHA1-69) if pads are at 90 or 270 degrees
2 p6 r* w* p8 ?: }, R2127239 ALLEGRO_EDITOR     INTERACTIV    Exporting a query result changes the working directory
; s; K; \" c) _0 G( q2117160 ALLEGRO_EDITOR     MCAD_COLLAB   Error encountered when importing IDX file into MCAD tool in HotFix 056
* f9 V6 R* G  I0 E2117427 ALLEGRO_EDITOR     MCAD_COLLAB   IDX files exported from HotFix 056 cannot be read in MCAD tool (the same files from HotFix 055 can be read)
7 j/ B% Y, H7 x, z# |& p2117839 ALLEGRO_EDITOR     MCAD_COLLAB   IDX file created from release 17.2-2016 with Hotfix 056 is not readable in MCAD tools
2118019 ALLEGRO_EDITOR     MCAD_COLLAB   Export IDX is not working in Hotfix 056 but working in HotFix 055
2106425 ALLEGRO_EDITOR     NC            Disable undersize regular pad and oversize soldermask pad for start layers
2126766 ALLEGRO_EDITOR     REPORTS       Cannot generate reports and export ODB on board
/ D% g: z' b8 B- _& K7 x9 N: T7 a2107849 ALLEGRO_EDITOR     SHAPE         PCB Editor stops responding on updating shapes
1778109 ALLEGRO_EDITOR     UI_GENERAL    Constraint Manager exits on doing 'Undo' in PCB Editor
3 T8 P. |, b! v/ O+ t$ G2064092 ALLEGRO_EDITOR     UI_GENERAL    Allegro Constraint Manager closes on clicking Undo in the layout editor
2093341 ALLEGRO_EDITOR     UI_GENERAL    Show Element incorrectly displays in report window on a single line if an HTML Report is open when show element runs
2110909 CONSTRAINT_MGR     UI_FORMS      Cannot type dot (.) in DFA Table of Package to Package Spacing in DFA of Constraint Manager.
7 |- H0 X/ r' n& j8 e# D7 t8 z2096846 INSTALLATION       ADW           Component Browser does not open if adwservice.exe is not added to the Windows firewall exception list
' ^% X) t% X, U9 V2128118 INSTALLATION       ADW           Unable to connect to Component Browser.
6 M, p: @+ G! _* Y5 V/ Z, s. }' Z6 m2116749 PCB_LIBRARIAN      OTHER         Cannot open Part Developer with a Venture PCB license (PA3810)
& S: b+ @  ~5 j4 c- x* j2115302 SIP_LAYOUT         IMPORT_DATA   Performance issues with die text in and pin use codes, function utcle pwrgnd
2103784 SIP_LAYOUT         MULTI_USER    Symphony Server rejects the move void commands on a specific shape instance
2096239 SIP_LAYOUT         STREAM_IF     Database fails to create stream out file
/ n4 e2 q& N& U2 a3 ?2117572 SYSTEM_CAPTURE     EXPORT_PCB    System Capture crashes with multiple Export to PCB Layout


1 u, o' I5 N  `8 m& gFixed CCRs: SPB 17.2 HF057
; u3 ?; v- B9 W) S) e/ |4 ?% ~07-19-2019
( `( b, _" B+ [$ [2 q: |# d========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
* X% ]9 U4 o" u6 ^$ C1920958 ADW                ADWSERVER     Designer server will not start due to corrupt inr file
4 Z! D! A- }4 C+ |+ c$ D5 Y2039243 ADW                LIBIMPORT     libimport ignores footprints generated by Library Creator due to changes of attribute names
2113226 ADW                PART_MANAGER  System Capture stops responding while importing DE-HDL sheets
2035942 ALLEGRO_EDITOR     ARTWORK       'Create Artwork' is slow when all films are selected
- ]% q7 X* r8 g( m5 l. ^& F2096958 ALLEGRO_EDITOR     DFA           Cannot launch Constraint Manager after assigning CSet and closing
2087181 ALLEGRO_EDITOR     DFM           DFM reporting false positive hole to hole with stacked microvias
2099400 ALLEGRO_EDITOR     DFM           Placing a mechanical pin on a cutout causes PCB Editor to crash
, _- D& ^3 A% {6 O' A2067214 ALLEGRO_EDITOR     DRC_CONSTR    Constraint Manager crashes for design linked board
; R/ }1 z$ O. F- K, m) B2097464 ALLEGRO_EDITOR     MULTI_USER    Design data lost if network connection drops in Symphony
2108211 ALLEGRO_EDITOR     MULTI_USER    Error: Update #1 (Perm shape) was rejected by server
2117154 ALLEGRO_EDITOR     MULTI_USER    Error message needed for Symphony  for client disconnections
2100149 ALLEGRO_EDITOR     REPORTS       Error message (SPMHDX-9) for too many field names while generating dangling via report
2101932 ALLEGRO_EDITOR     REPORTS       PCB Editor internal error (SPMHDX-9) for too many field names when running BOM report
2111449 ALLEGRO_EDITOR     SYMBOL        'Layout - Renumber' results in error
3 n; C$ R0 |. e1 W( ]2102177 ALLEGRO_EDITOR     UI_GENERAL    axlDMBrowsePath returns incomplete information
2105342 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor stops responding for 'Show Element - Find - Symbol Type' on a particular board
2085443 APD                ARTWORK       Gerber lacks precision required to void some vias for a design in artwork output: need warning
5 T; A2 J. \& y2080118 CONCEPT_HDL        CORE          Getting error after adding offpage to bus and assigning a new value to $sig_name
2099438 CONCEPT_HDL        CORE          Genview allows dragging group of signals in split symbol distribution form
0 Y/ t5 @8 }, F& I2108289 CONCEPT_HDL        CORE          Variant data is not in sync with the packaged data
2087217 CONCEPT_HDL        OTHER         Variant back annotation will not work if there is a double quote (") in the description field of a part
) m1 d8 _- R8 D$ P8 a( F2107430 CONCEPT_HDL        PAGE_MGMT     Insert page is not working
( ?5 w& t* V* m: B1 W+ M" F* o2063875 CONSTRAINT_MGR     OTHER         PCB Editor crashes on deleting match group without closing Constraint Manager
2103729 F2B                DESIGNVARI    Cannot enable hierarchical variants for block
2099076 F2B                PACKAGERXL    Package fails for 'Save Hierarchy', but succeeds for 'Save'
" y" N& j4 z; G! {7 b; j/ w# ?/ |2081132 INSTALLATION       SPB           Part Information Manager cannot connect to EDM server after upgrading to HotFix 053
1599964 PSPICE             ENVIRONMENT   Version Info displays 'OrCAD Version Viewer MFC Application has stopped working'
$ p, G7 |7 z8 t, G2 ]% x: l" d5 B# Q2045497 PSPICE             SIMULATOR     'Illegal Parameter Value in File' error when loading Monte Carlo parameter file
, `6 a. y( s3 O$ l' ~2025997 SCM                TABLE         Copy-Paste Broken in Physical View
+ A, ?: L# e3 g6 E  c7 ?* u2102652 SCM                TABLE         Unable to copy the Associated Components Ref Des values to Excel
2054225 SIG_INTEGRITY      SIGNOISE      Cross Section Editor bug after changing the impedance value in Analyze - Preferences
3 h+ V/ w7 ~3 U% K5 |$ Y2100075 SIP_LAYOUT         DIE_ABSTRACT_ Refresh co-design die running slow
2106312 SIP_LAYOUT         DIE_ABSTRACT_ Die abstract I/F to bring into SiP Layout and OrbitIO power/ground and signals not designated as RDL
2106314 SIP_LAYOUT         INTERACTIVE   Large design causing severe lag in Windows Server machine
2101622 SIP_LAYOUT         MULTI_USER    Symphony Server rejects the slide commands when tapered trace option is on
* k$ a$ u1 d9 W2107897 SIP_LAYOUT         WIREBOND      Design stops responding when running Wire Bond Auto Spread in HotFix 055
! D% y% S- R. a2104885 SIP_LAYOUT         WLP           Advanced WLP: Metal Density Scan, scan area in report is incorrect
3 m3 ~" q$ s" I" }! g

Fixed CCRs: SPB 17.2 HF056
06-21-2019
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
$ V/ s# A. @& n" ]$ G========================================================================================================================================================
2 Y3 Q% ]" Z+ e# S9 `2 O0 Q9 [2086463 ADW                PART_MANAGER  System Capture cannot add components when accessing remote machine via Citrix
" y4 E3 K7 ?7 \5 o9 e: b( F2092868 ADW                PART_MANAGER  Release 17.2-2016, HotFix 054: Empty cache.ptf causing injected properties to not to flow from pstchip
2092872 ADW                PART_MANAGER  Import DE-HDL Sheets stops responding
! K( [; k& E3 L8 g2088975 ALLEGRO_EDITOR     3D_CANVAS     Bending in 3D Canvas causes PCB Editor to crash
  I0 B0 o& K: y7 u7 O# j$ f7 p2088577 ALLEGRO_EDITOR     COLOR         Export color nets does not write all the nets in param file
; \% Q' v+ \7 ~9 Z9 L4 ?' p2028867 ALLEGRO_EDITOR     DFM           False DFF Trace to Thru via pad spacing DRC
  h9 a) _8 k5 g: L/ I6 \8 f2037361 ALLEGRO_EDITOR     DFM           Soldermask features drawn with a line do not DRC to pin, via, or shape soldermask features
+ y) S5 }+ Y1 A* y  @4 v8 o2077913 ALLEGRO_EDITOR     DRC_CONSTR    When running a simple SKILL command, the tool will run for a very long time
  s' V9 g: g: L2079642 ALLEGRO_EDITOR     DXF           Drill symbols are rotated in exported DXF in release 17.2-2016
2083493 ALLEGRO_EDITOR     MANUFACT      Manufacture - Cross section chart is not readable for rigid-flex designs
4 u" O9 y. g1 Q: Y- U2073607 ALLEGRO_EDITOR     MCAD_COLLAB   IDX_IN batch program to allow a batch update of an .idx file
2095632 ALLEGRO_EDITOR     MULTI_USER    Design server on Symphony stops responding and cannot be closed or downloaded
' Q/ Y9 B9 j6 c2 F/ T+ r7 H2098221 ALLEGRO_EDITOR     MULTI_USER    Symphony Server Manager allows connection to databases deleted from the project area
2087315 ALLEGRO_EDITOR     NC            Backdrill exclusions raised on pins of a component
% @6 C6 X" t& K1 B0 p' I; h3 o1947929 ALLEGRO_EDITOR     OTHER         The 'show measure' function crashes when measuring pin to pin distance
2091932 ALLEGRO_EDITOR     OTHER         Unsupported Prototypes command missing for the OrCAD licenses
2089470 ALLEGRO_EDITOR     REPORTS       Summary report shows the exclamation character (!) in the middle of numbers and words
6 L) E7 g% |0 \* g; F3 I4 I+ G2 B* n2067324 ALLEGRO_EDITOR     SHAPE         Netin crash during third-party Netlist import
2075191 ALLEGRO_EDITOR     SHAPE         Delete islands in the design: update out of date shapes and Database Check
2090604 ALLEGRO_EDITOR     UI_FORMS      Undo/Redo UI grayed out when invoking Color192
$ Z6 p) o- @9 g; w7 f2043825 ALLEGRO_EDITOR     UI_GENERAL    Custom toolbar settings are not retained upon restart of Allegro PCB Designer
2090185 ALLEGRO_EDITOR     UI_GENERAL    UI setting in INI file not retained
2090517 ALLEGRO_EDITOR     UI_GENERAL    Shape visibility box is not being enabled with the Enable layer select mode option in the Visibility Pane
' S' T) R1 y9 o# H2092436 ALLEGRO_EDITOR     UI_GENERAL    RefDes length of input string for Modify Design Padstack is limited to 20 characters
2099070 ALLEGRO_EDITOR     UI_GENERAL    UI setting not working properly, Icons missing after restart.
2088484 APD                DATABASE      Some objects (Vias and Cline) cannot be modified (edit, delete and slide) in the mcm database
* |4 f( v6 G, b/ L7 R$ H# j# \, n1951623 APD                DEGASSING     Shape Degassing fails with specific Void to Shape boundary value
2081363 APD                DEGASSING     Cannot degas for specific shape
$ L% y7 {: G9 a, w; N$ {/ K* b2083498 APD                WIREBOND      Cannot wire bond from a diepad to another diepad on the same component
$ z) m! c; e% s7 a$ T2086589 CAPTURE            NETLIST_ALLEG The generate the CM enabled files from the command line using pstswp.exe.
2098248 CAPTURE            NEW_SYM_EDITO Ignore pin is not working for individual pins in Edit pin spreadsheet when edited for all pins
1773047 CIS                PART_MANAGER  Pin numbers and names for DNI parts will get disappeared in variant view mode if they are relocated in part editor
2003818 CIS                PART_MANAGER  Pin name and number of 'do not stuff' parts are not visible in the View variant mode
2076265 CIS                PART_MANAGER  Variant view pinnr/pinname disappears
1 N7 `% x+ \) N7 f  C2076282 CIS                PART_MANAGER  View variant does not show pinnr and pinname
2083394 CIS                PART_MANAGER  No pin names and numbers on variant view for specific parts
/ s6 A. |$ b; ?: c; [2090027 CONCEPT_HDL        CORE          Cut and move of split hierarchical symbol to another page results in error due to lock or write permission issues
2071355 ORBITIO            ALLEGRO_SIP_I Dummy nets creation in die after performing Merge Updated SiP
2067703 PCB_LIBRARIAN      OTHER         PDV crashes immediately for vector pins if MSB is lower than LSB
  h0 d" P, q# e; g2041348 PCB_LIBRARIAN      SYMBOL_EDITOR Grid setting change cannot be saved in new Symbol Editor
2041365 PCB_LIBRARIAN      SYMBOL_EDITOR Improve copy drawing objects in new Symbol Editor
' a- q8 [# L1 @" y* a8 \2 `% l/ z2067931 PCB_LIBRARIAN      SYMBOL_EDITOR New symbol editor grid issue: documentation grid spacing value changes
2093849 PCB_LIBRARIAN      SYMBOL_EDITOR Symbol font text and appearance different when placed in Schematics
2 W. v7 i) K& y1919298 PSPICE             FRONTENDPLUGI Capture crashes on archiving project
1953001 PSPICE             FRONTENDPLUGI Archive project causes Capture crash.
% H. V3 t& t8 @. ~) _, c$ v/ h2035572 PSPICE             FRONTENDPLUGI Crash on archiving project
8 b4 z) x9 a' k/ D3 R$ H2041286 PSPICE             FRONTENDPLUGI Archive project crashes when using lib as global.
# Y! a- {1 B- S3 r( y3 v2081796 PSPICE             FRONTENDPLUGI 'Archive Project' crashes Capture in release 17.2-2016, HotFix 053
. `# u, X$ h2 [$ I" W- A0 |$ e9 V2106017 PSPICE             FRONTENDPLUGI Capture crashes when archiving PSpice-enabled project
2051450 PSPICE             PWL           PWL Sources application: pop-ups and messages when browsing and placing source
) M, H) ~1 ]5 N; G6 n2090021 PSPICE             PWL           Modeling Application - Sources - PWL Sources Dialog is not properly displayed
2094548 PSPICE             SIMULATOR     Model undefined error on TL494
2 ~  g2 o# }: B* ~: N. f% L5 Y2058018 SCM                PACKAGER      Reference designator mismatch in 'exportsch' schematics and board file
. J9 J/ d/ L+ B  d9 D1955868 SIP_LAYOUT         STREAM_IF     APD/SiP Layout: Export rounded features as circumscribed and not inscribed polygon in GDS
( X! {* w3 ~- r4 T: Z& O; _2081914 SIP_LAYOUT         STREAM_IF     Release 17.2-2016: GDSII stream out drops shapes
2 ]+ `' s- ~0 \& l( B  K" M2013647 SYSTEM_CAPTURE     CANVAS_EDIT   Replacing a vertically oriented RES with a horizontal CAP breaks the wire connections
/ {9 B$ N4 a  r" g

Fixed CCRs: SPB 17.2 HF055
05-24-2019
========================================================================================================================================================
0 v: c% l+ H  G% }( v( _7 X8 XCCRID   Product            ProductLevel2 Title
& Q5 l% p) H5 Q9 |, p) v1 m5 T  b( [========================================================================================================================================================
0 Y. o0 F9 e$ P7 u. E+ ^5 J' z2078057 ADW                PART_BROWSER  Symbol Graphics preview is not available in the Designer Server
/ h, T3 v4 D7 I2092863 ADW                PART_BROWSER  Component Browser is not displaying the symbol & footprint preview
2076339 ALLEGRO_EDITOR     3D_CANVAS     Floating parts on bending a board in 3D Canvas with HotFix 053
2051075 ALLEGRO_EDITOR     ARTWORK       Incorrect Gerber import in Allegro PCB Editor
( w9 z/ |4 r5 ^2073407 ALLEGRO_EDITOR     DATABASE      axlDeleteByLayer deletes fixed shapes
2079117 ALLEGRO_EDITOR     DATABASE      Release 17.2-2016: Board file saved in HotFix 049 cannot be opened in HotFix 014
2079204 ALLEGRO_EDITOR     DFM           Enabling option to update analysis mode and run DesignTrue DFM wizard causes PCB Editor to exit
2082394 ALLEGRO_EDITOR     DRAFTING      Angular dimension not owned by the same parent symbol in the layout are not deleted on moving object
, O9 _$ q0 A# ?( D2067916 ALLEGRO_EDITOR     INTERACTIV    Place replicate module bounding box does not move with circuit after module is updated
2068449 ALLEGRO_EDITOR     MANUFACT      Stackup chart and table shift slightly from original location on re-generation in Allegro PCB Editor release 17.2-2016
2065820 ALLEGRO_EDITOR     MCAD_COLLAB   Selected objects deleted from the design on clicking Cancel in IDX Flow Manager Import
2080164 ALLEGRO_EDITOR     MCAD_COLLAB   IDX outputs two sets of masks
2081955 ALLEGRO_EDITOR     NC            Artwork file error for via size
2045061 ALLEGRO_EDITOR     PLACEMENT     Setting PSMPATH: axlSetVariableFile() does not update Place Manual but User Preference Editor does
! Z& K! `, A5 Z( @, ]' v! v' \1 q2049949 ALLEGRO_EDITOR     PLACEMENT     Get import errors and cannot place some parts if user-defined option is turned on for netlist import
9 ^( G  h7 ?! L+ s* g# c. d/ N2069289 ALLEGRO_EDITOR     PLACEMENT     Cannot place part because attribute definitions are incompatible for the 'DESCRIPTION' attribute (SPMHDB-154)
: w- K% F  j5 b/ d2056573 ALLEGRO_EDITOR     SCHEM_FTB     Import Logic takes a long time when checks are turned on
; s4 I- P; c7 @! l2 s2076452 ALLEGRO_EDITOR     SHAPE         Shape Degassing crashes if 'Inside Shape' is selected
2076873 ALLEGRO_EDITOR     SHAPE         Symbol Editor stops responding on editing shape with a .dra file
1788703 ALLEGRO_EDITOR     SKILL         axlPadSuppressSet does not work when 'none' switch is used
- A8 Z5 [$ M- j% s3 X+ h6 Z1955127 ALLEGRO_EDITOR     SKILL         axlPadSuppressSet( 'off 'none ) returns a warning message and does not work per the documentation
" k6 T2 S8 P) N- R2031711 ALLEGRO_EDITOR     SKILL         Syntax error related to allegro.ini shown if allegro.ilinit loads INI on startup
) m( p$ S3 H; F; q. |2062527 ALLEGRO_EDITOR     SRM           RF elements are shown in Symbol Revision Manager
2074249 ALLEGRO_EDITOR     TESTPREP      Testprep re-sequence causes PCB Editor to crash if 'Labels with Net Name' is selected
2070534 ALLEGRO_PROD_TOOLB CORE          Productivity Toolbox bar code generator is creating corrupted shapes in the database
- o$ R& E2 |1 d" z0 N2046278 ALTM_TRANSLATOR    CAPTURE       Third-party import fails
, r8 s4 k( S& j; T: m5 [2052399 ALTM_TRANSLATOR    CAPTURE       Third-party CAD translation stopped with error message
% N+ n4 n6 I, g2005087 ALTM_TRANSLATOR    DE_HDL        Cannot translate third-party to Allegro Design Entry HDL
5 u+ q$ p0 x1 g( ^1 V1922222 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translation converts to board with unconnected nets
; L+ d/ @* T5 A. P1987263 ALTM_TRANSLATOR    PCB_EDITOR    Third-party board file: copper not imported
9 u; @& i. _- }5 m4 }3 f0 F2017988 ALTM_TRANSLATOR    PCB_EDITOR    Third-party to Allegro PCB Editor import issues with routes, constraints, size, and accuracy
2021300 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator does not show any results on PCB Editor canvas
1890675 APD                DIE_EDITOR    Mirror Geometry is Mirroring the symbol from TOP to BOTTOM Layer in SIP file
% D" r+ \% m7 ~) K: v& k2064219 APD                DIE_EDITOR    Applying mirror geometry results in mirroring: moved from TOP to BOTTOM layer
1 ^1 g. E. _; C. l6 @1 |/ w3 S2086574 APD                OTHER         Duplicate layer text shown on the vias
+ p- B1 k% C; L# Z, E. I9 C1948169 CIS                CONFIGURATION Auto Symbol Refresh Checking not working for shared folders
2025385 CONCEPT_HDL        CORE          Hierarchy Viewer expands/collapses randomly after clicking the '+' or '-' symbols
) P3 C. K, N2 B, `2 e3 O2050010 CONCEPT_HDL        CORE          Copyproject does not properly copy the variant files
2063457 CONCEPT_HDL        CORE          DE-HDL: very slow rendering on some systems
+ ~( J! x# F8 a, y2076312 CONCEPT_HDL        CORE          Getting 'Variant out of sync' warning when creating BOM for a design with no variants
2083650 CONCEPT_HDL        CORE          Lower-level signals are appended with _1, _2, and so on
8 R/ N) x( o$ ~6 H5 H2083651 CONCEPT_HDL        CORE          The physical net names still do not sync with the assigned signal name
! ^# E* {; \9 U( Y! I+ [+ L% k2056736 CONCEPT_HDL        GLOBALCHANGE  Global Property Delete does not operate on the entire design unless the top-level page 1 is open
1955357 SIG_EXPLORER       OTHER         Signal explorer invocation with OrCAD PCB Expert Suite license
2079071 SIP_LAYOUT         SYMB_EDIT_APP Response very slow after Show IC Details on a very large co-design die
2081884 SYSTEM_CAPTURE     CANVAS_EDIT   Symbols take a long time to move, and results in DRCs and broken connections
1942542 SYSTEM_CAPTURE     IMPORT_PCB    System Capture - TDO backannotation overwrites net names with stale data in lower-level blocks
  L  H2 s" c/ q* V+ j/ m, P2071303 SYSTEM_CAPTURE     MISCELLANEOUS cds.lib file is picked up from wrong location
2058979 SYSTEM_CAPTURE     OPEN_CLOSE_PR System Capture prevents a project from opening by putting a single quote at the end of a line in CPM file
% V, \' K$ q5 V. a+ z0 M, ?8 X; j2088210 SYSTEM_CAPTURE     OPEN_CLOSE_PR The 'enable pspice' entry in CPM file is occasionally corrupted
+ X5 h. v5 ^; q" W. a' {

5 f! R7 a0 v2 P; W, g& ~6 x5 aFixed CCRs: SPB 17.2 HF054
04-26-2019
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
" \9 C# _: G" F========================================================================================================================================================
2060269 ADW                DBEDITOR      Unable to create ECAD type mixed-case schematic model attributes
2030086 ADW                LRM           Cache part_table.ptf made by LRM Update cannot be read if it has null value in key property
1975317 ADW                PART_BROWSER  Space at the end of line in CDS.LIB results in zero libraries being shown in new component browser
/ T/ \* W; Z5 _& ]+ M, L2076340 ADW                PART_BROWSER  .helix folder needs to be deleted for PTF changes to take effect and to convert a design to cache
- Y2 n5 v$ N8 n- ?2025147 ADW                TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
2025201 ADW                TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
2056694 ADW                TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
2 U; S2 w# u# B! Y2054243 ALLEGRO_EDITOR     3D_CANVAS     Plating is not shown on stacked vias in 3D canvas
2054327 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
7 F9 R) T8 V: o# N( f2044980 ALLEGRO_EDITOR     ARTWORK       'Import - Artwork': PCB Editor stops responding and no artworks are loaded
2060489 ALLEGRO_EDITOR     COLOR         SKILL axlGlobalVisibility() issue in a partition file: VIA/SOLDERMASK_TOP subclass visibility not turned off
+ c& u0 \% ^8 Q" q/ P4 |2072695 ALLEGRO_EDITOR     COLOR         Clines of colored nets not colored when 'display_nohighlight_priority' is set
. i8 q- y+ k, J+ Y2061203 ALLEGRO_EDITOR     CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
2010812 ALLEGRO_EDITOR     DATABASE      PCB Editor STEP model offsets should follow origin movements
2011993 ALLEGRO_EDITOR     DATABASE      Change STEP model mapping when Symbol Origin is changed in DRA using Setup > Change Drawing Origin
; c4 b# q! C$ h* N0 I2051596 ALLEGRO_EDITOR     DATABASE      Error for unsupported property in element
/ {" h% N; r4 x4 ]7 b2056497 ALLEGRO_EDITOR     DATABASE      Place manual is slow
5 q3 ~/ O6 i; q! Y- E: b8 F2059489 ALLEGRO_EDITOR     DATABASE      DBDOCTOR in batch mode with argument '-check_only' detects text error
2064268 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when running SKILL code
8 l% T, o' p+ m, T2068588 ALLEGRO_EDITOR     DATABASE      Crash on opening release 16.6 design in 17.2-2016
7 }4 M$ S; v' z' k4 Z# V0 r. X9 [! z2079131 ALLEGRO_EDITOR     DATABASE      axlChangeNet crashes PCB Editor in fast shape mode with Microsoft Visual C++ Runtime Library Error
2034759 ALLEGRO_EDITOR     DFM           Importing DFT constraints on board does not assign csets to design but shows the csets
% ^4 B8 s5 U) g- D' s2039992 ALLEGRO_EDITOR     DFM           Cset is not set in Pastemask element of DFA when importing XML Constraint File.
2046824 ALLEGRO_EDITOR     EXTRACT       Extracta ECL_NETWORK View reports incorrect pin layer.
, m+ x- X, q8 U8 ^& t2048912 ALLEGRO_EDITOR     IPC           Running PCB Design Compare - Graphic mode reports ERROR (SPMHA1-273) 'Shape intersects with itself'
. [% j) Q1 V- _- U2 b# M$ n! l# P% }2066597 ALLEGRO_EDITOR     IPC           Graphical compare not completed because of self-intersecting shape locations
& Z8 d' F6 j; y7 D" o2079719 ALLEGRO_EDITOR     IPC           IPC2581 import fails with error 'Failed to add (LW)POLYLINE'
/ O7 ^' ]; m+ t, L9 Z9 {: G: _4 }2066229 ALLEGRO_EDITOR     NC            Tool code missing in backdrill NC file on choosing 'Optimize Drill Head Travel' in NC Drill
) A5 }0 v  k3 w2070379 ALLEGRO_EDITOR     NC            After running backdrill some vias are shorted to other nets
2041881 ALLEGRO_EDITOR     PAD_EDITOR    Difference in locations of drill in pad editor and symbol editor
% f* a- W4 j9 b9 T2058852 ALLEGRO_EDITOR     PAD_EDITOR    Net associations lost on refreshing vias
2061580 ALLEGRO_EDITOR     PAD_EDITOR    Lock Layer Span settings specified in padstack editor not reflected in PCB Editor
2048116 ALLEGRO_EDITOR     REPORTS       Extracta command files not visible in Tools-->Reports when there is a space present in the textpath variable
2038949 ALLEGRO_EDITOR     SCHEM_FTB     Netrev is slow if there is an input board file with many modified components
2052758 ALLEGRO_EDITOR     SCHEM_FTB     Connectivity objects are being reported as Added and Deleted in Constraint Differences Report
( z: V( [6 T! A* g2066099 ALLEGRO_EDITOR     SCHEM_FTB     Inconsistent net names on export physical after changing net names in DE-HDL
2043882 ALLEGRO_EDITOR     SHAPE         Shapes not updated to 'Minimum aperture for gap width' in Global Dynamic Shape Parameters window
% Q$ w: j3 U$ {3 a; V7 y2048483 ALLEGRO_EDITOR     SHAPE         Shapes not getting updated post backdrill update
) R0 v' [; L+ x6 y3 s  g! T! \0 N2052063 ALLEGRO_EDITOR     SHAPE         Cannot import IPC2581 due to 'Shape intersects with itself'
2056478 ALLEGRO_EDITOR     SHAPE         Editing shape by sliding segment causes PCB Editor to fail due to 0-length segment in shape
8 V  f; Y* P$ a) \2058017 ALLEGRO_EDITOR     SHAPE         Shape not voiding correctly when fillets are present
1 S, z' }) ]% w) d2066473 ALLEGRO_EDITOR     SHAPE         Teardrops create strange copper shapes
# v0 r. P+ A7 Z) J* r0 g, I2079698 ALLEGRO_EDITOR     SHAPE         IPC2581 import fails with error 'Shapes intersects with itself'
6 [1 r' G9 x3 f7 X2 ?! J" v2010569 ALLEGRO_EDITOR     SKILL         Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in HotFix 048.
2055055 ALLEGRO_EDITOR     SKILL         Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
( c! L5 j7 V: y  F, `4 W2023755 ALLEGRO_EDITOR     STEP          Export STEP includes enclosure even when it is not selected.
1881233 ALLEGRO_EDITOR     UI_GENERAL    Green/white canvas without grid when creating a board file (File - New)
1900525 ALLEGRO_EDITOR     UI_GENERAL    Resizing the update symbols UI causes the options to overlap and jumble up (refresh issue)
2003861 ALLEGRO_EDITOR     UI_GENERAL    Same y-coordinate returned for different vertical positions when creating board outline in HotFix 048
2033958 ALLEGRO_EDITOR     UI_GENERAL    Incorrect canvas display on creating a design from the Start page and then opening an existing design
% h$ Z' H/ d8 ]( r3 }1 X" g6 _2053496 ALLEGRO_EDITOR     UI_GENERAL    Confirmation dialog is behind canvas
2054429 ALLEGRO_EDITOR     UI_GENERAL    Editor stops responding until choosing Done after clicking Zoom by Point twice
" M5 V+ ?' X1 b5 r2 r1 k. B2059707 ALLEGRO_EDITOR     UI_GENERAL    'HTTPS' links are not shown as hyperlinks when using allegro_html
2063423 ALLEGRO_EDITOR     UI_GENERAL    Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
9 k9 Q8 T: H, V! L! U1 P  m+ p$ m2038105 APD                DRC_CONSTRAIN APD crashes on update DRC in release 16.6
2050674 APD                PARTITION     Cannot remove C-Point from a partitioned design
: L$ N0 K3 ]0 z2068814 APD                WIREBOND      Bond wires cross on auto-separate
( t4 f5 R: n, e) U& d1967433 CAPTURE            OTHER         Cannot open DSN or OPJ files by double-clicking if Capture is already open
1967332 CONCEPT_HDL        COMP_BROWSER  Crash in customer environment on clicking on last row border in PIM after filtering
" [" T9 z0 P( q  H. N2001759 CONCEPT_HDL        COMP_BROWSER  Using Modify Component crashes Design Entry HDL
2020788 CONCEPT_HDL        COMP_BROWSER  Intermittent crash when clicking bottom edge of part selection table in the Modify Component window
2 l, G: Q  x: z1 T" {* X2053578 CONCEPT_HDL        CONSTRAINT_MG Values specified for custom properties are not preserved
! l% g$ J& Z/ ~9 V+ S$ W2 D2013002 CONCEPT_HDL        CORE          Ability to regenerate Netgroup names to remove '_1' suffix
1 ?# C4 W5 n1 B2 @' Z& f/ p% h2026637 CONCEPT_HDL        CORE          DE-HDL crashing often when launched from EDM Flow Manager
2041145 CONCEPT_HDL        CORE          Set font size & color of netgroup names and netgroup taps
, G: ]0 @5 H) |) V# D, U2 y- t2056743 CONCEPT_HDL        CORE          NetGroups appended with _1_1, some are empty, and inconsistent in DE-HDL CM and Allegro PCB Editor CM
2065889 CONCEPT_HDL        CORE          DE-HDL Modify command moves location of attached symbol properties
' A, G+ z7 P. z0 P0 G' w9 x9 s2074410 CONCEPT_HDL        CORE          Full net connectivity not shown in Allegro PCB Editor.
( j0 ^/ v; y7 J  w- ]3 [) [2045717 CONCEPT_HDL        RF_LAYOUT_DRI The RF PCB Options is greyed out when doing Import Physical on Linux with enterprise licenses
2045274 CONSTRAINT_MGR     CONCEPT_HDL   Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
/ ~* W) N4 q( [# O9 U2050521 CONSTRAINT_MGR     OTHER         Unexpected Xnet removal from schematic when Export to PCB Layout is executed.
2066270 PCB_LIBRARIAN      SYMBOL_EDITOR Unable to edit note text containing comma
2069181 PCB_LIBRARIAN      SYMBOL_EDITOR Pinlist window expand/collapse buttons act weird first time when invoked.
: [6 B3 h1 u, ~( |  l2070007 PCB_LIBRARIAN      SYMBOL_EDITOR Project not found error in Symbol Editor when path contains space character
; \" h# |) C7 L  V2 T2072793 PCB_LIBRARIAN      SYMBOL_EDITOR Right-click menu of formatting text objects is not consistent: second and third options are swapped
: J! x7 J# v# h) w0 R. v7 L" t2073138 PCB_LIBRARIAN      SYMBOL_EDITOR New Symbol Editor: Do not allow duplicate properties
1957458 PSPICE             FRONTENDPLUGI Refresh issue with Bias Display on a new design: bias value not updated
2022211 PSPICE             FRONTENDPLUGI Bias Point results are not updated
2031058 PSPICE             FRONTENDPLUGI PSpice bias values are not getting updated
2038021 PSPICE             FRONTENDPLUGI Bias display is not updated
) A' P; o9 U9 b7 F3 i& g2055274 PSPICE             FRONTENDPLUGI Capture crashes on SIMSETUP OK when two projects are open
1 X: p  d1 w6 G2053432 RF_PCB             OTHER         Property on RF component not transferred to new design not containing the component
8 B% |* l) Y# b/ ~2003341 SCM                SCHGEN        Unable to generate a schematic for hierarchical blocks
2069924 SIP_LAYOUT         DIE_ABSTRACT_ Conversion from co-design die to standard die / BGA / anything else must remove floating function pins.
2067894 SIP_LAYOUT         OTHER         sip database size is enormous for a small component definition used in fdesign
2067987 SIP_LAYOUT         OTHER         Orphaned die attachment in SiP Layout cannot be removed
2072857 SIP_LAYOUT         OTHER         SiP Layout crashes when using Find by Query and choosing 'Symbols'
2068973 SIP_LAYOUT         REPORTS       SiP Layout Missing Fillet report not catching a missing fillet in HotFix 051 and 052
2059533 SIP_LAYOUT         SYMB_EDIT_APP SiP Layout: Cannot rotate bumps in Symbol Editor application mode
1981749 SYSTEM_CAPTURE     ARCHIVER      System Capture: Archiving a design from the Tcl command window results in error
2054869 SYSTEM_CAPTURE     AUTOMATION    syscapUtils.tcl command cnsAutoCreateDiffPair is broken due to missing acm_code.il and acm_config.txt files
6 l5 b0 N3 g/ m- L( m, U1966488 SYSTEM_CAPTURE     CANVAS_EDIT   New folder rename box does not show the text typed.
1814813 SYSTEM_CAPTURE     COMPONENT_BRO System Capture session log should specify the CDSSITE path for the current session
9 l9 \, X/ B# t* S1977673 SYSTEM_CAPTURE     COMPONENT_BRO adding reference blocks through add component error when cell name matches design name
" z" O. x4 Z0 x; O# G. Q; {2027100 SYSTEM_CAPTURE     COMPOSITE_FIL pstdedb.cdsz and netlist preview in System capture is not being updated when individual netlist files are written
1961274 SYSTEM_CAPTURE     CONNECTIVITY_ Xnet removed during pin swapping
+ e5 ]  M% W$ J4 J$ s, i3 }) \2041879 SYSTEM_CAPTURE     CONNECTIVITY_ xnets on net with only pull-up resistor
4 T5 c* y3 q, \- L4 ]1889238 SYSTEM_CAPTURE     COPY_PASTE    Wire fails to connect during copy and paste
1993146 SYSTEM_CAPTURE     DESIGN_EXPLOR Cannot move page up by only one position
1910941 SYSTEM_CAPTURE     MISCELLANEOUS Parts that are not in any schematic page appear in netlsit and BOM
; b  R3 `6 V$ q4 l+ V6 c4 B1902347 SYSTEM_CAPTURE     PRINT         Prints all sheets if one sheet is specified as the print range
3 q. z& |$ i- o$ T* h2041272 SYSTEM_CAPTURE     SMART_PDF     Smart pdf displays component outline when component is not de-highlighted.
2065768 SYSTEM_CAPTURE     SMART_PDF     Custom Variable in Table Object not getting passed to PDF
1969243 SYSTEM_CAPTURE     VARIANT_MANAG Export variant does not name file correctly if the filename contains a space
8 o. Z( M1 q; @3 W1990258 SYSTEM_CAPTURE     VARIANT_MANAG Cannot paste copied preferred part to multiple parts with the same part number
1992250 SYSTEM_CAPTURE     WORKSPACE     Double-clicking a .CPM file runs System Capture but does not open project
. z% G1 ?" F  U- I
1 X6 R! _% U/ o& @4 ^
1 n, u7 j9 w4 G/ iFixed CCRs: SPB 17.2 HF053
" j; N( f8 N- \03-30-2019
0 Q- y. {; w9 m$ t: J& H9 e) t========================================================================================================================================================
, R/ G  ?5 |+ g4 O! Q0 ~CCRID   Product            ProductLevel2 Title
0 z0 U3 a% v6 c1 K' c! ~========================================================================================================================================================
' f! O) S% D( _2035766 ADW                DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
2044872 ADW                PART_BROWSER  Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag
4 F3 [7 A8 B% U' L+ ?% ?+ Z5 N! s9 q2025147 ADW                TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
3 q/ l4 C6 G4 N, B2025201 ADW                TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
" _' y9 f* Q) d2052046 ADW                TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error
6 B' Y9 @  A* D0 v$ R1 f2056694 ADW                TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
2047512 ALLEGRO_EDITOR     3D_CANVAS     Mechanical components do not move when bending in 3D Viewer
" f1 k1 u) b! u/ j0 G: F9 H& K2048086 ALLEGRO_EDITOR     3D_CANVAS     Wirebonds are not linked to diepad when component is embedded body down
2051277 ALLEGRO_EDITOR     3D_CANVAS     3D View Vias are Offset from Board in Z direction
2054327 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
2056547 ALLEGRO_EDITOR     3D_CANVAS     3D model not shown for component with STEP file assigned
2044980 ALLEGRO_EDITOR     ARTWORK       'Import - Artwork': PCB Editor stops responding and no artworks are loaded
6 i; R) s" h+ r, d2061203 ALLEGRO_EDITOR     CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
& d+ D; ?$ m- w! e1826533 ALLEGRO_EDITOR     DATABASE      Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.
1857282 ALLEGRO_EDITOR     DATABASE      PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
2052767 ALLEGRO_EDITOR     DATABASE      Allegro PCB Editor crashes on editing padstack
; S- O: T" Q3 N. k+ K1 `- _) g1825692 ALLEGRO_EDITOR     DRAFTING      Dimension line text moved by Update Symbols
2 z7 p2 L& M9 i+ j3 d1874814 ALLEGRO_EDITOR     DRAFTING      'Connect Lines' does not merge overlapping lines
& u: M5 v! U2 {! R4 y+ s1874935 ALLEGRO_EDITOR     DRAFTING      Angular dimension text has extra spaces added before the degree symbol.
1882597 ALLEGRO_EDITOR     DRAFTING      'Trim Segment' should allow trimming for all intersecting segment types
2052315 ALLEGRO_EDITOR     DRC_CONSTR    DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
2040603 ALLEGRO_EDITOR     EDIT_SHAPE    Shape is not updating correctly after the 'move' command
1 q0 M' h7 k. h. E; v/ ^7 N+ f2050177 ALLEGRO_EDITOR     INTERACTIV    Letters need to remain aligned and uniform after performing Boolean ANDNOT operation
0 l5 V* k9 P& J- p/ }& d8 F' ^6 O2052586 ALLEGRO_EDITOR     IPC           IPC356 showing shorts and disconnects for chip-on-board design
2044350 ALLEGRO_EDITOR     MANUFACT      Cross Section table showing multiple decimal digits for the Tolerance column
2051150 ALLEGRO_EDITOR     NC            Counterbore/Countersink holes not being shown in the NC legend table.
2058199 ALLEGRO_EDITOR     NC            'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table
2061809 ALLEGRO_EDITOR     NC            Counter bore NC Legend does not show any data
$ w2 W! k' D2 Y: D2063477 ALLEGRO_EDITOR     NC            Counter bore NC Legend does not show its value
) {1 n7 c* o* N6 G% V2033849 ALLEGRO_EDITOR     PLACEMENT     PCB Editor stops responding when removing a plane that the Place Replicate command added
$ J8 [; O8 z0 b' c8 w+ j1 w% O2037509 ALLEGRO_EDITOR     PLACEMENT     Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created
2047480 ALLEGRO_EDITOR     SCHEM_FTB     Importing netlist using Capture-CM flow in PCB Editor is crashing netrev
* Z, L) ]& p( Y* g6 f2046276 ALLEGRO_EDITOR     SHAPE         Add notch is not snapping to the grid point
2047572 ALLEGRO_EDITOR     SHAPE         Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding
2048483 ALLEGRO_EDITOR     SHAPE         Shapes not getting updated post backdrill update
0 q! N/ I* x# X* }% r' v2050120 ALLEGRO_EDITOR     SHAPE         Dynamic fill is flooding over other etch shapes within a symbol.
2058017 ALLEGRO_EDITOR     SHAPE         Shape not voiding correctly when fillets are present
, M8 M/ H. s1 C9 t9 Y+ q2010569 ALLEGRO_EDITOR     SKILL         Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.
* ]& ~( Z7 X) m( D# p2 f2055055 ALLEGRO_EDITOR     SKILL         Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
9 C( |( H+ t, c7 k0 ]* Q" W. ^1961689 ALLEGRO_EDITOR     SYMBOL        Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint
2034949 ALLEGRO_EDITOR     SYMBOL        Angular dimension from DRA not created in PCB
2046242 ALLEGRO_EDITOR     UI_GENERAL    Searching User Preference Summary results in crash
4 j. ?6 F! T. y& d2 D& t7 N- `0 ?+ |. g2053496 ALLEGRO_EDITOR     UI_GENERAL    Confirmation dialog box is behind canvas
2063423 ALLEGRO_EDITOR     UI_GENERAL    Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
1886781 ALLEGRO_VIEWER     OTHER         Opening Color192 in Allegro Free Viewer causes it to crash
1699433 APD                EDIT_ETCH     Field solver runs when not expected
1937159 APD                EDIT_ETCH     Routing clines takes long time
2050863 APD                SHAPE         Taper voiding process is different in Within the region/Out of Region
2047391 CAPTURE            PART_EDITOR   Pin type cannot be changed in hotfix 051
6 `% z; y% c8 `2049161 CAP_EDIF           IMPORT        Fatal error 'cannot determine grid' when converting third-party design to Capture
2053578 CONCEPT_HDL        CONSTRAINT_MG Values specified for custom properties are not preserved
; N( J& N. d. x2047583 CONCEPT_HDL        COPY_PROJECT  Design Entry HDL crashing when trying to open page 52 of copied project
8 i  z8 k4 g3 H$ z6 y/ G' X" o2036239 CONCEPT_HDL        CORE          When cutting/pasting, multiple error pop-ups appear for the same notification
* ?* N4 n2 p0 Q4 h& w; l2037572 CONCEPT_HDL        CORE          Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
5 I9 B1 t' ?) ~2037578 CONCEPT_HDL        CORE          VOLTAGE property gets deleted after copying it from a non-synchronized source
0 i' L/ y. }$ J2046958 CONCEPT_HDL        CORE          Moving block pins from symbol right to left places pin names outside the symbol
* T- Y4 Q1 i% q% Y- a# x2032480 CONSTRAINT_MGR     CONCEPT_HDL   Incorrect matchgroups created when working with multiple level nested hierarchical blocks
2045274 CONSTRAINT_MGR     CONCEPT_HDL   Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
2046765 SIP_LAYOUT         DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library
1 g2 K/ I: W# r3 E# b2067970 SIP_LAYOUT         DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty
1981749 SYSTEM_CAPTURE     ARCHIVER      System Capture: Archiving a design from the Tcl command window results in error
1968437 SYSTEM_CAPTURE     ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
- e3 L7 {. g3 d7 J# I* Z7 a2 h1983063 SYSTEM_CAPTURE     AUTOSHAPES    Auto Shapes are being shown as part of components
1968463 SYSTEM_CAPTURE     CANVAS_EDIT   System Capture should not allow illegal characters to be entered for net names
2006593 SYSTEM_CAPTURE     CANVAS_EDIT   Asterisk in a search string is not treated as a wildcard character
# r: x* Q6 e8 ]" B; t1721863 SYSTEM_CAPTURE     CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
, z1 c5 }2 h; v" q0 o! L; i/ ?+ }1 O1960130 SYSTEM_CAPTURE     CONNECTIVITY_ Disconnected nets when using the mirror option
3 {: @) f0 u3 T3 K% w5 P5 q8 }1985029 SYSTEM_CAPTURE     EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
1895142 SYSTEM_CAPTURE     EXPORT_PCB    System Capture reports incorrect unsaved changes when closed after running export physical
2 ]& z6 J; l$ i" A* l4 Z# d+ m3 l  z, T1628596 SYSTEM_CAPTURE     FIND_REPLACE  Alias issue in Find: Results do not show the resolved physical net names
1988297 SYSTEM_CAPTURE     FIND_REPLACE  Edit > Find and Replace does not replace a net with an existing net on the canvas
! Q0 q, S; u+ K8 M) L" v1843885 SYSTEM_CAPTURE     FORMAT_OBJECT Renaming a net causes it to lose custom color assignment
1969308 SYSTEM_CAPTURE     FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast
1990060 SYSTEM_CAPTURE     FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently
1993208 SYSTEM_CAPTURE     FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page
' l1 X" c, Y; e1981775 SYSTEM_CAPTURE     IMPORT_PCB    Import Physical takes a long time on some designs to launch the UI
1982320 SYSTEM_CAPTURE     IMPORT_PCB    In the B2F flow none of the *view files are created
; e( x+ o) O$ w. F2010996 SYSTEM_CAPTURE     INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
1967614 SYSTEM_CAPTURE     MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it
1980999 SYSTEM_CAPTURE     NEW_PROJECT   System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
+ S; M$ U! ^+ U. ~1973437 SYSTEM_CAPTURE     OPEN_CLOSE_PR Opening a design crashes System Capture
" {* E" s7 V5 j9 ?3 q3 X2 z/ d1986566 SYSTEM_CAPTURE     OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
1993093 SYSTEM_CAPTURE     OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor
2 T+ }% L5 ^* Z8 t& N1 f2042360 SYSTEM_CAPTURE     OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder
3 d6 l- Q7 M* w: A' _1 G+ M5 C1992247 SYSTEM_CAPTURE     PART_MANAGER  Part Manager displays message for undo and redo stack even after specifying not to show message
3 W& K* L9 _1 ]) l2048000 SYSTEM_CAPTURE     PERFORMANCE   Performance issue when instantiating and moving a component
) v' _6 \: X9 B$ V& M9 S1892120 SYSTEM_CAPTURE     PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES
1970009 SYSTEM_CAPTURE     PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
2042707 SYSTEM_CAPTURE     VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor
9 M' [" Q  _& u* K( l

. _2 L9 R. y" c" a3 jFixed CCRs: SPB 17.2 HF052
1 m- N; R0 w) p3 F03-01-2019
# ]/ }7 J* P0 l* s4 t% {0 b4 Z- D+ J========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
. Y. {, ~$ H% Q! f" U1 v) _% d2020429 ADW                ADWSERVER     Incorrect adwservice status on Linux
2034815 ADW                LIBDISTRIBUTI Cannot mark classification obsolete because it is associated to objects in the database
* ^) S' \) |3 H6 C2015461 ADW                PART_BROWSER  New Component Browser should read the mapping of symbol and associated package as it results in error PKG-1005
2049380 ADW                PART_BROWSER  System Capture Import HDL not importing complete PTF File data
1 w5 K, x" q0 \5 ?8 Z+ ?, ?1948608 ADW                TDA           CUSTOMVAR directive value in project CPM was not updated by TDA UPDATE command.
. O1 ^* `( V6 N7 W+ I* U* t1992662 ADW                TDA           Custom directive added to the cpm file not updated after check-in
8 s" o( J2 s- W. w/ l1733129 ALLEGRO_EDITOR     COLOR         'Display - Highlight', double-click permanently highlights symbol
1861938 ALLEGRO_EDITOR     COLOR         Changing layer color changes layer visibility
6 C6 e4 o6 \; u/ H; v2034753 ALLEGRO_EDITOR     CROSS_SECTION Allegro PCB Editor crashes when a cross-section technology file is imported in Overwrite mode
* ~: O1 j9 Q; n2036895 ALLEGRO_EDITOR     CROSS_SECTION Replay script error during import of tcfx Xsection file
1929360 ALLEGRO_EDITOR     DATABASE      Via color is inconsistent on Vias with color assigned
1984203 ALLEGRO_EDITOR     DATABASE      Drill holes not displayed correctly in the Zone area
2013596 ALLEGRO_EDITOR     DATABASE      Assigning net name on Vias does not change the Via Color to that on Net Color automatically
2025798 ALLEGRO_EDITOR     DATABASE      Assign net to via changes color of the via to the default color
  _1 a* W" q& _2032678 ALLEGRO_EDITOR     DATABASE      Unable to delete layer on design
) D3 P1 ?7 O0 `% ?9 r9 m2 p! C2032725 ALLEGRO_EDITOR     DATABASE      Dehighlight removes color assignment from color dialog
6 G& N0 m5 b6 J" g4 y6 ^. w' E2029542 ALLEGRO_EDITOR     DFA           Interactive Placement with Manufacturing Package to Package spacing
% F7 \- F/ u8 B5 o  G, `  ]2020548 ALLEGRO_EDITOR     DFM           Cadence DFM Customer site cannot Submit Request
2020566 ALLEGRO_EDITOR     DFM           Error when sending Design True DFM Rules Request
2030179 ALLEGRO_EDITOR     DFM           Allegro PCB Editor .brd file will not save after routing using Automatic Router
2052907 ALLEGRO_EDITOR     DFM           The Submit Request button for DesignTrue DFM Rules Request does not work
# e2 Y( o2 e  \7 @0 L- |1928915 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor constraint status bar does not match Constraint Manager data when z-axis delay is turned on.
1932165 ALLEGRO_EDITOR     EDIT_ETCH     Arc slide behavior with clines at odd angles: notches on slides
1943901 ALLEGRO_EDITOR     EDIT_ETCH     arc segment incorrect on slide.
2031055 ALLEGRO_EDITOR     EDIT_ETCH     On drawing cline the width on a Layer is larger than defined constraint
1877891 ALLEGRO_EDITOR     GRAPHICS      Allegro PCB Editor crashes when started from EDM for projects without a board file or empty master.tag file
2040689 ALLEGRO_EDITOR     NC            The decimal digits of a rotated oval padstack do not match the Drill Chart.
2028105 ALLEGRO_EDITOR     PLACEMENT     Delay in moving a large count pin symbol
, C0 Y, W1 X' |2019027 ALLEGRO_EDITOR     REPORTS       Information shown in the Report Viewer is not correct.
1 W+ w; Q, D% q& ^$ f/ C2022461 ALLEGRO_EDITOR     SHAPE         Abnormal termination of  thieving function in Allegro PCB Editor
2032048 ALLEGRO_EDITOR     SHAPE         shape void difference from hotfix 026 to 048: need square corners for full round
5 q$ r! c7 v( ^4 c# z2040138 ALLEGRO_EDITOR     SHAPE         shape_rki_autoclip affects the overlapping shape boundary
2040259 ALLEGRO_EDITOR     SHAPE         Same net shape and cline adds shape void around cline
& ?# D( m6 @5 l  i4 {! B2031468 ALLEGRO_EDITOR     TECHFILE      Cross section import (.tcfx) not working correctly.
2006425 ALLEGRO_EDITOR     UI_FORMS      Option to disable 'Create a New Design' window in OrCAD PCB Designer
3 _/ r+ n9 D! O- V  n% \) k( u! t2007451 ALLEGRO_EDITOR     UI_FORMS      Option to suppress 'Create a New Design" window for File > Open in OrCAD PCB Editor from hotfix 048
1 G. `6 w5 ]: |' |$ y( {) R2009314 ALLEGRO_EDITOR     UI_FORMS      Existing scripts that open OrCAD PCB Editor not working in hotfix 048
6 n; N( c  i- N5 E8 D( I5 D2021476 ALLEGRO_EDITOR     UI_FORMS      PCB Editor is slow when using the command 'add connect'
8 f. C9 a' i3 O( }( ?5 I" I2039462 ALLEGRO_EDITOR     UI_FORMS      Hovering over Default symbol height in Design Parameter Editor does not display a description
1808054 ALLEGRO_EDITOR     UI_GENERAL    Illegal value in axlFormSetField crashes PCB Editor
2 }3 p% u7 i1 ^9 U/ \1822679 ALLEGRO_EDITOR     UI_GENERAL    'Symbol pin #' field is truncated on rotating components in the Placement Edit mode
* \7 u+ V' @% ?5 x) W  _1856438 ALLEGRO_EDITOR     UI_GENERAL    Script recording messages not displayed in the PCB Editor task bar when using the script window.
/ f, ~% Z; w& ?5 e3 X4 u3 L1879078 ALLEGRO_EDITOR     UI_GENERAL    Running PCB Editor from command prompt with '-product help' should list all products and options
6 i9 w" K) c6 y% Z1944225 ALLEGRO_EDITOR     UI_GENERAL    Cannot close log file window till we close report dialog box
8 O* Q4 }  C2 y0 p  b+ A! B1967708 ALLEGRO_EDITOR     UI_GENERAL    New Command Window Shows Last Command in UI
; w) h1 k' l! G" f( B1968380 ALLEGRO_EDITOR     UI_GENERAL    Write all open editing sessions in MRU
4 X3 k# p6 A+ W; d1982138 ALLEGRO_EDITOR     UI_GENERAL    axlFormListDeleteItem(fw field -1) not deleting last item of a list
2003054 ALLEGRO_EDITOR     UI_GENERAL    Grids not shown when 'nolast_file' is set
+ T3 A9 k+ b3 J2010760 ALLEGRO_EDITOR     UI_GENERAL    Pressing tabs is selecting only vias and not selecting clines in PCB Editor in hotfix 048
0 B& M% h+ U4 A0 q+ o4 j8 a2 X9 F( R2019120 ALLEGRO_EDITOR     UI_GENERAL    Tab key is not working when there are two objects on top of each other
2029248 ALLEGRO_EDITOR     UI_GENERAL    Colorview load is not working when using absolute path
2030985 ALLEGRO_EDITOR     UI_GENERAL    The view of the PCB is offset after closing and opening the board.
! \4 X2 _& o# n6 j5 ]3 e: O, {% H2037968 ALLEGRO_EDITOR     UI_GENERAL    Tab key will not cycle between cline elements.
2015766 ALLEGRO_PROD_TOOLB CORE          Advanced Testpoint Check does not work
2023356 ALLEGRO_PROD_TOOLB CORE          Edit new session does not work in quick symbol editor tool box
- h: v) q7 v: r5 j" N+ e2017162 CAPTURE            CONSTRAINT_MG Cannot apply ECSets in Constraint Manager-enabled Capture
2026777 CAPTURE            CONSTRAINT_MG Cannot apply electrical CSet (ECSet) in Constraint Manager-enabled Design Entry CIS
- e3 e2 y5 Q( a, D2 s2027545 CAPTURE            CONSTRAINT_MG Getting error (ORCAP-40320) while creating ECSet
9 j6 h$ x/ U& D$ a& I2012967 CAPTURE            OTHER         Capture license is loaded slowly in hotfix 048
- b5 A' t, y7 V8 t, X2010093 CONCEPT_HDL        ARCHIVER      Archive .zip file keeps the whole folder hierarchy and not only the project hierarchy
$ l* I' k4 _9 @8 S2040431 CONCEPT_HDL        EDIF300       EDIF300, Schematic Writer, crashes in release 17.2-2016
2034077 SIP_LAYOUT         DFA           DRC is not catching all Shape minimum width violations
2034094 SIP_LAYOUT         DIE_ABSTRACT_ [VSDP-RDL Exchange] some traces are lost in SiP Layout
. S% P& V& i1 V0 f& P( |4 i$ I2037462 SIP_LAYOUT         DIE_ABSTRACT_ Cline Segments are lost on saving and re-opening the design in next session
3 _  B$ X6 W; d9 g3 G6 {5 R2025321 SIP_LAYOUT         IMPORT_DATA   compose symbol from geometry defaults need to change due to performance
2017759 SIP_LAYOUT         PLACEMENT     Placing a die creates extra place bound and puts pin numbers in the wrong place, causing future netlist import failure
2 o  X5 U* z* Q8 }) D2021057 SIP_LAYOUT         SHAPE         Polybool assert error when adding dynamic shape prevents shape voiding.
2012381 SIP_LAYOUT         SKILL         Ability to check if the Dynamic Unused Pads Suppression box is selected using SKILL
) v& r! @& w: P1 ]; h& w1990299 SIP_LAYOUT         UI_GENERAL    Pressing 'Esc' cancels DRC checking when there is no focus on the Allegro PCB Editor canvas
1997317 SIP_LAYOUT         WLP           Advanced WLP, Metal Density Scan does not correctly calculate scan region count in Y direction
2029524 SPECCTRA           ROUTE         SPECCTRA stops responding when executing the quit command
( T. J9 T3 E$ @9 v# q) I) Q1670888 SYSTEM_CAPTURE     CANVAS_EDIT   Rotation error when connected to a power symbol
, V! f. B/ A8 R! P/ j1880809 SYSTEM_CAPTURE     CANVAS_EDIT   Can modify only one RefDes from canvas for duplicate RefDes; can modify both from the Properties window
4 a! |& @  R9 n3 S# g1979063 SYSTEM_CAPTURE     CANVAS_EDIT   System Capture : File > Close is grayed out
% x6 z& \3 f) }; K! M- N0 J: f( K2034498 SYSTEM_CAPTURE     CAPTURE_IMPOR Cannot find parts via Find & Replace after importing Capture design
1984561 SYSTEM_CAPTURE     CROSSPROBE    System Capture: Cross-probing from layout does not work when zoomed into a specific area on canvas
! L% G3 x1 o7 v" o- `7 @1863460 SYSTEM_CAPTURE     DARK_THEME    thumbnail preview of pages is in light them but dragging the page the previes is dark
2025876 SYSTEM_CAPTURE     EDIT_OPERATIO Route failures when dragging a circuit
! n1 g. o8 w/ K# M. C; }' K2005904 SYSTEM_CAPTURE     FORMAT_OBJECT Pin name text is smaller in System Capture than in DE-HDL by about 25%
4 N! v/ b* e$ P" N2036782 SYSTEM_CAPTURE     IMPORT_BLOCK  Unable to import the block from project.
2025949 SYSTEM_CAPTURE     IMPORT_DEHDL_ Title block and thick wires/lines of border in DE-HDL do not  translate in System Capture
2025950 SYSTEM_CAPTURE     IMPORT_DEHDL_ Broken connectivity on imported ground symbols
2040923 SYSTEM_CAPTURE     MISCELLANEOUS System Capture - Multiple Symbol Replace, disconnects and changes orientation
2017526 SYSTEM_CAPTURE     NAVLINKS      Page information missing in NAVLINKS
2015346 SYSTEM_CAPTURE     PAGE_MANAGEME Rename page fails in some cases
2038811 SYSTEM_CAPTURE     PRINT         Black & White PDF showing colors
& I# k8 r( p, l; J2048493 SYSTEM_CAPTURE     SYMBOL_GEN    Symbol Editor, Modify outline adds an 'X' in symbol incorrectly
2031995 SYSTEM_CAPTURE     VARIANT_MANAG Variant Editor does not load the design and restarts the machine after sometime.
2032005 SYSTEM_CAPTURE     VARIANT_MANAG Custom variables not saved for variants
1968431 SYSTEM_CAPTURE     WORKSPACE     Unable to reorder the pages (tabs) when opened in the workspace
2040995 XTRACTIM           GUI           Running XIM from APD enables "skip DC R simulation" by mistake
: [& B3 b8 N4 E
5 M9 q( k$ J' z
) K' H0 s) t3 h- X" ], ^Fixed CCRs: SPB 17.2 HF051
01-30-2019
$ n  }) k+ P, L6 b========================================================================================================================================================
$ ]/ O* |/ R/ \9 o! a1 b( h# xCCRID   Product            ProductLevel2 Title
) v% s% s0 O2 y# e: t========================================================================================================================================================
, a& R+ r' ^3 {& Y/ y$ g2015843 ADW                LIBDISTRIBUTI Error for library distribution (lib_dist_client) regarding string index out-of-range
1869914 ADW                PART_BROWSER  Adding components to System Capture schematic canvas takes long time in Linux clusters
2010458 ADW                PART_BROWSER  RefDes values not appearing on parts
2022630 ADW                PART_MANAGER  Unable to successfully import a DE-HDL Design into System Capture
3 ?6 `/ B1 B8 L& w4 e2005033 ALLEGRO_EDITOR     3D_CANVAS     3D Flex issues: Error message when opening design with bends in 3D viewer
2023496 ALLEGRO_EDITOR     3D_CANVAS     Error for designs with bend in 3D Viewer
2033459 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
1996431 ALLEGRO_EDITOR     ARTWORK       Via holes for connection have incorrect coordinates in Gerber
1995656 ALLEGRO_EDITOR     DATABASE      Attaching and Detaching a text file created with SKILL writeTable() function corrupts the text file
2027122 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when creating Place Replicate module
2023916 ALLEGRO_EDITOR     DFM           DFF Annular Ring: Thru via pad to Mask violates on via in pad instances.
$ D5 a8 U# D# I- T2 u  q, p6 l: x2024523 ALLEGRO_EDITOR     DFM           PCB Editor crashes in Mask To Trace check of DFF.
- p6 B9 Y: M- h3 s2021318 ALLEGRO_EDITOR     IN_DESIGN_ANA Integrated Analysis and Checking: Unable to run simulation with Crosstalk flow
: A  E: K3 b" E% ?% y* G5 i# g2014162 ALLEGRO_EDITOR     NC            Backdrill results using an OrCAD Professional license showing wrong values with hotfix 048
2010791 ALLEGRO_EDITOR     PLACEMENT     Setting dfa_pause_level to 3 and then moving and rotating part places the part with offset
2017112 ALLEGRO_EDITOR     PLACEMENT     place_boundary shown at wrong location when moved with User pick and footprints rotated
2028048 ALLEGRO_EDITOR     PLACEMENT     Rotate option using pick is rotating the outlines in different axis in view
- G: `8 ]' r; W2 s! w7 W2028314 ALLEGRO_EDITOR     PLACEMENT     Crash on moving components in Allegro PCB Editor
3 V' p4 i$ C. h. r9 Y( ]8 U2029235 ALLEGRO_EDITOR     PLACEMENT     PCB Editor crashes when moving more than one component and hovering on IC
: H/ R7 L, K, \0 P. R" H5 N. f2022644 ALLEGRO_EDITOR     SHAPE         dv_fixfullcontact obsolete in release 17.2-2016
2023322 ALLEGRO_EDITOR     SHAPE         Gloss does not add teardrops on all clines.
2024235 ALLEGRO_EDITOR     SHAPE         Copper Pour disappears when area includes parts
2024531 ALLEGRO_EDITOR     SHAPE         rki_autoclip is not working at a special XY location
3 [8 N, ?6 t$ o3 {/ n& |- ?2024599 ALLEGRO_EDITOR     SHAPE         Cannot create round corner for shape
* R9 q; l  R0 ]- K, h$ y6 V2024707 ALLEGRO_EDITOR     SHAPE         In-line void control does not work when there is no_shape_connect property attached
  Z2 u: X7 Q7 Y0 i2026849 ALLEGRO_EDITOR     SHAPE         Cannot assign region name using the 'next' operation
( k" r! d, ?% h. d" V2030156 ALLEGRO_EDITOR     SHAPE         Shape Area report for cross-hatched shape includes hatching and boundary
1852981 ALLEGRO_EDITOR     SKILL         Error message while creating Copper Mask layer without a name using SKILL not clear
) l6 p4 |' `! I) \  ]* p5 ]1968054 ALLEGRO_EDITOR     SKILL         Document of axlClearObjectCustomColor should indicate that it can clear color for DBID of Net
2026429 ALLEGRO_EDITOR     UI_FORMS      PCB Footprint wizard: horizontal and vertical lead pitch level reversed in the image
, s/ a2 f  s* f/ c3 i* h1768032 ALLEGRO_EDITOR     UI_GENERAL    Numeric keypad does not work for file selection shortcut
% p8 j% B. l6 H2 {1797376 ALLEGRO_EDITOR     UI_GENERAL    Release 17.2-2016: Padstack Designer saves padstack to the working directory when script is used
: p: X8 J8 y, {, L1798524 ALLEGRO_EDITOR     UI_GENERAL    Unable to save a padstack using script
  Y9 I7 U3 u  G5 K3 I, e1823031 ALLEGRO_EDITOR     UI_GENERAL    Help not working for OrCAD Productivity Toolbox
* q/ ]6 `; s0 O. R/ l( D1849921 ALLEGRO_EDITOR     UI_GENERAL    Analyze menu missing in OrCAD PCB SI
0 G( i1 L9 ~6 {3 k  o- h5 T0 U7 i1951740 ALLEGRO_EDITOR     UI_GENERAL    Trigger for 'open' does not work when opening a .dra file
9 R+ C8 F* k' i1952163 ALLEGRO_EDITOR     UI_GENERAL    Analyze menu missing in OrCAD PCB SI
$ Q, r2 i9 O% P8 f' [: e6 _+ V1982966 ALLEGRO_EDITOR     UI_GENERAL    SKILL command to access the Option window fields while in Interactive commands.
* D) g' w( L1 x% J& t1983567 ALLEGRO_EDITOR     UI_GENERAL    Alias with Ctrl not working with 'command window history' variable enabled
1989507 ALLEGRO_EDITOR     UI_GENERAL    Third-party tool causes PCB Editor to stop responding to command
5 ^" p  U  T5 G8 e* ~+ l5 U2003511 ALLEGRO_EDITOR     UI_GENERAL    Aliases using control (tilde) characters stopped working after upgrading to hotfix 048
2010418 ALLEGRO_EDITOR     UI_GENERAL    New command window breaks funckeys
2018201 ALLEGRO_EDITOR     UI_GENERAL    SKILL axlDBControl ('activeLayer /') updates active class/subclass but ministatus form not updated
2023468 ALLEGRO_EDITOR     UI_GENERAL    axlZoomInOut does not zoom out, always zooms in regardless of zoom factor (positive or negative)
2026428 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor takes several minutes when saving a design
' Y6 k% m! R. `2 k& |1 w) }2032697 ALLEGRO_EDITOR     UI_GENERAL    Funckeys with Ctrl not working with 'command window history' variable enabled
) z# o  ^' W0 T6 x6 E& D$ e% @2032717 ALLEGRO_EDITOR     UI_GENERAL    Funckey combinations, such as Ctrl + M, not working
2014211 ALLEGRO_VIEWER     OTHER         Arrow keys are not panning in Allegro Physical Viewer
2039081 CAPTURE            NETLISTS      Netlist not created: netlist fails for numeric pin names with backslash '\'
1993057 CONCEPT_HDL        CONSTRAINT_MG Constraints disappear in hierarchical design (Electrical->Net->Routing->Relative Propagation Delay)
2004641 CONCEPT_HDL        CONSTRAINT_MG 'Save Hierarchy' (hier_write) deletes bus object in Constraint Manager
2020901 CONCEPT_HDL        CONSTRAINT_MG Incorrect match Groups created in CM (TDO design)
8 x, I, r$ v' W2014979 CONCEPT_HDL        CORE          The active schematic page randomly changes while editing text
2027905 CONSTRAINT_MGR     DATABASE      Pin Property changes in CM during uprev to release 17.2-2016
2 @. e5 ]4 S% u. a6 N0 H( z' h" Z5 D1762263 ORBITIO            INTERFACES    Add set allegro_orbit_import variable to user preference
2005860 PSPICE             LIBRARIES     Error when simulating design with TL494 part in release 17.2-2016
' k" V& Q! a) s& q+ g1980072 PSPICE             SIMULATOR     Noise in the waveform when using DELAYT and DELAYT1 with capacitor
( c7 d/ c* r+ `) m" x$ ^2 b1977615 RELEASE            INTEGRATION   Cannot import third-party schematics into OrCAD Capture in release 16.6
* a* r, }) _' F% [* a% T2027009 RF_PCB             SETUP         'RF-PCB' - 'Setup' changes not saved on Apply
2002040 SIP_LAYOUT         MANUFACTURING IPC 356 'ignore die layers' does not work: netlists to die
2024703 SIP_LAYOUT         WLP           Cannot Add Pin Text: Error on 'Manufacturing' - 'Documentation' - 'Display Pin Text'
5 b' @0 Y+ X2 @2010045 SYSTEM_CAPTURE     CANVAS_EDIT   Cannot snap back vertical CAP until moved up and down horizontally
2010443 SYSTEM_CAPTURE     CANVAS_EDIT   Cannot select the CAP part
2012843 SYSTEM_CAPTURE     PACKAGER      Cannot short two grounds in the schematic
2015574 SYSTEM_CAPTURE     PACKAGER      System Capture is treating quotes in PTF files differently from DE-HDL
" j9 Q$ t0 B5 _( w( U2022653 SYSTEM_CAPTURE     VARIANT_MANAG Variant Editor - Allow Alternates where ALT_SYMBOL is a valid match for JEDEC_TYPE
2024742 TDA                SHAREPOINT    Accessing projects is taking time
2010531 XTRACTIM           OTHER         Allegro crash on repaint of command window
+ p% b  Y7 K8 o! f2 E2022351 XTRACTIM           OTHER         XtractIM is crashing the latest HF S049
6 C  c( l) x$ d- l0 q" Z
1 w% a1 `8 F9 d/ B" t- x
Fixed CCRs: SPB 17.2 HF050
  l, o3 ?4 C8 s/ Q: D12-23-2018
========================================================================================================================================================
3 r4 U6 n2 M+ g0 YCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
0 _! r, A" Q* E5 I2012119 ADW                ADWSERVER     Cannot connect Component Browser to server
1998856 ADW                ADW_UPREV     adw_uprev fails and a typo in rule name
$ P+ p- U, J& K" A* @1673333 ADW                CONF          Configuration Manager stops working and gives Java Timer-1 Error
& A6 F/ \2 u1 \- b2 S+ F! \9 B1900342 ADW                DBEDITOR      'Link To' on a schematic classification attribute does not work with linked attributes containing parenthesis
) V; B/ O( U; E: t# ~8 d  G1997516 ADW                DBEDITOR      DBEditor stops responding on changing attributes
1986292 ADW                LIBDISTRIBUTI Some parts are not updated in the part table in all_noauto and ini_noauto (restricted_sites).
2010460 ADW                PART_BROWSER  PKG-1002 error when opening a DE-HDL design
2013430 ADW                PART_BROWSER  Add component is inactive if WB_SHARED_RESOURCES is not pointing to the installation directory
; l0 Y# ]0 v( T7 B4 X, {2022806 ADW                PART_BROWSER  PKG-10005: Cannot package the following primitive instance in any section of the physical part
2006528 ADW                PART_MANAGER  Part Manager does not update parts when Key PTF property value changes
1980397 ALLEGRO_EDITOR     DATABASE      Mechanical pins with route keepouts (RKO) not updated
4 ~% V' L( X: u1988171 ALLEGRO_EDITOR     DATABASE      Backdrill clearance Keepout is not applied consistently
1994280 ALLEGRO_EDITOR     DFM           PCB Editor crashes during Unplace component
/ N; s/ X. ]% |9 s# X* Z# o6 d2012742 ALLEGRO_EDITOR     DFM           DFT for testpoint to outline not showing DRC
2002680 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashes on choosing Add Connect for two selected nets
) k& [% I. C4 ?: D* @2004597 ALLEGRO_EDITOR     EDIT_ETCH     Illegal BMS Identifier error when copying multiple via structures
2004929 ALLEGRO_EDITOR     EDIT_ETCH     Net with physical pin pair constraints is using incorrect line width when routed
2008314 ALLEGRO_EDITOR     EDIT_ETCH     Adding nets in tabbed routing crashes PCB Editor
# H! U$ a/ U' N$ X* k. a* g2018710 ALLEGRO_EDITOR     GRAPHICS      Using the mouse to zoom by scrolling stops working randomly
2018841 ALLEGRO_EDITOR     GRAPHICS      Canvas does not regain mouse focus after working in the Options pane in hotfix 049
$ {  n  |- a6 o2 E2019482 ALLEGRO_EDITOR     GRAPHICS      Canvas does not regain mouse focus after working with the Options pane in hotfix 049 on Windows 7
2019864 ALLEGRO_EDITOR     GRAPHICS      Using the mouse scroll button to scroll the canvas: focus is in the Options pane
2020750 ALLEGRO_EDITOR     GRAPHICS      Zoom in/Zoom out scroll does not work
3 l9 d4 o4 L. l4 A2020847 ALLEGRO_EDITOR     GRAPHICS      Scroll up/down key focus remains in command screen even when canvas is selected
1908812 ALLEGRO_EDITOR     INTERACTIV    Tools > Design Compare command does not work on Windows
# L" n* Z( }( L/ D) H$ y1995846 ALLEGRO_EDITOR     INTERACTIV    When there is an embedded component, the result of Metal Usage report is incorrect.
2011449 ALLEGRO_EDITOR     INTERACTIV    Command not found error (_impvision) for Impedance and Return Path DRC visions
1982867 ALLEGRO_EDITOR     INTERFACES    DBDoctor displays error for objects outside extent that cannot be fixed because the extents cannot be increased
1983177 ALLEGRO_EDITOR     INTERFACES    PCB Editor crashes when reading IDX file
4 F- n" O$ m. Z0 R0 P, O0 {1985623 ALLEGRO_EDITOR     INTERFACES    STEP model not exported from PCB Editor
; Z, b% g: I# H% @2 n' N1994855 ALLEGRO_EDITOR     MANUFACT      Drill legend with counter-bore: legend size not uniform when database set to inches
2001355 ALLEGRO_EDITOR     NC            PCB Editor crashes with NC route parameter
5 U  x' k1 _4 w" v1753414 ALLEGRO_EDITOR     OTHER         Ability to add Rigid Flex class in a format symbol
7 I  L- Y: }5 d7 B9 c, ?! b' A; I' |2004786 ALLEGRO_EDITOR     OTHER         Legacy menu option missing in OrCAD Professional
, ~5 E3 y8 `" p7 ^2 ?1949695 ALLEGRO_EDITOR     PADS_IN       Third-party to PCB Editor translation does not make a clean conversion
1949658 ALLEGRO_EDITOR     PLACEMENT     SKILL module creation issue: subsequent runs rotate module incorrectly
- |( l$ b# j4 S2001496 ALLEGRO_EDITOR     PLACEMENT     Constraint Region not replicated as part of the Place replicate apply command
) H. a& C. d: P# f" u2002989 ALLEGRO_EDITOR     PLACEMENT     Default rotation point is set to 'User Pick'
2007301 ALLEGRO_EDITOR     PLACEMENT     DFA boundary is shifted when moving components with User Pick
$ ?6 n% K/ ]( I- a2007312 ALLEGRO_EDITOR     PLACEMENT     DFA boundary is shifted when moving components with User Pick
/ i. A+ R8 y" G, v2 c+ S( O2008098 ALLEGRO_EDITOR     PLACEMENT     DFA boundary shows a shift if anchor point is set to 'User pick'
2009085 ALLEGRO_EDITOR     PLACEMENT     DFA boundary is shifted when moving components with User Pick
2009090 ALLEGRO_EDITOR     PLACEMENT     DFA boundary is being offset when moving components with User Pick
6 M" v( L/ |7 d/ {% f: Y2009580 ALLEGRO_EDITOR     PLACEMENT     Component outline offsets during move process
2010726 ALLEGRO_EDITOR     PLACEMENT     Two images appear when moving component in release 17.2-2016, hotfix 048
2010819 ALLEGRO_EDITOR     PLACEMENT     A separate outline appears when moving components using User Pick
2011454 ALLEGRO_EDITOR     PLACEMENT     DFA boundary is not centered correctly on moving components
( j% z' V7 Z1 d) |+ F! }4 O2011497 ALLEGRO_EDITOR     PLACEMENT     DFA boundary shifted from the part when moved
. f3 m# u: P# v/ p  ^. l2014250 ALLEGRO_EDITOR     PLACEMENT     Moving a symbol using the 'User Pick' causing an offset image of the symbol outline getting attached to cursor
2015676 ALLEGRO_EDITOR     PLACEMENT     Strange end-to-end DFA checking: offset of DFA from component when in user pick
2016421 ALLEGRO_EDITOR     PLACEMENT     Fail to place symbols because definition is incompatible for attribute 'PW_GENERATED'
2016452 ALLEGRO_EDITOR     PLACEMENT     Some symbols cannot be placed due to property definition differences
2016527 ALLEGRO_EDITOR     PLACEMENT     PCB Editor crashes on moving all components on board
! t6 Y/ J4 J& U2017364 ALLEGRO_EDITOR     PLACEMENT     Strange behavior when moving component: DFA or place bound area is centered around the User Pick position
( F; @/ V9 x; G* S! `3 F8 A2 }2018859 ALLEGRO_EDITOR     PLACEMENT     Moving parts by 'User Pick' or 'Sym Pin #' shows two component placement boundary outlines
7 M9 W5 L, ^; ^/ m0 I6 O2019364 ALLEGRO_EDITOR     PLACEMENT     PCB Editor stops responding when moving components
2019478 ALLEGRO_EDITOR     PLACEMENT     PCB Editor crashes when moving more than one component across the design
) u  X3 n1 n& Y2019624 ALLEGRO_EDITOR     PLACEMENT     DFA Boundary is offset from definition when moving symbols with user pick
$ @5 U; b9 ^- g. e2021625 ALLEGRO_EDITOR     PLACEMENT     Graphical Issue with Edit - Move and User Pick: additional outline image shown
2022203 ALLEGRO_EDITOR     PLACEMENT     Place bound outline is shown at the center of the pick when moving a part by User Pick
4 b) z' S& @& ~( F: |' }3 ?2024655 ALLEGRO_EDITOR     PLACEMENT     Moving multiple components causes PCB Editor to crash
2025895 ALLEGRO_EDITOR     PLACEMENT     PCB Editor stops responding when multiple symbols are moved and on getting too close to another symbol
2004497 ALLEGRO_EDITOR     SHAPE         Automatically deleting antenna shape is not deleting thermal reliefs associated with those shapes
# A" A& ]* z4 M9 {' f4 b% D( [2007832 ALLEGRO_EDITOR     SHAPE         Cannot void shape properly after rotating symbol
9 H3 g: J' ]6 r. [- R7 Z2009601 ALLEGRO_EDITOR     SHAPE         Error for shape created using third-party SKILL utility
: }+ e: d9 x8 C$ q2010924 ALLEGRO_EDITOR     SHAPE         Dynamic shape does not void in route keepout areas
" d$ K9 Y& U6 n; {2011176 ALLEGRO_EDITOR     SHAPE         Nothing happens on choosing 'Shape- - Change Shape Type' in Allegro Sigrity SI
2015446 ALLEGRO_EDITOR     SHAPE         Thermal relief connection created for static shape covering pin when inside a void in a dynamic shape.
; F. f; r( N2 e2017273 ALLEGRO_EDITOR     SHAPE         Same net spacing does not void properly for shape to hole.
! o% C0 [  }# Z. Y! f$ L2012878 ALLEGRO_EDITOR     UI_FORMS      Custom toolbars cannot be loaded as size differs for customState and customExteded in registry
2018177 ALLEGRO_EDITOR     UI_FORMS      Custom toolbars cannot be loaded as size differs for customState and customExteded in registry
2019437 ALLEGRO_EDITOR     UI_FORMS      Custom toolbars cannot be loaded as size differs for customState and customExteded in registry
2020491 ALLEGRO_EDITOR     UI_FORMS      Cannot load custom toolbars because the customState and customExtended Windows Registry entries are incorrect
1897843 ALLEGRO_EDITOR     UI_GENERAL    Function Keys, such as F3, F6, and F7, are not working if tool is idle for some time
6 B5 E8 ?% B4 u2000445 ALLEGRO_EDITOR     UI_GENERAL    Funckeys not working in hotfix 048 with the new Command Pane as default
" K: M+ n8 ^6 `( A' Q% v; N3 K2001847 ALLEGRO_EDITOR     UI_GENERAL    Ctrl related funckeys not working in hotfix 048
( ?& C1 l9 o. o" O* @9 h2008112 ALLEGRO_EDITOR     UI_GENERAL    Funckeys using Ctrl and Shift do not work in hotfix 048 (QIR 7)
2010370 ALLEGRO_EDITOR     UI_GENERAL    Shift + arrow key does not move component in release 17.2-2016, hotfix 048
7 c/ O+ b5 V' b( d2015418 ALLEGRO_EDITOR     UI_GENERAL    Funckey not working
+ N' R1 a0 T' d9 `8 ~  ?7 \' h2015443 ALLEGRO_EDITOR     UI_GENERAL    Text does not regain focus even on clicking after using a drop-down menu
2016899 ALLEGRO_EDITOR     UI_GENERAL    Dynamic zoom and funckeys are disabled after clicking a combo box in the Options pane
2 f; V  e) n: D! E2019753 ALLEGRO_EDITOR     UI_GENERAL    Infinite Cursor disappears regularly in hotfix 049 when infinite_cursor_bug_nt is set
. {; x- i4 a4 Z$ G0 f0 T2019990 ALLEGRO_EDITOR     UI_GENERAL    Mouse over does not highlight pin, need to click
& k0 t# S' s6 ~5 |4 S* Z2020162 ALLEGRO_EDITOR     UI_GENERAL    Funckeys not working in hotfix 049: pressing F4 not running Show Element
2020168 ALLEGRO_EDITOR     UI_GENERAL    Data tips not shown on mouse hover
3 k, G1 y! [& B% p" k2020840 ALLEGRO_EDITOR     UI_GENERAL    Page-up/Page-down (remapped to zoom-in/zoom-out) stop working until mouse scroll button is pressed
2021416 ALLEGRO_EDITOR     UI_GENERAL    New user interface does not shift input focus and zoom in/out does no longer work in layout window
2022185 ALLEGRO_EDITOR     UI_GENERAL    Ctrl related funckeys are not working
+ }: [4 s. C5 D3 @' V  ?( l. |2023402 ALLEGRO_EDITOR     UI_GENERAL    During Add text, focus does not move from the subclass dropdown to the canvas.
2025806 ALLEGRO_EDITOR     UI_GENERAL    Function keys and shortcuts not detected
2027581 ALLEGRO_EDITOR     UI_GENERAL    Funckey problem: focus lost from canvas on using another window
2009382 ALLEGRO_EDITOR     ZONES         When deleting zone by Zones - Manage, the shape in zone is out-of-date
% n- V$ w# X9 O) F& @1977211 APD                DXF_IF        APD: die pads shift after export DXF
+ w* ^6 p* N4 D" M, w2018483 CAPTURE            NETLISTS      Error when extracting netlist from schematic (ORNET-1193)
. p5 g' v/ d2 f8 x- C' z8 [' ?2022764 CAPTURE            NETLISTS      Schematic will not generate pstchip.dat file
2 h1 v2 P- u+ y/ H" `. p9 U! f1921557 CAPTURE            NEW_SYM_EDITO Zoom to region option grayed out
5 T3 {, Y( F8 M# @! J; T7 w1945203 CAPTURE            NEW_SYM_EDITO Symbol Editor: No Zoom to Region and cannot edit Pin Type and User Pin Properties for multiple pins
. N1 L+ m9 l# L. [' t/ F$ P6 U1950178 CAPTURE            NEW_SYM_EDITO Ability to remove convert view of a component
1966792 CAPTURE            NEW_SYM_EDITO JavaScript error on trying to edit pin name for GP0
$ w1 }" V. s/ \& @4 x1969099 CAPTURE            NEW_SYM_EDITO Cannot add convert view after creating a part
1969834 CAPTURE            NEW_SYM_EDITO Shapes not mirrored around center if more than one shape selected in Symbol Editor
1970984 CAPTURE            NEW_SYM_EDITO New part is getting Numeric Numbering automatically
1972607 CAPTURE            NEW_SYM_EDITO New Symbol Editor: name cannot be edited unless value is entered for a new property
1 L4 O5 d$ o3 H/ b/ z5 t4 Q1972635 CAPTURE            NEW_SYM_EDITO New Symbol Editor: wrong listing of Symbol Properties in right pane
  L- N" F$ \* i9 B0 w8 h# L1974296 CAPTURE            NEW_SYM_EDITO Design Template font settings are not being honored for new library/part creation
% m. Y; t6 |6 {0 O9 _/ m% z0 r6 Z5 n1982783 CAPTURE            NEW_SYM_EDITO Part Editor is blurry when zoomed out.
+ f  o( Q" r6 y2 w% j3 B2 F1993361 CAPTURE            NEW_SYM_EDITO Cannot change part numbering, set to Numeric by default
* K! c5 Y  J4 O! r. m) {5 V4 ?2003749 CAPTURE            NEW_SYM_EDITO Cannot save edits to hierarchical blocks in new Symbol Editor in hotfix 048
; p7 d7 u/ l( ~/ x% J2004395 CAPTURE            NEW_SYM_EDITO 'Pin ignore' modifications not saved in new Symbol Editor 'Edit Pins' after hotfix 048
5 J8 B0 ~5 C& T' ^. ^" @: J2007747 CAPTURE            NEW_SYM_EDITO Cannot add Convert View after creating a part
2011321 CAPTURE            NEW_SYM_EDITO 'Place - Picture' is not working for blocks in hotfix 048
1 A: m" B$ p( L$ }) x2013146 CAPTURE            NEW_SYM_EDITO 'Part Edit' not updating changes in hierarchical block
2002904 CAPTURE            OTHER         Unable to check out Capture license in release 17.2-2016, HotFix 048
/ n6 @6 \4 j+ s& v6 V: V# S  h2002922 CAPTURE            OTHER         Unable to check out Capture license in release 17.2-2016, HotFix 048
1988812 CAPTURE            PART_EDITOR   Parts created or edited with hotfix 038 Part editor do not use default font size
7 e% k! K& C2 d' V% p2008912 CAPTURE            SCHEMATIC_EDI Design Compare shows 'NaN' in the graphical output
. ~1 g% ]7 H0 U) m; O1985701 CONCEPT_HDL        CHECKPLUS     Library symbols are missing from the examples folder
: Y7 D+ ~* v4 @( {1933789 CONCEPT_HDL        CORE          honor_sch_custom_texts
/ z9 W! _2 a1 w/ I( Z1933892 CONCEPT_HDL        CORE          HONOR_SCH_CUSTOM_TEXTS
2001737 CONCEPT_HDL        PDF           DE-HDL crashes on choosing File - Publish PDF
2010508 CONSTRAINT_MGR     CONCEPT_HDL   Schematic data corrupted on reading the data from CM database using the CM SKILL APIs
1997461 PSPICE             AA_FLOW       'Edit PSpice Model' from 'Assign Tolerance' window does not work
- X: Y5 Y+ c5 P9 H% X# |6 Q& Q2005948 SIP_LAYOUT         DIE_EDITOR    CTE expansion tool shifts pins off the die
1893045 SIP_LAYOUT         INTERACTIVE   Refreshing bond finger labels causes all the labels to shift location
2006926 SIP_LAYOUT         ORBITIO_IF    Bundle translation from OrbitIO is incorrect
2006659 SIP_LAYOUT         SHAPE         Cannot form fillets inside a shape in hotfix 048
. Q. A% f9 P8 k  O$ k( f% ?1969192 SYSTEM_CAPTURE     CANVAS_EDIT   Pin Numbers of Discrete Symbols visible
; ^8 ^0 N, ^8 \, W: t5 k- D1982368 SYSTEM_CAPTURE     CANVAS_EDIT   System Capture switches to Auto Pan, even if the option is disabled, in the Notes mode
1995012 SYSTEM_CAPTURE     CANVAS_EDIT   Connect lines do not move with components
1907992 SYSTEM_CAPTURE     CONNECTIVITY_ Draw stubs is not respecting stub length setting.
1960100 SYSTEM_CAPTURE     CONNECTIVITY_ Moving components after routing failure:  connect lines do not move resulting in disconnected route
* m! y! _- K& P6 j( Z. R( ^( }1988284 SYSTEM_CAPTURE     CONSTRAINT_MA Log files and topology files are being stored at the top-level design (CPM) folder level
/ t/ J4 l, o* M6 |+ {1996039 SYSTEM_CAPTURE     COPY_PASTE    Cut and Paste change the pin numbers for connector after saving design.
1951700 SYSTEM_CAPTURE     EXPORT_PCB    System Capture: Export Physical - Change Directory UI entry block not displaying properly
' |' N( }0 q( U3 D1970761 SYSTEM_CAPTURE     EXPORT_PCB    Cannot import System Capture netlist if PCB Editor is launched with -proj argument
+ @0 Q& d% D0 l! w1997533 SYSTEM_CAPTURE     IMPORT_PCB    Pins do not swap in System Capture on backannotation
1910962 SYSTEM_CAPTURE     MISCELLANEOUS Dragging GND symbol placed on a pin sometimes disconnects the GND symbol
  a7 R- t5 I* Y7 z, X  ^: R1962037 SYSTEM_CAPTURE     TABLE_OF_CONT Table of content link number not same as page number in the title block
1986317 TDA                SHAREPOINT    Cannot enable Design Management and SSO session expires

7 H! `4 g; l& T  H
, z1 M- B4 I5 @, P: N: y# hFixed CCRs: SPB 17.2 HF049
11-16-2018
; W% B- K) t% ?2 b/ O% x========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
2 J; T* A: c1 r; K- N2002642 ADW                ADWSERVER     Exception in adwserver.out with LDAP enabled
; ~- Z; j" G% ~" C. a2007046 ADW                ADWSERVER     Component Browser is not connecting to server in hotfix 048
9 |  f5 ^+ }6 J3 ~4 H1997678 ADW                DBEDITOR      Model not deleted due to missing cell model relation
, l# B2 o" ^# z) y( w" k1985059 ADW                FLOW_MGR      Flow Manager issues warning about project path that contains a period, removes from catalog file
* w" y8 ?+ u: i8 L5 B# P1991515 ADW                FLOW_MGR      Flow Specific Tools: Launch error after upgrading to Hotfix 044 and extending code
1972762 ADW                PART_BROWSER  The Schematic Models icon does not match the definition in EDM Component Browser
1830062 ALLEGRO_EDITOR     DATABASE      Uprevving release 14.0 design with stand-alone DBDoctor in release 17.2-2016 crashes; works in release 16.6
1980161 ALLEGRO_EDITOR     DATABASE      NODRC_ETCH_OUTSIDE_KEEPIN assigned to text in library part is not passed to PCB Editor
2003757 ALLEGRO_EDITOR     DATABASE      Open circuit not detected by PCB Editor: reports unconnected pin as connected
2009748 ALLEGRO_EDITOR     DFM           PCB Editor crashes on Update DRC
6 d( _% s9 ]/ j( H$ X" C$ @1796895 ALLEGRO_EDITOR     DRC_CONSTR    Increase precision of Inter Layer Spacing check
1997487 ALLEGRO_EDITOR     DRC_CONSTR    Cannot add teardrops to some pins
! ^* _2 W/ b+ [6 m" j  W1857024 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashes on using funckey 'y FORM mini padstack_list -+'
% u( ~: i, [. t2 {) ]& L, ^1979750 ALLEGRO_EDITOR     INTERFACES    axlStepSet not working for component definitions
1988168 ALLEGRO_EDITOR     MANUFACT      Graphical Compare in productivity toolbox terminates with errors
1982233 ALLEGRO_EDITOR     SCHEM_FTB     Netlist files cannot be imported into board as the process is not finishing
, j5 J( Z! g' ~; f0 ^2 q# C2000367 ALLEGRO_EDITOR     SCHEM_FTB     Cross-probing between OrCAD Capture and PCB Editor does not work in HotFix 048
& x) k* t1 Q' I( M( [' W2000397 ALLEGRO_EDITOR     SCHEM_FTB     Cross-probing not working with hotfix 048
9 G8 z, W* p) m% q+ q2000552 ALLEGRO_EDITOR     SCHEM_FTB     Cross-probing is not working if we are importing Netlist from PCB Editor
2001165 ALLEGRO_EDITOR     SCHEM_FTB     Cross-probing between Capture - Allegro PCB Editor fails after hotfix 048
1 t; t/ J$ K% T) k6 x  X$ k# ~' r, D2002635 ALLEGRO_EDITOR     SCHEM_FTB     Cross-probing issue because of Unique MPS Session in HotFix 048 (QIR7)
2004252 ALLEGRO_EDITOR     SCHEM_FTB     Cannot do cross-probing between Capture and PCB Editor
2004305 ALLEGRO_EDITOR     SCHEM_FTB     Inter-tool communication is not working properly in PCB Editor release 17.2-2016, hotfix 048
9 y9 X" T$ k# Z1 L9 A0 n1978660 ALLEGRO_EDITOR     SHAPE         Static shape on dynamic shape issue: thermals not removed when component is moved
1985035 ALLEGRO_EDITOR     SHAPE         Thermal reliefs not removed on moving parts
  B6 Y4 |# Q3 F1960966 ALLEGRO_EDITOR     SKILL         Stackup import is not working in release 17.2-2016 via automation
3 p% @2 Q2 ?! J1 A2003651 ALLEGRO_EDITOR     UI_FORMS      Error on starting and loading footprints in hotfix 048: message about customExtended and customState
# x# H; y3 X& t2 I0 Y) |2003810 ALLEGRO_EDITOR     UI_FORMS      OrCAD layout editor font size is too small for almost all UI
2003832 ALLEGRO_EDITOR     UI_FORMS      Error on loading footprint in hotfix 048: custom toolbar cannot be loaded due to registry problem
) H. _0 h/ p0 s/ G3 W, ]; V* z2004769 ALLEGRO_EDITOR     UI_FORMS      Custom toolbars cannot be loaded as the size of customState and customExtended differs in registry
2007669 ALLEGRO_EDITOR     UI_FORMS      Broken scalability between OrCAD PCB Editor and Allegro PCB Editor
1987164 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor stops responding when multiple sessions are accessing third-party tool
1983512 ALLEGRO_PROD_TOOLB CORE          Allegro Productivity toolbox: Advanced Testpoint Check is not working
% ?  ~5 M# m0 Z0 y1996008 APD                3D_CANVAS     New 3D Canvas does not work in APD
) I$ \( u# B% }0 _8 ^6 j/ X+ e1993698 APD                SHAPE         APD stops responding and database is corrupted on moving, deleting, or updating a symbol
% u# T/ [# ^9 c* b7 j; o$ ]% q1999446 CAPTURE            OTHER         Update symbol database in Trial
8 g* R$ J  Y% ?$ M7 [! V, X9 ?1962222 CONCEPT_HDL        CORE          Nested hierarchy block RefDes transfer issue: suffix added to RefDes
. x. h5 l& t/ h( ^0 O) m1964260 CONCEPT_HDL        CORE          RefDes not updated in a hierarchy block on repackaging release 16.6 design
% M$ Q- s# F; o- b" f+ o0 ]1972243 CONCEPT_HDL        CORE          Version filter does not work correctly
1993448 CONSTRAINT_MGR     DATABASE      CSet is duplicated with same name when modified in SigXplorer
( T: T# B6 J/ [# H: {3 e1976148 CONSTRAINT_MGR     INTERACTIV    DRC worksheet in Allegro PCB Editor: 'Go to Source' flickers worksheet and does not switch
4 z$ I0 g! _* I8 l1948372 CONSTRAINT_MGR     UI_FORMS      cmDiffUtility fails to compare and gives the message 'Failed to read the configuration file'
1961750 EAGLE_TRANSLATOR   PCB_EDITOR    Voids and some shapes of third-party board not translated correctly
/ u% [1 I1 e6 ^1 v1984569 FSP                DECAP         When a pin function is in an interface or custom connector is changed, decaps defined for the part is deleted
1984588 FSP                DECAP         FSP crashes when changing pin functions or bank settings for a connector
/ |" d  e( {4 ]1984590 FSP                DECAP         FSP design fails to load if pins are defined with a pin function that is later changed in custom_connector.crf
1985555 PCB_LIBRARIAN      IMPORT_EXPORT JavaScript exceptions on opening libraries converted using con2cap
% ?2 J. F* m& m+ r: f1961944 PCB_LIBRARIAN      SYMBOL_EDITOR Hide symbol outline in new Symbol Editor
" z* k' J$ K6 ^1 M" l/ L; ~1967532 PCB_LIBRARIAN      VERIFICATION  libimport fails with ERROR(SPDWPAR-102): Metadata has the ErrorStatus value set.
: C1 @' Q2 o# u1976965 PSPICE             SIMULATOR     PSpice 'Tools - Generate Report' not working in release 17.2-2016
1982260 RF_PCB             FE_IFF_IMPORT Unable to successfully pull in .IFF file created in ADS.
1981585 RF_PCB             LIBRARY       Cannot load RF symbol via2 into PCB Editor
1976845 SIG_EXPLORER       OTHER         CPW trace models do not solve in SigXplorer after changing some trace parameters
$ o3 R7 D8 Y# d9 Z, H( @$ t, q1986466 SIG_INTEGRITY      OTHER         Delay in Relative Propagation Delay worksheet is displayed as a negative value
- R+ M0 u8 F: m) A8 Y, S1980264 SIP_LAYOUT         INTERACTIVE   SiP Layout crashes on running 'Manufacture - Documentation - Display Pin Text'
1983381 SIP_LAYOUT         REPORTS       Incomplete Design Summary Report
5 B( V, Z' m* C. {2005709 SIP_LAYOUT         SHAPE         Dynamic shape voiding around same net cline segment: no property attached
2008064 SIP_LAYOUT         SHAPE         Hotfix 048 (QIR 7): Shape creates void for same net cline, it should be shorted
" r6 I2 `8 Q; \4 G( G1980967 SYSTEM_CAPTURE     CANVAS_EDIT   System Capture does not reflect part symbol changes
1988928 SYSTEM_CAPTURE     CANVAS_EDIT   Changing version 2 of the resistor part makes the PART_NUMBER property visible
1990215 SYSTEM_CAPTURE     CANVAS_EDIT   Draw Multiple Bits: Bits do not follow mouse smoothly
1972658 SYSTEM_CAPTURE     EXPORT_PCB    Modified injected properties do not get updated in the pstchip.dat file after running Part Manager and Export Physical
" k  d' I$ o1 c# w! y$ t4 k8 Y; I1989421 SYSTEM_CAPTURE     EXPORT_PCB    Part Manager does not update the PTF values
1992407 SYSTEM_CAPTURE     PART_MANAGER  Part Manager removes part properties and main window and details window updates are inconsistent

* G4 L  j6 O  n
Fixed CCRs: SPB 17.2 HF048
0 o: P% C7 g% i8 C+ `10-13-2018
. N; U7 G: u8 r/ g5 c2 e: S  F5 W========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
9 I2 n' i6 }( J, Q# h3 v8 V========================================================================================================================================================
5 U; v  N" s% Z! ?7 V& w, C1913039 ADW                ADWSERVER     EDM Library Server exits with error message on starting library server service
9 x3 J1 h6 m- h. i) N. l1709155 ADW                COMPONENT_BRO Search query does not search for all the parts in the library
1827231 ADW                COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL
" d: E: o6 `4 L; R8 T$ p1903818 ADW                COMPONENT_BRO Parts that have comment_body do not display version
' G1 X5 e; R0 b6 b9 k; W% M1917961 ADW                COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter
3 t7 x' ^3 U' ]' z1938172 ADW                COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
1914103 ADW                CONF          conf creates incorrect path in fetch_dump.ini when MLR is enabled.
1 _. J, @+ [) {1911422 ADW                DBADMIN       RuleP101 - PACK_TYPE check against schematic model not working
1926691 ADW                DBEDITOR      Adding a new classification and immediately trying to delete it results in errors
; ~. L4 y( r- T  E; {# P5 T( K5 n1926694 ADW                DBEDITOR      Renaming a classification and then renaming it back to the original results in error
9 l" G, \( N3 S* @; [- h/ `1934870 ADW                DBEDITOR      Adding a new classification and immediately trying to delete it results in errors
1872387 ADW                DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
1254292 ADW                FLOW_MGR      Flow Manager Open Last Project should open last project closed
1281817 ADW                FLOW_MGR      '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
( j- x( H* v& T0 d# I' _5 Z1727286 ADW                FLOW_MGR      Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers
1875498 ADW                FLOW_MGR      EDM fails to open or becomes unresponsive.
" {+ ~, A8 U% q# w9 f" k1879386 ADW                FLOW_MGR      Unable to access COS with the default Firefox version in the 17.2 installation
) _8 T; i! b! e3 A) r1922541 ADW                FLOW_MGR      Warning message for unavailability of Java version appears on opening a project on Linux
3 e) K0 t: Z" R- w' P3 j1945451 ADW                FLOW_MGR      Checklist does not work with two-byte characters
% b; c1 v5 H- ~/ Q; M" N1956213 ADW                FLOW_MGR      Not able to invoke Flow Manager on the remote system
% b% E6 }% d; i1892285 ADW                LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library
& l  E* j2 L$ v" ^1961731 ADW                LIBIMPORT     libimport fails to create tar for two Capture models
( r0 J$ j0 C' g8 W# q; S1836620 ADW                LRM           Library Revision Manager crashes on clicking Help
$ u# i/ x" k0 z1 n% u# g9 }1961845 ADW                PART_BROWSER  Error regarding environment variable
, i, Q: i8 e# y; ~% E& e1890782 ADW                TDA           Launching TDO dashboard connected to PLM returns a license error
1980914 ADW                TDA           Cannot start Design Entry HDL and Component Browser in a TDO design
2 z. r% ?* F, o) p7 R2 @& e1833750 ALLEGRO_EDITOR     3D_CANVAS     Soldermask Text is not shown in 3D Canvas
5 ~$ s" ^4 @! p/ k5 g! P1891230 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas Viewer not bending PCB with proper radius
1913338 ALLEGRO_EDITOR     3D_CANVAS     STEP models missing from exported .stp file
# z" I8 c0 F7 q1927507 ALLEGRO_EDITOR     3D_CANVAS     Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas
1931508 ALLEGRO_EDITOR     3D_CANVAS     Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
1943060 ALLEGRO_EDITOR     3D_CANVAS     Placebound bottom is not showing correctly.
1950099 ALLEGRO_EDITOR     3D_CANVAS     Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
1988307 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
1923585 ALLEGRO_EDITOR     ARTWORK       Additional unwanted subclasses appear in film control when a new film definition is added
1944079 ALLEGRO_EDITOR     COLOR         Export of Board Parameters (Net Colors) does not contain entries for nets with spaces
1856320 ALLEGRO_EDITOR     DATABASE      Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.
1912313 ALLEGRO_EDITOR     DATABASE      Database corrupted during background process
1913344 ALLEGRO_EDITOR     DATABASE      When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
1914470 ALLEGRO_EDITOR     DATABASE      Release 17.2-2016: export libraries command does not inherit posi/nega information
' U; H+ v1 |1 n7 R- ]! s! M1932086 ALLEGRO_EDITOR     DATABASE      Unable to resolve DBDoctor error
1963932 ALLEGRO_EDITOR     DATABASE      DB Doctor is not recognizing placed parts and showing them as unplaced.
6 ^; G5 J& q8 b) M" u* k1987735 ALLEGRO_EDITOR     DATABASE      Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist
1977622 ALLEGRO_EDITOR     DFM           Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count
1892809 ALLEGRO_EDITOR     DRC_CONSTR    NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
1894765 ALLEGRO_EDITOR     DRC_CONSTR    DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin
, R) P( g! B  Z+ M& g8 I. p. r- }2 w% n1896627 ALLEGRO_EDITOR     DRC_CONSTR    Moving components takes long time while doing placement
8 i3 E$ A2 h9 N: ?+ T" X1914591 ALLEGRO_EDITOR     DRC_CONSTR    Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
1956468 ALLEGRO_EDITOR     DRC_CONSTR    DRC getting generated while moving the uvia and getting removed after updating DRC.
9 Q' V9 X$ l% L1884149 ALLEGRO_EDITOR     EDIT_ETCH     Arced Routing of differential pair creates unexpected arc radii
7 q2 J" n: h7 a1 _- h/ v0 l1891985 ALLEGRO_EDITOR     EDIT_ETCH     Etch edit does not follow the constraints
1860056 ALLEGRO_EDITOR     GRAPHICS      PCB Editor crashes on right-click after choosing the Move command
1860723 ALLEGRO_EDITOR     GRAPHICS      APD crashes on right-click when using the Move command
. b; N' L3 ~1 _1 h1870058 ALLEGRO_EDITOR     GRAPHICS      PCB Editor crashes when using Place Manual -H command
1930282 ALLEGRO_EDITOR     GRAPHICS      PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
& d! R$ \+ g  f4 y7 ^1882813 ALLEGRO_EDITOR     INTERACTIV    Unable to set the end point with 'snap pick to' when adding an arc
& l! E; i0 @8 q* J& |: h6 t/ V% z1884725 ALLEGRO_EDITOR     INTERACTIV    Edit and Move vertex operation not working as desired
4 a& V4 o( ^8 ^8 N! ?0 R1902359 ALLEGRO_EDITOR     INTERACTIV    Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode
1909004 ALLEGRO_EDITOR     INTERACTIV    Parameter description showing wrong for Padless Holes under Design Parameter Editor
1912055 ALLEGRO_EDITOR     INTERACTIV    PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query
1 P- ~1 n" f; a$ ]( a) Z1924503 ALLEGRO_EDITOR     INTERACTIV    Editing shape causes PCB Editor to crash
/ c" Y- Y0 p' V0 I/ b, t1929614 ALLEGRO_EDITOR     INTERACTIV    Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.
  N$ g! `$ ]9 j5 W0 j4 F1938523 ALLEGRO_EDITOR     INTERACTIV    Change Shape Type message is same for dynamic and static shapes
1940827 ALLEGRO_EDITOR     INTERACTIV    Irrelevant/incorrect warning message when doing Edit- Change on Clines
1872653 ALLEGRO_EDITOR     INTERFACES    DXF export shows embedded layers in the layer configuration file
1873971 ALLEGRO_EDITOR     INTERFACES    IDX proposal comments are not shown when importing the IDX file into Allegro
1892172 ALLEGRO_EDITOR     INTERFACES    STEP Package Mapping form needs to be larger
1893311 ALLEGRO_EDITOR     INTERFACES    A line became two lines after import dxf
1937816 ALLEGRO_EDITOR     INTERFACES    Unit as % in Property Definition not supported by SubDrawing
+ y) g: y& N8 |9 D' t/ M& J: l1973084 ALLEGRO_EDITOR     INTERFACES    Physical library not placed if design and IDF database not matched while running
0 G: H5 w0 u5 G8 H8 |; S1987526 ALLEGRO_EDITOR     INTERFACES    IDX import Fails to recognize SURFACE FINISHES Class
1872856 ALLEGRO_EDITOR     IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
9 ^, w1 I0 O6 u+ L7 \4 P1900832 ALLEGRO_EDITOR     IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly
1935641 ALLEGRO_EDITOR     IN_DESIGN_ANA Return path DRC crashes PCB Editor
* s( m: Q; c& u" W( u1649465 ALLEGRO_EDITOR     MANUFACT      Manufacturing options are not visible in OrCAD PCB Designer legacy menu
5 k" ~- u( A1 M  G+ M1873417 ALLEGRO_EDITOR     MANUFACT      Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
1911596 ALLEGRO_EDITOR     MANUFACT      Documentation Editor drill chart shows two different rows for the same slot.
7 M' W+ W; Q) Q  g' ]" L1937721 ALLEGRO_EDITOR     MANUFACT      Drill figure character scaled up in GERBER
  j( F* G' @; [1 q1957768 ALLEGRO_EDITOR     MANUFACT      Import IPC2581 on cross-section does not import line width and impedance
1969363 ALLEGRO_EDITOR     MANUFACT      Pressfit connector backdrill depth is considering MNC Layer
9 D! r* B  o" c: t# O  B0 P- t1891102 ALLEGRO_EDITOR     MULTI_USER    Rejected by server error messages when using Symphony Team Design
1928082 ALLEGRO_EDITOR     MULTI_USER    Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.
1976705 ALLEGRO_EDITOR     MULTI_USER    Symphony client disconnects from server without any notification - despite ping mechanism
1972554 ALLEGRO_EDITOR     NC            Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present
1 q. R5 E# N% p; ~1914412 ALLEGRO_EDITOR     OTHER         Autosilk lines do not clear padstacks that are not rectangular
1921933 ALLEGRO_EDITOR     PAD_EDITOR    column clearance cannot reset to 0 in padstack editor
# q! N. `4 P0 {  V7 r0 Y1922234 ALLEGRO_EDITOR     PAD_EDITOR    DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined
1932183 ALLEGRO_EDITOR     PAD_EDITOR    Drill Symbol information not exported in Padstack XML if Drill Figure in none
1934880 ALLEGRO_EDITOR     PAD_EDITOR    Shapes with offsets not displaying properly in Padstack Editor views
1813270 ALLEGRO_EDITOR     PLACEMENT     When a place replicate module is updated, the vias used in thermal pad are removed
% q8 g: K# A3 u! O1840275 ALLEGRO_EDITOR     PLACEMENT     Placing component with the Mirror option causing display problems
" P! N" y' E9 s& U6 p/ s+ x1854099 ALLEGRO_EDITOR     PLACEMENT     Align components to zero spacing causing mirrored components to overlap
7 O- u- A3 }6 R- G1854696 ALLEGRO_EDITOR     PLACEMENT     Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
: O5 p- J5 Z  G+ H- R& Y1862863 ALLEGRO_EDITOR     PLACEMENT     Too many messages in the command window when symbol does not support mirroring
4 F/ q! h  I/ |6 P2 {* H1909857 ALLEGRO_EDITOR     PLACEMENT     Using Mirror with Alt Symbol placement displays incorrect graphics
  d* K7 s. b, F- C+ Z1917128 ALLEGRO_EDITOR     PLACEMENT     Place - Autoplace - Room when all the components of the room are placed on board causing crash
1925144 ALLEGRO_EDITOR     PLACEMENT     PCB Editor stops responding on using the Autoplace - Room command
1961509 ALLEGRO_EDITOR     PLACEMENT     PCB Editor crashes on choosing Place - Autoplace -Room
1930669 ALLEGRO_EDITOR     REPORTS       Net 'VSS' not included in the Etch Length By Pin Pair Report
1982934 ALLEGRO_EDITOR     SCRIPTS       PCB Editor stops responding if Generate button is used to create script from journal file
4 y* u3 ~' l& s6 |. w& T1337346 ALLEGRO_EDITOR     SHAPE         Shape Check is generating problem point errors that seem unnecessary
) c* R) P" Z# G/ y1396692 ALLEGRO_EDITOR     SHAPE         Zcopy with expansion not following board outline
1902001 ALLEGRO_EDITOR     SHAPE         Shape behaving differently across hotfixes
1921287 ALLEGRO_EDITOR     SHAPE         3D canvas is showing some stray objects
. {& M4 A5 w" U) @! b1936482 ALLEGRO_EDITOR     SHAPE         Option for Fillet to not obey NO_SHAPE_CONNECT Property
5 s2 v' j0 `$ f- Z# H& b$ G1943899 ALLEGRO_EDITOR     SHAPE         Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
1944041 ALLEGRO_EDITOR     SHAPE         shape_rki_autoclip makes shape voiding incorrect
1947675 ALLEGRO_EDITOR     SHAPE         Shape void error when dv_squarecorners is enabled
1949250 ALLEGRO_EDITOR     SHAPE         Shapes are filled even after raising and lowering priority
1984526 ALLEGRO_EDITOR     SHAPE         Same net shape voided is inconsistent with respect to vias
. \! N; B5 G2 z" J- Q6 c' Q1984955 ALLEGRO_EDITOR     SHAPE         Dynamic shape creating same net spacing drcs.
1839147 ALLEGRO_EDITOR     SKILL         axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments
& @' M/ B" I# ~  Y1882776 ALLEGRO_EDITOR     SKILL         SKILL documentation for axlIsBetween() is wrong
3 A4 r+ f# a$ z9 j: P5 D- n: k4 ~" g1882882 ALLEGRO_EDITOR     SKILL         Example for axlMathConstants needs correction in Allegro SKILL Reference
' v! I+ W- U% Q: d" {8 b+ |8 [1902712 ALLEGRO_EDITOR     SKILL         axlAltSymbolReplace moves symbol to the top of design while replacing
1906329 ALLEGRO_EDITOR     SYMBOL        Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board
' i4 l. O; g7 E3 S  ~" S8 T9 d: z1911343 ALLEGRO_EDITOR     UI_FORMS      Global Visibility not turning all layers off
1985584 ALLEGRO_EDITOR     UI_FORMS      Import logic changes the Current Working Directory
1987829 ALLEGRO_EDITOR     UI_FORMS      Import logic changes the current working directory
0 `. F" T2 P1 R$ n1992722 ALLEGRO_EDITOR     UI_FORMS      After netlist import process, the board file is changing its current path
1697506 ALLEGRO_EDITOR     UI_GENERAL    Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
( q8 A1 n; I  K0 d5 j; F' Z1702631 ALLEGRO_EDITOR     UI_GENERAL    Etch Length by Net report does not list correct net name for nets in a bus
& T0 f% R% A5 q+ \( U) A$ r" J1703105 ALLEGRO_EDITOR     UI_GENERAL    Bus net names are incorrect in reports when using the allegro_html_qt variable
) F2 Y, l& c5 {0 Q! t; r% }+ A6 a1770786 ALLEGRO_EDITOR     UI_GENERAL    Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
1784938 ALLEGRO_EDITOR     UI_GENERAL    Etch Length by Net report does not show net names with angle brackets in release 17.2-2016
: f: B. `5 @( M3 y  Y1822557 ALLEGRO_EDITOR     UI_GENERAL    axlUIWCloseAll is not closing text window in release 17.2-2016
1836400 ALLEGRO_EDITOR     UI_GENERAL    Net names are truncated in HTML reports
1869879 ALLEGRO_EDITOR     UI_GENERAL    Links not working in the Net loop report
1895878 ALLEGRO_EDITOR     UI_GENERAL    axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
1912282 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor exits with error message on editing objects
1913962 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
1933172 APD                UI_GENERAL    Cannot paste text into the command prompt without clicking when 'enable_command_window_history'  is set
& Y' m/ Q) l1 s( T4 x2 d& z. o1843712 CAPTURE            NETGROUPS     Signals shown only for first segment of NetGroup
1917768 CAPTURE            NEW_SYM_EDITO Missing package pin overview in Symbol editor
1920088 CAPTURE            NEW_SYM_EDITO Package view missing in the new Symbol Editor
* I' W; ^, i, w) ?% Z, T2 H' J1922196 CAPTURE            NEW_SYM_EDITO Snap to grid issue in Symbol editor
1927268 CAPTURE            NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions
1928012 CAPTURE            NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out
6 a; h- |+ i# a1930865 CAPTURE            NEW_SYM_EDITO View Package missing in hotfix 038
1938507 CAPTURE            NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
# L9 Q1 Y- @0 |! y, l( R1940869 CAPTURE            NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution
9 |) G- D+ z7 R1940888 CAPTURE            NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.
1942994 CAPTURE            NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid
6 u9 C% D9 ^2 m: Y1944396 CAPTURE            NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'
% c1 t% ]% O1 b& ^7 C1950224 CAPTURE            NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.
( q+ v( [! e& n6 B& o6 F1951369 CAPTURE            NEW_SYM_EDITO Cancel closes Symbol Editor
# k- F6 f* N2 r; P2 u" U! L1966785 CAPTURE            NEW_SYM_EDITO Edit Part is grayed out
. ~" y% N  e  o( [2 Q1 \1973135 CAPTURE            NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins
1973344 CAPTURE            NEW_SYM_EDITO JavaScript error on opening part from design
1974122 CAPTURE            NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor
1983593 CAPTURE            NEW_SYM_EDITO Script error on copying and pasting to property sheet
1929692 CAPTURE            OPTIONS       PACK_SHORT issues with Pin Numbers that contain letters/alphabets
) ^4 O5 u5 `  D. |& R1876939 CAPTURE            OTHER         Incorrect Capture renaming error (ORCAP-1310)
' |, m  h; ~4 r* T: G6 |1916090 CAPTURE            OTHER         Incorrect error message when 'save as' fails due to long directory path
0 `" j9 H, d) y7 q0 n. p1921927 CAPTURE            OTHER         Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038
1946453 CAPTURE            OTHER         Shift+R shortcut is assigned to two functions.
1965456 CAPTURE            OTHER         Shortcut Shift + R is not opening the Independent Sources dialog box
. O  k" W7 T' U: ?1968757 CAPTURE            OTHER         Close CIP is grayed when right-clicking on the tab in Capture.
1938437 CAPTURE            PART_EDITOR   OrCAD Capture new Symbol Editor Pin Type missing in table
1906757 CAPTURE            SCHEMATICS    Intersheet reference is overlapping with the offpage connector name
1867016 CAPTURE            SCHEMATIC_EDI Part placeholders not being positioned when moved
1932837 CAPTURE            SCHEMATIC_EDI Parameters graphics are not correctly positioned
1949518 CAPTURE            SCHEMATIC_EDI Getting error when comparing designs
/ m5 o/ R, H2 Z3 ]" _' m* e1967545 CAPTURE            SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D
0 }( R$ \& Z9 N. `' L% Z3 g# S0 r. }1933919 CIS                DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
* Q- C& k, {2 a8 x1932550 CIS                RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
1832524 CONCEPT_HDL        CHECKPLUS     Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
1912023 CONCEPT_HDL        CHECKPLUS     signalWidth predicate does not recognize SIG[1..0] as bus.
1966120 CONCEPT_HDL        COPY_PROJECT  Copying release 17.2-2016 project results in message stating the project is of an older version
6 |8 U' N1 s( W. \) ]/ Y6 Z" @1879425 CONCEPT_HDL        CORE          Adding signals with the right-click menu is not following the defined color scheme
1890542 CONCEPT_HDL        CORE          Getting ERROR(SPCOCN-1911) when running export physical with backannotation
1907684 CONCEPT_HDL        CORE          Moving symbol makes canvas unresponsive for a long time
' H' O1 z- u- H/ y+ K' y, b1920711 CONCEPT_HDL        CORE          Pin names changes when mirroring the swapped section.
1931421 CONCEPT_HDL        CORE          On Linux, 'cpmaccess -read' returns incorrect value
1931782 CONCEPT_HDL        CORE          Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
1932433 CONCEPT_HDL        CORE          _movetogrid causes signal disconnection
1946993 CONCEPT_HDL        CORE          DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
6 O2 @+ M5 w# D: J1947029 CONCEPT_HDL        CORE          Design Entry HDL Font Support not working for signal rename
2 ^1 M' N$ p3 `3 K  E8 `1962865 CONCEPT_HDL        CORE          Schematic symbol creation with '-' as pin name not packaging
; E+ i; l* }; M; c0 x: [1966805 CONCEPT_HDL        CORE          Issues with packaging design containing cells named with a leading underscore
1967760 CONCEPT_HDL        CORE          DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
1968282 CONCEPT_HDL        CORE          DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
: Q4 `# h0 a: W2 N1972815 CONCEPT_HDL        CORE          Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option
. \/ m, l' G: P6 ?* x) |- U1887790 CONCEPT_HDL        CREFER        CRefer links not working in selected cpm file
% u1 [# j, w1 @, l1898535 CONCEPT_HDL        INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1
1888048 CONCEPT_HDL        PDF           Japanese characters are not output correctly to PDF on Linux.
1937505 CONCEPT_HDL        PDF           Missing intersection dot in schematic PDF
1942486 CONSTRAINT_MGR     CONCEPT_HDL   CM crashes when you save after importing a TCF file
1983743 CONSTRAINT_MGR     CONCEPT_HDL   Region Class-Class members are being duplicated in CM in the current session
5 [' r5 t  z+ w! |4 S- e1906573 CONSTRAINT_MGR     ECS_APPLY     Database corrupt and DBDoctor reports illegal database pointer error
- p) l3 C* D# n  w1913805 CONSTRAINT_MGR     OTHER         Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash
1914813 CONSTRAINT_MGR     OTHER         C++ Runtime error and non-recoverable crash in class-class worksheet
1920142 CONSTRAINT_MGR     OTHER         Xnet names are not consistent in the design
1898549 CONSTRAINT_MGR     SCHEM_FTB     Importing netlist causing crash in release 17.2-2016, hotfix 036
1814851 CONSTRAINT_MGR     UI_FORMS      Field solver /DRC check running forever
1889862 CONSTRAINT_MGR     UI_FORMS      PCB Editor hangs while assigning net voltages in CM
5 O) w6 X- R: {  O5 y1965470 CONSTRAINT_MGR     UI_FORMS      Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode
- B$ Q6 ]2 K. T+ d1945406 ECW                ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.
% M& s+ L4 Y5 D, V1 c# m( F' x3 Z5 n! ~1826848 ECW                METRICS       SPDWECW-551 and SPDWECW-553 should be warnings, not errors
! c/ w5 E3 x8 V, m5 M! f, A; v( c: {1933373 ECW                PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users
1921502 F2B                PACKAGERXL    Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
6 C5 Y( Y" @- X" `1929846 F2B                PACKAGERXL    PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016
2 Y' _' I8 l# y) v( M6 [1953780 F2B                PACKAGERXL    Updated subdesign package information not updated on the top-level design in the reuse flow
% P7 [5 @& |) r1971738 F2B                PACKAGERXL    Deleting blank space from pstxnet.dat file crashing DE-HDL
1891002 INSTALLATION       DOWNLOAD_MGR  Issue with Download Manager (Change Preferences Option does not Work)
; W- w5 I1 t. a9 a/ V' _8 Y1972890 ORBITIO            OTHER         OrbitIO-APR failed to run if PCB design included
1954262 PCB_LIBRARIAN      CORE          Footprint model check in fails with verification checks failed error
/ e/ T7 H) L0 b, f7 G2 U1 Q1943656 PCB_LIBRARIAN      GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file
- r( r( c% ~  X1 g7 R1897887 PCB_LIBRARIAN      SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer
& z% ~: Q" O2 y( m! f7 a+ D5 x1898003 PCB_LIBRARIAN      SYMBOL_EDITOR Issue with Page Border Symbol
1842007 PSPICE             LIBRARIES     Change required in swit_reg.lib
, G, S: K- F/ Y. K' f- c5 w1906922 PSPICE             LIBRARIES     Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
2 v6 n4 _* k; p' R  b# w& O1947586 PSPICE             LIBRARIES     Update the model AD8138/AD in ANLG_DEV.OLB
3 a/ b& q$ X5 Q1748470 PSPICE             MATLAB        PSpice displays an error when sending current in co-simulation
1802455 PSPICE             MATLAB        Incorrect current direction for pins in SLPS flow
1852811 PSPICE             MATLAB        ORPSIM-2604 being reported in SLPS simulation
) w3 M7 |; r$ b) F) G& P$ B0 T! r1858716 PSPICE             MATLAB        Co-Simulation fails if 'RC' is used as reference of resistor
1921641 PSPICE             MODELEDITOR   Model Editor in Client Server installation slow to invoke
# O+ m- Z! o& s. j$ Q1922160 PSPICE             MODELING_APPS New Capture Associate Symbol GUI not reading libraries
1843698 PSPICE             PROBE         PSpice icons appear very small on a specific computer
1773841 PSPICE             SIMULATOR     orSimSetup64 crashes when running the simulation for attached design
1816316 PSPICE             SIMULATOR     Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
1887119 SCM                IMPORTS       Cannot selectively update changes in VDD
2 q: b# A; e0 _3 Z$ J% I; u1889362 SCM                IMPORTS       Cannot selectively update changes in Visual Design Differences
1958545 SCM                SETUP         Auto assign models does not work in SCM same way as in DE-HDL
. c, d  G# w- v% u3 o% G" k1988841 SIG_EXPLORER       INTERACTIV    SigXplorer stops responding or crashes in hotfix 047 when a design is saved
1988943 SIG_EXPLORER       INTERACTIV    SigXplorer crashes on selecting Update Constraint Manager
% g/ q2 y; x7 u% {$ F6 h0 A1991375 SIG_EXPLORER       INTERACTIV    SigXplorer crashes when clicking Save
1993749 SIG_EXPLORER       INTERACTIV    SigXplorer crashes on saving topology
& @1 @0 Z) S* s3 o  u1969975 SIG_INTEGRITY      GUI           Model Browser edits model above the one that is selected
: k% F- ]7 L$ r+ ], I1953184 SIP_LAYOUT         IMPORT_DATA   Sub Drawing not saving dashed lines
3 p6 y# [, C; o1 f) L  x1913864 SIP_LAYOUT         ORBITIO_IF    SiP Layout design import results in wrong die rotation
, }( Z0 o4 Y: t6 _8 y: J1880237 SIP_LAYOUT         PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
) u( G2 J: N- U/ c0 Q6 p1972560 SIP_LAYOUT         STREAM_IF     GDS Export fidelity issue: inverted arcs
1920317 SIP_LAYOUT         THIEVING      Thieving pattern does not allow for OOPS operation
1909075 SYSTEMSI           DOC           SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s
1916101 SYSTEMSI           DOC           Lack of stimulus in file causes Serial Link Analysis to become unresponsive
/ u6 `% A! i: w' k4 R6 l1919562 SYSTEMSI           ENG_PBA       SystemSI generates wrong timing bathtub curves in channel simulations for write and read
: s" F/ z2 ?0 k  m1964064 SYSTEMSI           GUI_PBA       Able to sweep AMI parameters in SSI-PBA
, R( r! n# P; i! ]1971266 SYSTEMSI           GUI_PBA       MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file
1885625 SYSTEMSI           GUI_SLA       Manage AMI + DLL from Setup Analysis Window
1924382 SYSTEMSI           GUI_SLA       Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation
1982341 SYSTEM_CAPTURE     CANVAS_EDIT   Signal rename does not maintain new signal name value
, g' i  y- B7 W& J% |1976857 SYSTEM_CAPTURE     CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly
1929606 SYSTEM_CAPTURE     DESIGN_CORRUP Opening design causes System Capture to crash
" b/ W- T3 P& N; h1914697 SYSTEM_CAPTURE     DRC           Overlapping component DRC does not work
1973467 SYSTEM_CAPTURE     IMPORT_PCB    System Capture Import Physical shows many component and physical differences on a design that is synced up
" k* x4 c' |3 z9 A9 _  b1962603 SYSTEM_CAPTURE     NAVLINKS      Ability to not underline hyperlinks for Navigation Link values
1967639 SYSTEM_CAPTURE     PART_MANAGER  Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
1964388 SYSTEM_CAPTURE     SMART_PDF     Some shapes are not visible in the smart PDF schematics
8 Q! c) b/ H9 }0 t4 [& w9 s1976832 SYSTEM_CAPTURE     TDO           Rolling Back local lower-block requires check-out of higher-level packaged & variant views
' W8 Y7 d* v" r+ u1976844 SYSTEM_CAPTURE     TDO           CM - TDO check-out dependencies are broken
1976859 SYSTEM_CAPTURE     TDO           Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
0 P! l" R& X% x1839816 TDA                CORE          All the design objects are locked in the EDM dashboard after a DSFrame error
1889898 TDA                CORE          Cannot check in the top level of the project in TDO
1892411 TDA                CORE          Unable to undo the block checkout if something fails
1877757 TDA                DEHDL         Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL
# k6 G& e: n5 D' W$ U( L5 X

: l$ f# }( J4 j  {& O% RFixed CCRs: SPB 17.2 HF047
) O- W! v7 \% s& j  S09-9-2018
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
# c- [: C; |1 o0 e1969527 ADW                LIBIMPORT     Getting  java.lang.NullPointerException error on bulk import in hotfix 044
1976219 ALLEGRO_EDITOR     DATABASE      .SAV file not created although message states it is created
  S* G& X9 B  u/ i  N( O% v- S1968270 ALLEGRO_EDITOR     DFM           PCB Editor crashes when running DRC
- y$ \5 P- b! k& a% A) q  V2 Q1978421 ALLEGRO_EDITOR     DRC_CONSTR    False DRCs between via and its fillet shown after editing shape boundary
; v0 M" U2 f* L; P1 h; o% h% V2 ?5 u1966772 ALLEGRO_EDITOR     PAD_EDITOR    PCB Editor and DBDoctor crash on editing DRA file: Found bad pointer, run dbdoctor
1973866 ALLEGRO_EDITOR     SHAPE         PCB Editor crashes when deleting a group
* j, H' [) ^1 Q6 V$ o1818779 ALLEGRO_EDITOR     UI_FORMS      Dialog box goes behind main window on clicking PCB Editor canvas
1880175 ALLEGRO_EDITOR     UI_GENERAL    Multiple sessions of PCB Editor gets mixed up in Linux in release 17.2-2016
1946027 ALLEGRO_EDITOR     UI_GENERAL    Arrow Keys in Canvas stop responding after changing the view.
5 G# a4 ?9 \0 Z% a: V6 O1 x1967701 ALLEGRO_EDITOR     UI_GENERAL    Arrow Key panning does not work when third-party SKILL call is active
1967706 ALLEGRO_EDITOR     UI_GENERAL    Observe Special Characters when command is run
  @, L/ \6 a2 D" \: i" P  F1971183 ALLEGRO_EDITOR     UI_GENERAL    Focus is lost from command line when Save icon is used
1971186 ALLEGRO_EDITOR     UI_GENERAL    Focus from Command line is lost when using CTRL + N
1971190 ALLEGRO_EDITOR     UI_GENERAL    Focus from Command line is lost when using CTRL + Alt
3 B. j  T+ Y( J/ x1971200 ALLEGRO_EDITOR     UI_GENERAL    Focus is lost in comand line when you save using command save
1961833 APD                SHAPE         Crash when changing dimension of existing via padstack in the design
1968256 ASDA               EXPORT_PCB    SDA crashes directly after Export to PCB
1970284 ASDA               EXPORT_PCB    Placing part crashes SDA

. c- @; Y- W+ r. c, z3 v* T
Fixed CCRs: SPB 17.2 HF046
1 Y6 f+ E+ N0 R! q& H% z$ M% K  k- K08-24-2018
# f3 `! x' b  ~% x========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
2 A2 M  [4 Q) U4 [+ D; G$ d1880800 ADW                PART_BROWSER  Server connection failure on a running SDA session.
1880895 ADW                PART_BROWSER  NCB - components missing from the component browser
1962336 ALLEGRO_EDITOR     INTERFACES    Smart PDF shows both top and bottom probe layers for a film layer with only a single probe layer (top or bottom)
; ]" a9 H  ^; C1 s1955128 ALLEGRO_EDITOR     MANUFACT      Need to close PCB Editor to delete xsectionChart.log generated on placing a cross-section chart
1969088 ALLEGRO_EDITOR     SHAPE         PCB Editor crashes on updating shapes to smooth
1963828 ASDA               DESIGN_EXPLOR Unwired schematic block movement with text is not correct
& t' Y- @0 Q( }! c+ K1954426 ASDA               OPEN_CLOSE_PR Double-clicking to paste a note crashes SDA
1965423 ASDA               OPEN_CLOSE_PR Crash when working with notes in SDA
4 J* B- A' d+ z( |7 b$ M1 N/ B( L1960060 ASDA               PART_MANAGER  Original property differences not displayed in Part Manager on selecting a new part from CB and doing reset
1960112 ASDA               PART_MANAGER  Part Manager incorrectly updating part property values
" X7 L5 g7 [0 a7 ?- r1955723 ASDA               ROUTING       Draw Multiple Bits misses bit 0 when in reverse order.
% [$ t/ E9 R' ~+ N: E1 r; j2 t1952963 CONCEPT_HDL        CORE          Variant Editor takes a long time to load
, z8 `) P  I( z9 p; L1962568 CONCEPT_HDL        CORE          Directive DEHDL_BROWSER_FILEPATH does not work
" \" l; d' @/ H. U1939192 PCB_LIBRARIAN      SYMBOL_EDITOR pin_text size and location very different between DE-HDL and Symbol Editor resulting in text overlap
# M' t7 }* }/ v1952967 SCM                OTHER         Error while copying a release 17.2-2016 design: message says design created in release 16.3 or an earlier version
1948999 SPIF               OTHER         Some place_keepout shapes and antipads not exported
9 h4 G+ U* P! i! s8 Q  e4 q2 I. A9 v

Fixed CCRs: SPB 17.2 HF045
/ r% G6 s0 G5 D7 ^4 S/ t08-10-2018
========================================================================================================================================================
5 @0 D6 ?% u/ |- ]" Y) i* \2 aCCRID   Product            ProductLevel2 Title
% r0 x  q0 R( A7 P7 G* M& H========================================================================================================================================================
1934956 ADW                DBEDITOR      Footprint missing from part in release 17.2-2016
1945005 ADW                DSN_MIGRATION Right side of Migration dialog box is cut off
) p, @3 C/ |- p9 ?% q; j% d' F8 S1933245 ADW                FLOW_MGR      'Open last Project' button should open the last opened project
( c9 }5 u, P. i6 n1953210 ADW                LIBDISTRIBUTI Library Distribution is not distributing all symbols. No errors for the missing schematic models.
1953727 ADW                LRM           LRM missing two symbols when migrating from release 16.6 to 17.2-2016
1952923 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes on trying to delete layer
1957171 ALLEGRO_EDITOR     DATABASE      Pastemask offset not working when creating a symbol that requires two top-paste masks
$ f( v5 N+ I6 j3 F2 ^1 u1960059 ALLEGRO_EDITOR     DATABASE      Stackup definition causes custom script to crash
1932864 ALLEGRO_EDITOR     DFM           Exporting DFM Constraints losing the association to design level
1957467 ALLEGRO_EDITOR     EDIT_SHAPE    Compose Shape copies lines to wrong subclass
1938536 ALLEGRO_EDITOR     GRAPHICS      Multiple crashes on different boards after installing hotfix 040
/ r8 M# f) y  p8 V1954075 ALLEGRO_EDITOR     SHAPE         Dynamic Crosshatch shapes should be clipped inside RKI if RKI Autoclip is enabled
/ m3 P6 D4 T3 l3 \1957803 ALLEGRO_EDITOR     SHAPE         Wrong dynamic shape status
1949923 ALLEGRO_EDITOR     UI_GENERAL    Focus lost from command window when any command is active
1963245 ALLEGRO_EDITOR     UI_GENERAL    Alias behaves as Funckey in release 17.2-2016, hotfix 044
# g0 r3 E8 s5 ]1 f: Z1892126 ALLEGRO_PROD_TOOLB CORE          Clines disappear and then reappear suddenly on using Route - Shield Generator
1931127 ALLEGRO_PROD_TOOLB CORE          ZDRC not working for Xhatch Shape
$ x5 G, h+ r4 E8 W- D1932563 ALLEGRO_PROD_TOOLB CORE          allegro_legacy_board_outline environment variable not set in PCB Design Compare.
1929855 ALLEGRO_PROD_TOOLB OTHERS        Outline not exported correctly for PCB design compare if Design_Outline and Cutout exist
1956494 APD                DATABASE      DBDoctor removes pads
1956291 APD                INTERACTIVE   axlSpreadsheetSetStyleProp should accept 0 and 1 as Boolean values for protection style
1960127 ASDA               ARCHIVER      Using the Tcl command 'archiveproject' crashes SDA
1953718 ASDA               CONSTRAINT_MA SDA Import Pin Delay fails with extra columns, does not explain why
  F5 i  y& g  T8 t  P; p* A- i4 `, }" l1924498 CAPTURE            SCHEMATIC_EDI Cannot place part 'B' for heterogeneous part if 'Preferences - Miscellaneous - Auto References' not set
1927129 CAPTURE            SCHEMATIC_EDI unable to place heterogeneous part section directly from place part window
, X9 i: p; |9 z1 @% P+ V# E; S0 X# I1928255 CAPTURE            SCHEMATIC_EDI Unable to place a specific section from Place Part
* N( P6 Y8 o4 D1 S0 {6 M" o* G1945207 CAPTURE            SCHEMATIC_EDI Part selection pull-down reverts to part '1|A' when placing heterogeneous part
/ m  v/ Y( p! r% ?% A1945661 CAPTURE            SCHEMATIC_EDI Section drop-down in Place Part window is not working
1958121 CAPTURE            SCHEMATIC_EDI Preview and placement of sections of Heterogeneous parts is not correct in New Symbol Editor
1956535 CONCEPT_HDL        CORE          DE-HDL crashes on Import Pin Delay for a CSV file
* R, {. w; A; h+ n/ G) ^1960922 CONCEPT_HDL        CORE          DE-HDL crashes on moving netgroup on Windows 10
# s1 _3 \7 s3 c6 B( u8 @1964016 CONCEPT_HDL        CORE          In DE-HDL moving around nets connected to Netgroups causes crash on Windows 10
- L# j) k' s1 P1907040 F2B                PACKAGERXL    Export Physical output board file name reverts to old when changing options
1957862 ORBITIO            ALLEGRO_SIP_I allegro2orbit failed to translate rounded rectangle padstack


Fixed CCRs: SPB 17.2 HF044
$ d) }2 v& ?. z07-27-2018
========================================================================================================================================================
  A, p3 D/ ]8 s* s9 K$ GCCRID   Product            ProductLevel2 Title
6 ~( u/ Q8 @8 J& W$ ]  E========================================================================================================================================================
1943727 ADW                DBEDITOR      EDM DBEditor: Cannot check in/out schematic model symbols with many linked parts
1800630 ADW                FLOW_MGR      Support spaces in design directory path on Windows
1951052 ADW                LRM           LRM stops responding on project update and removes parts from design
8 N% O2 U  \7 F$ s1 B& E0 T1891428 ADW                PART_MANAGER  Resistor turns into a capacitor when placed
- Y& L2 h7 m/ ^" Y1945194 ALLEGRO_EDITOR     3D_CANVAS     3D Viewer crashes when opening from board file.
& ?1 i4 f0 b5 z; e. p/ x0 ?1935558 ALLEGRO_EDITOR     INTERFACES    Exported STEP file missing components when viewed in free STEP viewer
& }) K/ C8 k- S. d& M3 b1 Q6 Y3 a* w1945640 ALLEGRO_EDITOR     MULTI_USER    Symphony client disconnects from server without any notification
: |- [( {: X2 {- S4 J5 Z; n  Y1948454 ALLEGRO_EDITOR     MULTI_USER    Window DRC stops responding when run in Symphony
9 }( s. N) ]9 E2 _6 O1946619 ALLEGRO_EDITOR     SHAPE         Pin/via with suppressed pad on shape layer and thermal connection type of none should void to drill hole.
1946708 ALLEGRO_EDITOR     SHAPE         Same net hole to shape voiding is incorrect.
6 m' e& F. q# |( T6 l' X+ h1952213 ALLEGRO_EDITOR     SHAPE         Shape voiding from Thru Via when the via regular pad is not completely drilled out by Backdrill hole is not consistent
1889433 ALLEGRO_EDITOR     UI_GENERAL    Command window shows result at the end of a command rather than showing dynamic updates
1933503 ALLEGRO_EDITOR     UI_GENERAL    Extra click required to enable command window
1943692 ALLEGRO_EDITOR     UI_GENERAL    Funckey commands are not working
, K0 L* h  b7 T6 f2 V" b/ Q+ G1945914 ALLEGRO_EDITOR     UI_GENERAL    Mouse focus lost in the command console when doing an 'undo' from the toolbar icon
1945920 ALLEGRO_EDITOR     UI_GENERAL    Focus lost from command window when the toolbar is used for any operation
1949922 ALLEGRO_EDITOR     UI_GENERAL    Focus lost from command window after save or even autosave
1947551 ALLEGRO_EDITOR     WIREBOND      PCB Editor crashes in wirebond edit mode
1935722 ALLEGRO_PROD_TOOLB OTHERS        Panelization: Cannot place parts after migrating design from release 16.6 to 17.2-2016
7 Q& d- J9 K, t3 O2 f# h1951511 APD                REPORTS       The result of Metal Usage Report is incorrect.
; m: N& N1 k# x8 s- Z' @/ @1952942 ASDA               GRAPHICS      Need metric (mm) support in grids in SDA
1948122 ASDA               TDO           If user ID has uppercase characters in teamassignmenttemplate.xml, TDO fails to join a project
1931199 CONCEPT_HDL        COPY_PROJECT  Stop hard coding Copy Project license inside EDM
1938153 CONCEPT_HDL        OTHER         Component Browser stops responding on replacing and modifying components
% b# z" p- H: Q0 F$ }; u: G1770601 CONCEPT_HDL        PDF           Wire Pattern set to two-dot chain line not shown in PDF
" d4 f/ o6 R9 X# w2 p1791175 PCB_LIBRARIAN      CORE          Allow baseline of cells with pins at symbol origin: change error to warning
1922238 PCB_LIBRARIAN      CORE          Unable to check in into EDM Server due to con2con error SPLBPD-323 - Origin on pin connection point
5 g0 J7 h. r" E( u& a1936812 PCB_LIBRARIAN      GRAPHICAL_EDI New Symbol Editor: Wrong text being updated when editing text after copy and paste
0 L" i4 e( V1 T' U6 H0 C3 H: M5 R1804159 PCB_LIBRARIAN      SYMBOL_EDITOR Copy and paste of pins in new symbol editor: issues with pin name, rotation, and move
4 Z3 i$ G% D9 ~- R: i! A; N1927422 PCB_LIBRARIAN      SYMBOL_EDITOR Symbol outline not updated correctly in the new default graphic editor in Part Developer release 17.2-2016
1939272 PCB_LIBRARIAN      SYMBOL_EDITOR Symbol Editor changes origin to bottom left, outline to invisible, shows rectangle with center rectangle at new origin
: c! t+ \. k6 v) Q1928076 RF_PCB             DISCRETE_LIBX dlibx2iff does not work with managed libraries and library-level PTF
. X, o4 N" a3 B; u2 y) K1929574 RF_PCB             DISCRETE_LIBX Discrete Library to third-party Translator does not populate the Available Parts section correctly
1850360 TDA                CORE          TDO crashes while changing the root design
1934388 TDA                SDA           SDA TDO crashes on attempting to check in a 'New Block in Shared Area'
3 t7 S8 X' ?/ E+ ^
6 I7 [4 i. E2 y6 ]
Fixed CCRs: SPB 17.2 HF043
07-13-2018
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
% y4 F5 ]( p$ Z: E0 b* e========================================================================================================================================================
1935813 ADW                DBEDITOR      Auto merging of DE-HDL and Capture Classifications is not working
1935834 ADW                DBEDITOR      Some DE-HDL only classifications are removed during the CSV merge process of libimport
' v1 g0 i' U! M- b" F& X1941570 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes or stops responding on performing 'Info' or 'edit properties' on select pins
1942536 ALLEGRO_EDITOR     DATABASE      Allegro PCB Editor fails to create backdrill plunges in Zone area
" Q4 M5 ?" Q$ \" M! ~1925899 ALLEGRO_EDITOR     DFM           PCB Editor crashes when placing components in Hotfix 039
1943113 ALLEGRO_EDITOR     DFM           Restore normal move/slide via performance when annular ring checking is enabled.
1940939 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashed on running the Gloss - Line and via cleanup tool
7 ?/ [- ]  u; f0 C/ M/ `5 E1937754 ALLEGRO_EDITOR     GRAPHICS      Text string disappears when selected during 'Edit - Text' if using PCB_CURSOR
9 i9 T! d+ v& E" \/ ^/ f1937056 ALLEGRO_EDITOR     INTERFACES    Cannot import IDX acceptance of third-party change to PCB Editor
! C) Z% }" I) R* r7 D  R: m$ K1940197 ALLEGRO_EDITOR     INTERFACES    PCB Editor crashes when reading IDX file from third-party
1940232 ALLEGRO_EDITOR     IN_DESIGN_ANA PCB Editor crashes when running Return path DRC
1916921 ALLEGRO_EDITOR     PLACEMENT     Property Pin_Global_Fiducial not inherited from symbol into board
1862241 ALLEGRO_EDITOR     REPORTS       In 'Summary Drawing Report', the listed quantity for HDI vias is incorrect under Drilling Statistics
1935448 ALLEGRO_EDITOR     REPORTS       Etch Detailed Length Report lists only one coordinate pair per trace
/ D) V( b0 i. ~% R; o% f, \1948322 ALLEGRO_EDITOR     SHAPE         Allegro hangs when axlPolyOperation api is called
1795564 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, focus is lost from command window after right-click
1919247 ALLEGRO_EDITOR     UI_GENERAL    Infinite cursor graphics issues on move: Cursor disappears and symbol image remains at old location till refresh
, l' T1 ]2 X* d9 D" \1919256 ALLEGRO_EDITOR     UI_GENERAL    Infinite cursor graphics issue: Symbol disappears during rotate
' z/ T1 i0 g8 h5 }3 @$ d1933526 ALLEGRO_EDITOR     UI_GENERAL    Panning is slow in PCB Editor in Hotfix 038
1933530 ALLEGRO_EDITOR     UI_GENERAL    Strokes are slower to respond in release 17.2-2016
1933536 ALLEGRO_EDITOR     UI_GENERAL    Third-party dialog stops responding on running commands
1782227 APD                DIE_GENERATOR Ability to specify rectangular shapes in die text in
1933011 ASDA               PART_MANAGER  Parts changed in library with new pin names are not reported or updated by Part Manager
1924529 CAPTURE            NEW_SYM_EDITO Global colors for pin name and number and part body not allowed in release 17.2-2016, Hotfix 038/039
1925846 CAPTURE            NEW_SYM_EDITO Opening library or component with special characters in path throws JavaScript exception
1928905 CAPTURE            NEW_SYM_EDITO Pin name justification, length, and casing incorrect for generated parts in Hotfix 038
2 N& i- T8 i: p1 v% \/ t) Y1928965 CAPTURE            NEW_SYM_EDITO Cannot move pins in Capture if Pin Name is missing
: ]0 {6 D6 c  A1932149 CAPTURE            NEW_SYM_EDITO JavaScript exception if path to part contains special characters in Hotfix 039
6 P/ H; H" z3 ?$ O0 A1936301 CAPTURE            NEW_SYM_EDITO Cannot edit symbol in new symbol editor: Displays parsing error (SPSMI-1)
% o# z3 G( I( R( f3 K& T1917172 CAPTURE            PART_EDITOR   Pin name rotating on schematic even when pin name rotate is off in symbol editor
2 a( a2 y! @1 U8 T& ^4 R1924456 CAPTURE            PART_EDITOR   Color preferences for pin, pin name, and pin number do not apply in part editor but only in schematic
1928872 CAPTURE            PART_EDITOR   Pin name locations are wrong and each needs to be placed manually
9 h1 M6 t4 E7 F0 k1929562 CAPTURE            PART_EDITOR   Changing pin name while adding a pin not intuitive in Symbol Editor
4 F, R# y6 n4 l# R% }1932732 CAPTURE            PART_EDITOR   Part Editor issue: Pin name selection box too long and text not justified in Hotfix 040
- u7 M- H! c; j1933523 CAPTURE            PART_EDITOR   Connection box does not appear after changing pin of a placed part in Hotfix 040
1936994 CAPTURE            PART_EDITOR   Error because of illegal characters in pin name and number and net name
3 D/ t* X1 Z% ~1943074 CAPTURE            PART_EDITOR   Pin names rotated in Part Editor not rotated when placed on page
1943078 CAPTURE            PART_EDITOR   Pin name rotate not working.
' j4 G  h' l/ {! k1 D  Y1945055 CAPTURE            PART_EDITOR   Pin names not rotated in schematic
1925700 CAPTURE            VIEWER        Pin numbers and text not shown during Variant View mode anymore.
1914437 CONSTRAINT_MGR     CONCEPT_HDL   Constraint Difference Report appears even though there is no difference in constraint.
1935152 CONSTRAINT_MGR     CONCEPT_HDL   Match Groups are not formed with the correct pin pairs
4 B) O& M: o( Y# x+ [" T/ x2 Z5 ^1940575 SIP_LAYOUT         ORBITIO_IF    Need new routing flow
1923722 SIP_LAYOUT         STREAM_IF     Use one symbol for all instances of a Via Structure

# X* Q; M$ W$ C5 H( ^
Fixed CCRs: SPB 17.2 HF042
06-22-2018
. O- [" t/ q: x" [========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
" b% M1 M# h9 ^) F, s& G" Z1922654 ALLEGRO_EDITOR     ARTWORK       Difference in board and Gerber display
1932714 ALLEGRO_EDITOR     COLOR         Manufacturing subclass NCDRILL_FIGURE missing from Color Dialog when editing .dra file
1932316 ALLEGRO_EDITOR     DFM           DFM constraint reporting wrong DRC between backdrill via hole to shape clearance under copper spacing
1914334 ALLEGRO_EDITOR     INTERFACES    Design Compare does not import some netlists created using Export - Netlist with properties from PCB Editor
1910213 ALLEGRO_EDITOR     MANUFACT      OrCAD PCB Designer shows Backdrill Status in Check - Design Status
7 Y  U, \" X0 n1933049 ALLEGRO_EDITOR     MANUFACT      NC Route seems to put all routed drills in the same .rou file regardless of what layer they are on.
1880576 ALLEGRO_EDITOR     PLOTTING      Extra lines appearing in plots that are mirrored
1881031 ALLEGRO_EDITOR     PLOTTING      Plot Preview with the Mirror option in the Plot setup creates fancy lines on shapes
1908005 ALLEGRO_EDITOR     PLOTTING      Plotting with mirror options set results in strange lines on the plot
( R  D% }0 A- O- B  Y$ c2 O- q1909530 ALLEGRO_EDITOR     PLOTTING      Use mirror function when plotting lines to design
! ^0 Q, ~0 D3 k/ @& Z1919405 ALLEGRO_EDITOR     PLOTTING      Printing with the mirror option results in arcs in Print Preview
1830419 ALLEGRO_EDITOR     SCHEM_FTB     Import Logic with 'Overwrite current constraints' deletes attributes from drawing
1935253 ALLEGRO_EDITOR     SHAPE         Compose shape command causes tool to stop responding
1571600 ALLEGRO_EDITOR     UI_GENERAL    File - Capture Canvas Image missing in release 17.2-2016
; U1 V' |& E! S- \' K7 {9 ~1650403 ALLEGRO_EDITOR     UI_GENERAL    Include Capture Canvas Image command in Allegro PCB Editor release 17.2-2016
& ]: k; D0 ?. N) z, H1710310 ALLEGRO_EDITOR     UI_GENERAL    'Capture Canvas Image' command is absent from the file menu in PCB Editor in release 17.2-2016
1718407 ALLEGRO_EDITOR     UI_GENERAL    Reintroduce the Capture Canvas Image command
1729699 ALLEGRO_EDITOR     UI_GENERAL    Capture Canvas Image is not present in release 17.2-2016
7 X: e6 ]1 G3 b- U, v% {7 E1753234 ALLEGRO_EDITOR     UI_GENERAL    Capture Canvas Image missing from the File menu
1754222 ALLEGRO_EDITOR     UI_GENERAL    Need command to capture view window as image in release 17.2-2016
4 B5 R* S# s6 I, o1794348 ALLEGRO_EDITOR     UI_GENERAL    Reintroduce Capture Canvas Image in PCB Editor in release 17.2-2016
1818610 ALLEGRO_EDITOR     UI_GENERAL    Restore the option to capture canvas image in PCB Editor in release 17.2-2016
1844591 ALLEGRO_EDITOR     UI_GENERAL    Reintroduce 'Capture Canvas Image' in release 17.2-2016
1869380 ALLEGRO_EDITOR     UI_GENERAL    File - Capture Canvas Image missing in release 17.2-2016
' w- j' E; a8 W/ t/ M, u/ R1889412 ALLEGRO_EDITOR     UI_GENERAL    Cross-probing between two boards in release 17.2-2016
1922329 ALLEGRO_EDITOR     UI_GENERAL    Add the 'Capture Canvas Image' command in release 17.2-2016
1932070 ALLEGRO_EDITOR     UI_GENERAL    File - Capture Canvas Image is missing in release 17.2-2016
1885594 ASDA               PACKAGER      Export to PCB Layout exits without reporting error when Netrev fails
  g, _5 {( U$ Y7 d/ x4 B1931657 ASDA               PACKAGER      Export to PCB Editor does not work for a project
3 S; j6 ^$ q; b" j" L& w; p1937757 ECW                METRICS       SDA metrics not getting collected
" z9 {& ?" P; w. s1934482 EMI                SETUP         EMControl function flow is not working correctly in release 17.2-2016
1931623 SIP_LAYOUT         EDIT_ETCH     Shapes are not updated and force update does not work

8 ]1 h4 Q- u" e* ~2 {
Fixed CCRs: SPB 17.2 HF041
# I; z' _: F: K6 U# ?: m06-9-2018
! ~( C5 c! K+ c( _9 }& C========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1880083 ADW                ADWSERVER     ALM fails to connect and authenticate LDAP server
+ G$ ]( p8 Y! p$ {1922218 ALLEGRO_EDITOR     3D_CANVAS     PCB Editor stops responding when 3D Canvas is opened for a symbol
1915838 ALLEGRO_EDITOR     DFM           Outline to non-signal geometry is not working for non-etch layers in design
) y* e$ V  z; e5 E) V4 m5 F3 n& ]1925263 ALLEGRO_EDITOR     DFM           False minimum spoke count DRC
1895486 ALLEGRO_EDITOR     INTERFACES    Importing IPF displays error regarding line being outside drawing extents (SPMHMF-409)
1927266 ALLEGRO_EDITOR     INTERFACES    Miniaturization license required when using enterprise licenses
1912186 ALLEGRO_EDITOR     IN_DESIGN_ANA Coupling analysis on one net takes a long time
$ @/ \$ Y' x7 n' z4 i5 T2 k1916015 ALLEGRO_EDITOR     NC            Improve the message for reporting unsupported characters in the directory path while generating NC Drill data
) D6 }+ B6 M% Q* D2 s1 f- p1926072 ALLEGRO_EDITOR     SHAPE         Dynamic shape to route keepout not voiding correctly
2 c# b# x0 B# L& l0 J- j. G# Y5 x1903202 ALLEGRO_EDITOR     UI_GENERAL    HTML report dialog does not handle relative links to files correctly
1880684 ALTM_TRANSLATOR    CAPTURE       Importing third-party schematic is not working in Capture
1870218 ALTM_TRANSLATOR    DE_HDL        Unable to translate a third-party design to DE-HDL
1881208 ALTM_TRANSLATOR    DE_HDL        Third-party to DE-HDL translation: schematic symbols missing all pins
- l) q  ~* W- o$ }$ B0 a1889909 ALTM_TRANSLATOR    DE_HDL        Third-party to DE-HDL and OrCAD Capture translator fails with error message or crash
1924375 ASDA               NEW_PROJECT   SDA new project path truncated at ellipses
1900957 ASI_SI             OTHER         axlLicDefaultVersion() in SKILL console crashes PCB Editor in release 17.2-2016 and works in release 16.6
1918499 CAPTURE            NEW_SYM_EDITO Text in new Part Editor is always left-justified and justification cannot be changed
1921505 CAPTURE            NEW_SYM_EDITO Error if property name starts with the less than character '<'
1924273 CAPTURE            NEW_SYM_EDITO Error if property name starts with the less than character '<'
" S+ l6 o4 q+ R: A. p" j/ a4 ~1924332 CAPTURE            NEW_SYM_EDITO Capture reports an error when editing pin numbers where names contain the less than character '<'
1934655 CAPTURE            NEW_SYM_EDITO Properties populated in older release show up blank in new Symbol Editor
  U' U2 _0 N2 E/ `# R1 h) k' B& b1855851 CAPTURE            OTHER         Crystal Reports not working in release 17.2-2016
1918048 CAPTURE            PART_EDITOR   Unable to modify pin type and shapes for multiple pins simultaneously in new Part Editor
1919459 CAPTURE            PART_EDITOR   Part Editor background display color is not consistent when zoomed out/in
/ o' P. J8 ^( i& E1920078 CAPTURE            PART_EDITOR   Option needed for updating pin type of multiple pins in the 'Edit all pins' menu
1922785 CAPTURE            PART_EDITOR   Cannot place pin array with zero in the suffix in Symbol Editor
1922831 CAPTURE            PART_EDITOR   Symbol Editor redraws when scrolling with non-default background and when zoomed out
1923772 CAPTURE            PART_EDITOR   Placing pin arrays results in error
9 q  ~1 D: y$ v) `1 T8 u1888897 CAPTURE            SCHEMATICS    Capture slowly redraws schematic page
) i+ W* S3 O. p8 \1910087 CONCEPT_HDL        CORE          DE-HDL crashes when adding Current Probe to a design
* H5 B9 S( K) c. P1930364 CONCEPT_HDL        CORE          SIGNAL_MODEL properties not deleted on importing release 16.6 DML design into release 17.2-2016 non-DML design
3 m6 y# T5 E. {# a! E1920716 CONSTRAINT_MGR     CONCEPT_HDL   Issue with the passing of physical and spacing CSets between Design Entry HDL and PCB Editor
1902591 ECW                OTHER         Flow Manager reports a digital certificate error when launched with Pulse
! ^3 u! Y# m- R1926029 PCB_LIBRARIAN      GRAPHICAL_EDI PDV Symbol Editor opens to a blank page in release 17.2-2016
. m& m; R$ H5 b8 v9 o7 H/ \1884694 PSPICE             ENCRYPTION    User-defined library encryption is not working as expected
& `$ b1 ^" c, l1927537 SIP_LAYOUT         ASSY_RULE_CHE SiP Layout crashes when running manufacturing checks on specific designs
+ M- q0 _; b. a! K7 _1 c1878733 SIP_LAYOUT         CROSS_SECTION Layer Function and Manufacture fields in Cross-section Editor are grayed out for soldermask layers in SiP Layout
1900628 SIP_LAYOUT         CROSS_SECTION Board thickness in Cross-section Editor does not change even after soldermask layers are added
! l& i5 Z5 d" `2 ^! m8 H

( C1 N  J! b" ?' v' l# }" sFixed CCRs: SPB 17.2 HF040
05-27-2018
5 q; K& H* |. T& j. |: s0 V& p3 A  o========================================================================================================================================================
! B4 e7 a/ J/ {0 E+ [2 I) @$ `1 P, b, mCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1924541 ADW                CONF          Designer Server configuration cannot be completed
1906973 ADW                DBEDITOR      Rename attribute fails to preserve values in affected parts
) A: l4 r8 c) ~" _% Q1718524 ADW                FLOW_MGR      FM: Find Projects does not find any projects when Project Path contains a period
1803310 ADW                FLOW_MGR      EDM Find Project no longer supports dot in the project path
. Q! B! R3 F4 t% O. v  P  u  [1916898 ADW                FLOW_MGR      Flow Manager does not recognize projects with a dot in the path
; t4 {2 ]3 D6 u8 g6 h* [" w1887669 ADW                LIBDISTRIBUTI ptfgen displaying Java errors
! V) B  V* r# S+ K  ?1897991 ADW                LIBDISTRIBUTI ptfgen fails with error LIBDIST-1062 in library distribution.
' ?! r2 I' A/ U$ ~) Z* X1915319 ADW                LIBDISTRIBUTI ptfgen should rerun with the -rewrite2db option automatically
+ `5 Q( g. K' d, \$ C& W1920309 ADW                LIBDISTRIBUTI Java exceptions in the ptfgen log file
4 c; d+ o8 x- a1914706 ALLEGRO_EDITOR     DFM           False Mask to trace DRCs
1912290 ALLEGRO_EDITOR     GRAPHICS      Infinite PCB cursor: symbol move results in symbol trail and disappearance of cursor and symbol
1927425 ALLEGRO_EDITOR     GRAPHICS      Infinite PCB Cursor disappear while moving objects on layout
# q0 p( }7 B& I1 J8 W# ^( r& y1908867 ALLEGRO_EDITOR     INTERACTIV    PCB Editor crashes in release 17.2-2016, Hotfix 036 and 037
& {& c7 m& k2 Y# j# G1906116 ALLEGRO_EDITOR     IN_DESIGN_ANA Allegro Integrated Analysis and Checking: Coupling vision shows the influence of voltage net
1918161 ALLEGRO_EDITOR     MULTI_USER    Symphony crashing and clients disconnecting from server cannot leave session, error applying DBupdate
1919467 ALLEGRO_EDITOR     MULTI_USER    Random crashes while routing design in Symphony
' {: B1 j+ q( z7 _. I& p4 m: f) E1918702 ALLEGRO_EDITOR     SHAPE         Differential Pair vias not voided in a split plane
1905109 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor randomly stops responding in release 17.2-2016 in Linux
& i. R4 }/ s- _, o1882365 ASDA               CANVAS_EDIT   SDA - body changes but not properties when changing version of a symbol
1900370 ASDA               CANVAS_EDIT   Version command in SDA should use placeholders from selected version
8 h; [' U  x0 a0 z+ q9 a0 m1901120 ASDA               CANVAS_EDIT   Choosing a different version of a placed component does not use the property placeholders as per the new symbol
: p/ f9 _" ]+ [& ?& X1907497 ASDA               GRAPHICS      DNI Cross Mark much larger than Components
1 E% y& n- Z$ a  B2 r6 g1 U3 y3 s1895135 ASDA               MISCELLANEOUS Design created in SDA has the cds.lib containing a pointer to worklib
: t4 @: Y  u- g$ R% }$ z. }$ ^8 o1895139 ASDA               MISCELLANEOUS Irrelevant warning related to worklib when running checkplus on SDA design
1920753 CAPTURE            LIBRARY       JavaScript exception reported on opening part with name containing '\' in hotfix 038
/ @5 ^3 C, Q9 e+ W7 Z1925848 CAPTURE            LIBRARY       New (QIR6) Symbol Editor has Script error / SR 600037969
1 A6 b2 J5 m- e2 `1916991 CAPTURE            NEW_SYM_EDITO New part/symbol editor ignores grid color set in Preferences
1917090 CAPTURE            NEW_SYM_EDITO New symbol editor goes into permanent pan mode on clicking the middle mouse button
1918041 CAPTURE            NEW_SYM_EDITO Saves As for symbol in library from new symbol editor saving 0 byte files
1918497 CAPTURE            NEW_SYM_EDITO Moving multiple items using the arrow keys results in error in new part editor
/ W& D9 _- A! }8 F: V$ c' I1918711 CAPTURE            NEW_SYM_EDITO Unable to do a Save As from a Library part to change the name
" Z) |+ u: W% {0 T1920889 CAPTURE            NEW_SYM_EDITO Unable to edit symbol with name containing '/'
1922123 CAPTURE            NEW_SYM_EDITO Save As for symbol in library from new symbol editor saving 0 byte files
# v8 B1 n& a  Z! q1922276 CAPTURE            NEW_SYM_EDITO Space between pin name and pin for names having bar
6 y% a& K4 B7 D1922282 CAPTURE            NEW_SYM_EDITO JavaScript exception on closing new part editor window using keyboard shortcuts
4 I+ l. n" k- {1 `1923526 CAPTURE            NEW_SYM_EDITO Unable to "Save As" in new symbol editor.
- C2 n* c2 D, B$ Q) Y- B1927262 CAPTURE            NEW_SYM_EDITO The File > Save As command in version 17.2-s038 differs from earlier versions
( [/ G" |$ c! z* H1919322 CAPTURE            PART_EDITOR   JavaScript exception on opening parts and creating new part using right-click
9 {2 E' P8 g2 C! g0 V1 D1914183 CONSTRAINT_MGR     XNET_DIFFPAIR ECSet fails to map in PCB Editor but maps fine in DE-HDL
  H- @' t4 z% ^1 ~1908102 ECW                DASHBOARD     Some lines in Design Dashboard in Pulse are grayed out
1914812 F2B                PACKAGERXL    Hierarchical variable not evaluated
* ^/ h" q( A! b+ c# c2 V9 P1639231 PSPICE             ENVIRONMENT   Remember last location in simulation settings
( v) ]& S/ u, {8 }1 _1804391 PSPICE             ENVIRONMENT   Libraries with uppercase extension (.LIB) not retained if added using 'Add to Profile'
$ l4 Y5 \# K( I, y1879915 PSPICE             ENVIRONMENT   Check points cannot be loaded from a directory with space in its name
* |. {4 m8 ^* }8 Y. ~. Z1695306 SIP_LAYOUT         STREAM_IF     SiP Layout - Stream out issue: Embedded or stacked components using pad reference in more than one layer
, k( c$ w% F& n& s
3 K3 ~% N/ b/ {
Fixed CCRs: SPB 17.2 HF039
05-11-2018
1 p3 b5 s& I: S: c3 c4 j========================================================================================================================================================
# a+ c/ K4 s* d" W9 J6 w5 wCCRID   Product            ProductLevel2 Title
! ^5 R4 M% r+ e6 n========================================================================================================================================================
* _. j$ u1 K5 D1915149 ADV_PKG_ROUTER     OTHER         Auto-connect fails to initialize when rats are selected, but works with bundle
1870109 ADW                ADW_UPREV     Most mandatory properties turned into optional properties following database uprev
7 j9 _5 E1 ^9 Z% X, V4 P1758396 ADW                CONF          Server Memory setting in setting.ini is lost if server is re-configured using Conf
0 l9 I: H- l3 l- b1911591 ADW                FLOW_MGR      Flow Manager does not start on high latency (> 25ms) networks: displays Java Content Disabled dialog
1887861 ADW                LIBIMPORT     Library Consolidation reports front2back issues but does not provide information about the issues.
1778977 ADW                REPORT_GENERA reportgen memory setting too high in release 17.2-2016 resulting in launch failure
1900422 ADW                REPORT_GENERA Save in reportgen does not save Preferred Part List entry into .rep file
1903888 ADW                REPORT_GENERA Report generator not outputting values as expected for PPL field
1916903 ADW                REPORT_GENERA Reportgen -gui is not producing the expected result
1902184 ALLEGRO_EDITOR     DATABASE      Add connect in package symbol crashes PCB Editor when using the 'clearance_view' variable
1914793 ALLEGRO_EDITOR     DATABASE      Updating shape crashes Allegro PCB Editor
1905138 ALLEGRO_EDITOR     DRC_CONSTR    Max Via count DRC disappears on running DRC update
1848015 ALLEGRO_EDITOR     MANUFACT      Export Creo View cannot find the webpage on the PTC site
% v3 q% k) U7 Z5 e1850553 ALLEGRO_EDITOR     MANUFACT      'File - Export - Creo View' is not working
1 u/ N) ^" V2 Y' K1853960 ALLEGRO_EDITOR     MANUFACT      PTC Creo Interface link is broken
1862305 ALLEGRO_EDITOR     MANUFACT      PTC Creo interface link is not working
1878682 ALLEGRO_EDITOR     MULTI_USER    Delay in Symphony server session when server is started from Allegro PCB Editor
1890108 ALLEGRO_EDITOR     MULTI_USER    Database rejections in Symphony
4 C5 p) A- S5 U1887331 ALLEGRO_EDITOR     NC            Milling (NC route) in Gerber tools is not the same as what it is in the board.
1898179 ALLEGRO_EDITOR     RAVEL_CHECKS  PCB High-Speed option required for high-speed rules when Venture license is selected
1461142 ALLEGRO_EDITOR     SHAPE         Pin with nearly-tangent via fails to generate void in dynamic shape, results in short.
" v* o& f5 ]$ m  y% A3 W. {2 G$ @1863467 ASDA               CROSSPROBE    Highlighting all parts in PCB Editor does not highlight all parts in SDA
# Z# H; g% S6 E0 H1910974 ASDA               CROSSPROBE    Cross-probing between SDA and PCB Editor does not work
5 D2 ]6 T9 ]1 q+ C1904440 CONCEPT_HDL        CORE          SPCOCD-577 error on migrating from release 16.6 to release 17.2-2016
* I* G3 P/ z+ ~! ]5 ]" a* N1 B# y1909611 CONCEPT_HDL        CORE          DE-HDL stops responding on running '_movetogrid' and clicking 'No'
1808743 CONCEPT_HDL        PDF           Inconsistent display of Publish PDF hyperlinks
1894868 CONCEPT_HDL        PDF           XREFs getting clipped in the Published PDF
' Y5 _+ n) }5 M* i+ ]9 L# B9 ?; G1911676 CONSTRAINT_MGR     CONCEPT_HDL   DE-HDL Constraint Manager crashes on selecting ECSet and then creating pin-pair option
1913968 CONSTRAINT_MGR     CONCEPT_HDL   Match Group pin-pairs are not created on applying ECSet to differential pair
; d! N9 T- d' a& C3 u( N  [1899638 CONSTRAINT_MGR     XNET_DIFFPAIR Differential pair buffer models are extracted differently in release 17.2-2016 and release 16.6
0 F. u$ V8 _- S' X1 @; Y1914116 ORBITIO            ALLEGRO_SIP_I Unable to import OrbitIO file to SiP Layout
* G! z; e% H! z9 }' H1896487 PCB_LIBRARIAN      GRAPHICAL_EDI Use lower-case characters for notes and pin text in New Symbol Editor
3 b  y- w; u/ L; w* R, ]  o# W1898008 PCB_LIBRARIAN      SYMBOL_EDITOR Styling is not available for custom shape and pins.
1644787 PSPICE             FRONTENDPLUGI PSpice Model Search window does not show complete library path
5 z2 x" k& b: \  J* f( Z1785939 PSPICE             FRONTENDPLUGI PSpice Part Search library browser should display path of the library directories
- y& |' x, `3 j$ I% [0 s6 p1855867 PSPICE             FRONTENDPLUGI PSpice Model Search window does not show complete library path
, |7 u: A* X- m0 M1887016 PSPICE             SIMULATOR     Pseudotran should always be invoked first time in case autoconvergence is ON
" V5 H" B% L- f1895752 SIG_INTEGRITY      OTHER         Layout Cross Section: Wrong Differential Impedance calculation (0 ohms) in RHEL Linux 7.1 or later versions
1895759 SIG_INTEGRITY      OTHER         Cross Section does not calculate correct differential pair impedance in Linux CENTOS 7 and gives 0 value
1909257 SIP_LAYOUT         INTERACTIVE   Error 'E- (SPMHGE-639): Copying component with bond wire is not allowed' when copying SMD symbols
9 a$ D9 L2 x- k* R! z1900970 SIP_LAYOUT         SHAPE         Shape does not void around SMD Pins and Vias inside pad
2 g5 p+ k, [  W) P6 D1885496 SIP_LAYOUT         SYMB_EDIT_APP Pin Numbering: different results for release 16.6 and 17.2-2016 for the same case.
- L, v; ^- W) h! R1907796 SIP_LAYOUT         SYMB_EDIT_APP SKILL commands fail to change pin number in SiP Layout
1887703 SIP_LAYOUT         WIREBOND      On trying to add wire bond to a die, SiP Layout crashes displaying a restart message
7 i& g+ S6 b0 Z! o1903081 SPECCTRA           LICENSING     PCB Router is failing in Linux 7.1 in release 17.2-2016
1721606 SPECCTRA           ROUTE         PCB Router stops responding on exit if opened in the stand-alone mode
1844366 SPECCTRA           ROUTE         Allegro PCB Router will not exit
1873716 SPECCTRA           ROUTE         PCB Router does not close if opened from Allegro PCB Editor or in the stand-alone mode
1907703 SPIF               OTHER         PCB Editor crashes on choosing 'File - Export - Router' in release 17.2-2016
% D- t+ K' ~" q2 c$ g- I1889059 VSDP               DIEEXPORT     Incorrect pin location if bump cell origin is not at lower left for rotation other than R0
3 K, e1 }. `$ j! p

Fixed CCRs: SPB 17.2 HF038
, {- P% ^+ `2 j; d7 ~6 x6 Z04-27-2018
& d9 g, X8 I& h- C  n' O========================================================================================================================================================
6 N8 A2 d# k& T5 M: I. B5 _CCRID   Product            ProductLevel2 Title
5 Q& U/ a, C& t2 Q========================================================================================================================================================
& c) D- O  V7 K* ~1861616 ADW                TDO-SHAREPOIN Team Design Option requires Allegro_ECAD_Collab_Workbench license feature
1784170 ALLEGRO_EDITOR     3D_CANVAS     Allegro 3D Canvas does not show the flex zone thickness correctly
1801053 ALLEGRO_EDITOR     3D_CANVAS     Moving component in 3D Canvas does not move the pads
1805038 ALLEGRO_EDITOR     3D_CANVAS     Soldermask and drill not refreshed when component is moved in 3D Canvas, or on the board with Canvas open
1808579 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas displays annular ring incorrectly
1816732 ALLEGRO_EDITOR     3D_CANVAS     Mismatch in shape width between board and 3D Canvas
1 |. W% W, ^( M( T( K1822778 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas does not display nets when selection is done through click drag
6 ~1 c4 Q3 C  L1 L. ~/ X; `1 q3 A1838129 ALLEGRO_EDITOR     3D_CANVAS     User is not able to create a pastemask layer that is visible in 3D Canvas
& ~3 O5 g+ M( s! D$ M1842911 ALLEGRO_EDITOR     3D_CANVAS     Etch shapes not visible in the 3D Canvas when invoked from a symbol drawing
1849380 ALLEGRO_EDITOR     3D_CANVAS     Mirrored components placed in flex zones are not displayed in the 3D Canvas
; F' B) u2 e7 a1851898 ALLEGRO_EDITOR     3D_CANVAS     STL export from 3D Viewer scales it up by 100
( o' K; L1 b9 I: G* M1853378 ALLEGRO_EDITOR     3D_CANVAS     The new interactive 3D Canvas has a display issue with the off-centered drills.
# ?! X- _1 c. Y8 l; ^8 J1859713 ALLEGRO_EDITOR     3D_CANVAS     PLACE_BOUND shape with package_height_max and package_height_min set displayed incorrectly in 3D Canvas
1880073 ALLEGRO_EDITOR     3D_CANVAS     Design Outline is not displayed correctly in 3D Canvas
1880338 ALLEGRO_EDITOR     3D_CANVAS     Step Model missing in interactive 3D canvas.
3 Q* A8 N* c8 r1881889 ALLEGRO_EDITOR     3D_CANVAS     Changing the color of STEP model in STEP Mapping Window does not display this color in 3D Canvas.
1889861 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas swaps padstack from Bottom to Top
! f0 j+ V! C: ~" W' A- E5 E+ p1830749 ALLEGRO_EDITOR     ARTWORK       Gerber 4x and 6x output do not fill the shape
; z: j# Z3 b) f+ H! g0 j. F1848514 ALLEGRO_EDITOR     COLOR         axlVisibleDesign does not interact with wirebonds
1837388 ALLEGRO_EDITOR     CROSS_SECTION Cannot add solder mask to the site layer mask file
! {  ?+ J1 T0 Y1859797 ALLEGRO_EDITOR     CROSS_SECTION The Report only option does not work when choosing Setup - Cross-section - Import - IPC2581
1877858 ALLEGRO_EDITOR     CROSS_SECTION Dynamic Pads Suppression option is not working correctly
1880093 ALLEGRO_EDITOR     CROSS_SECTION Unused Pad Suppression options are not working correctly and are reset on opening cross-section
1886283 ALLEGRO_EDITOR     CROSS_SECTION Unable to turn on 'Dynamic Unused Pads Suppression'
1890959 ALLEGRO_EDITOR     CROSS_SECTION Dynamic Pads Suppression option is not working correctly
- V9 \  |4 V1 Q* j7 j& i1900397 ALLEGRO_EDITOR     CROSS_SECTION Dynamic Unused Pad Suppression option in Cross-section not working at one go.
1905315 ALLEGRO_EDITOR     CROSS_SECTION 'Dynamic Unused Pad Suppression' cannot be turned on.
1861406 ALLEGRO_EDITOR     DATABASE      Refresh symbol for flex zone not mapping padstack layers correctly
" [" L& D0 q, v6 E( o. m1877132 ALLEGRO_EDITOR     DATABASE      Fail to open #Taaaaed17598.tmp file and save database
1883747 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes on stackup modification
$ E" S; J8 R( h/ ^& H7 F1860238 ALLEGRO_EDITOR     DFM           Applying a DFF constraint set closes PCB Editor instantly
1872780 ALLEGRO_EDITOR     DFM           DFF false pin to via DRCs: Copper Spacing, SMD pin Pad to Thru Via pad
1823912 ALLEGRO_EDITOR     DRC_CONSTR    Thru pin to Thru pin DRC between Symbol Pin to Mechanical Hole (with NO regular pad)
3 K+ x1 ~# J. [1828168 ALLEGRO_EDITOR     DRC_CONSTR    Upgrading from release 16.3 to 17.2-2016: Differences in spacing constraints
1844780 ALLEGRO_EDITOR     DRC_CONSTR    Mechanical Pin to Shape Air Gap value is reduced when updating shape
! j( v( [' \& O% y1845011 ALLEGRO_EDITOR     DRC_CONSTR    When upgrading from 16.6 to 17.2, Spacing constraints for shape to mechanical pin not being resolved properly
1861548 ALLEGRO_EDITOR     DRC_CONSTR    Inconsistent Micro via to Micro via drill to drill overlap DRCs
9 |" L/ K4 ]/ r- k1862281 ALLEGRO_EDITOR     DRC_CONSTR    Mechanical Pin/hole to Shape spacing too small
1887145 ALLEGRO_EDITOR     DRC_CONSTR    Mechanical pin to conductor spacing setting is overriding constraint region in release 17.2-2016
8 W9 K+ I2 x# Z( a6 C1893012 ALLEGRO_EDITOR     DRC_CONSTR    Shape voiding not taking the shape to hole spacing rules for NPTH
/ }, T* {, |, ~6 q1906840 ALLEGRO_EDITOR     GRAPHICS      Context menu stays when PCB Editor is minimized.
1738624 ALLEGRO_EDITOR     INTERACTIV    'Invalid Sector' error when saving psm file for symbol that has die pads, which are copied
1800741 ALLEGRO_EDITOR     INTERACTIV    Search in User Preferences Editor is giving incorrect results
1812530 ALLEGRO_EDITOR     INTERACTIV    PCB Editor crashes when opening a file that is in an unsupported format
1812570 ALLEGRO_EDITOR     INTERACTIV    PCB Editor hangs when an invalid pin number value is specified as the rotation point in the symbol preselect mode
1826819 ALLEGRO_EDITOR     INTERACTIV    'Route - Resize/Respace - Align Vias' menu is not available
1842645 ALLEGRO_EDITOR     INTERACTIV    Via align command is missing from the menu path
1845748 ALLEGRO_EDITOR     INTERACTIV    With 'Shape - Change Shape Type' enabled, changing visibility reverts the Shape Fill selection to dynamic copper.
6 h% P4 P4 t$ B1 |$ J1849700 ALLEGRO_EDITOR     INTERACTIV    Add the reason for generating DBFIX_PAD, to the dbdoctor.log.
8 ]! y1 R6 M) G/ N( L. _1860934 ALLEGRO_EDITOR     INTERACTIV    Auto-Paste environment variable is not working as it should
- ~7 j8 s; v+ \) ~# F1861928 ALLEGRO_EDITOR     INTERACTIV    Provide a Persistent snap pick option for Display - Measure
1864238 ALLEGRO_EDITOR     INTERACTIV    Shape place rectangle issue: Dimension of placed rectangle changes on cancelling action
8 |. v' Y: u) L& ?& u# b3 y) }1877026 ALLEGRO_EDITOR     INTERACTIV    Filled rectangles on ETCH/TOP and ETCH/BOTTOM are not getting copied
1881637 ALLEGRO_EDITOR     INTERACTIV    Radius of Shape changes when trying to place circle using Place Circle mode.
2 Q, u. F/ \, w1883032 ALLEGRO_EDITOR     INTERACTIV    Find by Query does not find all padstacks in a symbol drawing
+ q- ]3 Y+ b5 E1855248 ALLEGRO_EDITOR     INTERFACES    The Technology Dependent Footprint command returns an error
8 K5 V4 @; q0 U6 E& R1885716 ALLEGRO_EDITOR     INTERFACES    Increase supported STEP model size to enable the use of models larger then 500MB
5 P. y" O: k! C* p' T; R$ w# z; y$ T1860835 ALLEGRO_EDITOR     MANUFACT      Display a message when backdrill_max_pth_stub is defined for vias or pins only
: l  T4 q; m3 o; U  T/ V* K  w: F1869528 ALLEGRO_EDITOR     MANUFACT      Backdrill out of date when deleting Teardrop and Sliding cline with Teardrop
1885672 ALLEGRO_EDITOR     NC            NC drill is creating false backdrills when repeat code is turned on in release 17.2-2016
1895084 ALLEGRO_EDITOR     NC            Padstacks with backdrill data trigger backdrill out-of-date even if the board is not set up for backdrilling
1837514 ALLEGRO_EDITOR     PAD_EDITOR    Offset is not consistent for keepout and mask layers in padstack editor.
1842902 ALLEGRO_EDITOR     PAD_EDITOR    Scrolling through the .pad files in the Library Padstack Browser displays Error(SPMHA1-161)
/ i2 Y* ~$ U/ w7 x1846504 ALLEGRO_EDITOR     PAD_EDITOR    COVERLAY_TOP definition lost while opening and saving a 16.6 pad in 17.2 padstack editor
1879453 ALLEGRO_EDITOR     PAD_EDITOR    The 'Y' tolerance in the Padstack Editor does not update when changing the units of the padstack.
1 A/ }1 I  u% h$ G1 A: I1805202 ALLEGRO_EDITOR     PLACEMENT     Place via array adds via on differential pairs incorrectly
1806675 ALLEGRO_EDITOR     PLACEMENT     Place - Manually - Quickview displays the Assembly Top details only
1835177 ALLEGRO_EDITOR     PLACEMENT     Can place symbol even after cancelling copy by choosing 'Oops' from pop-up
7 d1 ?/ f  w5 [2 Y$ T& y& a/ a1846892 ALLEGRO_EDITOR     PLOTTING      PCB Editor Export PDF does not show lines correct for certain component
6 c* y6 Z. h0 {- P1006328 ALLEGRO_EDITOR     SHAPE         Static shapes should void around corners as dynamic shapes do
/ Y) v- `. z( {1033326 ALLEGRO_EDITOR     SHAPE         Cannot compose lines to shape
' k3 E/ |; d& r8 x1 C5 K1045089 ALLEGRO_EDITOR     SHAPE         Dynamic shape voiding is inconsistent for solid and xhatch shape fill type
1069959 ALLEGRO_EDITOR     SHAPE         Compose shape crashes PCB Editor
$ ^/ I) _1 E8 y! L( s; O4 c5 ]1085907 ALLEGRO_EDITOR     SHAPE         Pad does not get thermal connections to shape if outside of the shape outline by more than DRC spacing.
1143563 ALLEGRO_EDITOR     SHAPE         The pin void inline clearance does not seem to dynamically update the shape and requires a 'force update'.
" C+ p+ [2 K) R. r( q3 v1243688 ALLEGRO_EDITOR     SHAPE         shape_rki_autoclip fails to clip shape to route keepin
( |- W* i7 b8 v# D1 |1269069 ALLEGRO_EDITOR     SHAPE         Shape void not working properly in release 16.5 hotfix 054
1327755 ALLEGRO_EDITOR     SHAPE         Need the ability to nest dynamic shapes on different nets partially or entirely
2 |1 l. `; J+ N# U1417394 ALLEGRO_EDITOR     SHAPE         Shape not updating correctly
) X/ m6 H4 o' o4 v& a7 y# ]1430742 ALLEGRO_EDITOR     SHAPE         When adding fillet to an irregular pad, the fillet might not be added or be strangely shaped
1750760 ALLEGRO_EDITOR     SHAPE         Shape to Route Keepout DRC for a void that meets route keepout
- Q* Y$ I; \) C" U1793898 ALLEGRO_EDITOR     SHAPE         Add teardrops fails to add anything with different settings
1811662 ALLEGRO_EDITOR     SHAPE         'show measure' gives incorrect air gap value between two pins
0 o, b( v: q2 r1820901 ALLEGRO_EDITOR     SHAPE         The pins on adjacent layers are voided as Rounded Rectangle instead of Rectangular as defined in padstacks
8 x% d. {; A& w( b% a, M, S1829570 ALLEGRO_EDITOR     SHAPE         Display measure airgap value is very large
1858696 ALLEGRO_EDITOR     SHAPE         The via to the edge of the board is not connecting to shape even with the PAD_SHAPE_TOUCH_CONNECTION property added
1873384 ALLEGRO_EDITOR     SHAPE         Boolean AND operation returning nil
4 c; e# ~. M/ G1873860 ALLEGRO_EDITOR     SHAPE         Copper shape does not respect route keepout
4 S; v; |/ h  z* x1889312 ALLEGRO_EDITOR     SHAPE         Shape voided for net vias on adding 'PAD_SHAPE_TOUCH_CONNECTIONS' when enabling via suppression
1890702 ALLEGRO_EDITOR     SHAPE         Not able to add teardrop in release 17.2-2016
1892692 ALLEGRO_EDITOR     SHAPE         Thermal relief connections being added to static shapes present in the void inside Dynamic Shapes
5 y$ J4 n" l# Q' X1893492 ALLEGRO_EDITOR     SHAPE         'merge shapes' results in moved void
: A! \: D( x9 ^) a1896543 ALLEGRO_EDITOR     SHAPE         Same net pin will not add thermal connection to shape if it is a rotated slot in the symdef
1897645 ALLEGRO_EDITOR     SKILL         axlCNSGetSpacing() returns nil if active class is non-etch.
1822364 ALLEGRO_EDITOR     UI_FORMS      Design Parameters dialog disappears if prmed is called while show measure is active
1834395 ALLEGRO_EDITOR     UI_FORMS      Setup menu of OrCAD PCB Editor is missing the Anchor 3D View command
1838941 ALLEGRO_EDITOR     UI_FORMS      Anchor 3D View command is not available in OrCAD PCB Editor Setup menu
1716433 ALLEGRO_EDITOR     UI_GENERAL    Alias keys do not work until mouse scroll key is activated
2 ^- C. |5 s' h  s. q1721761 ALLEGRO_EDITOR     UI_GENERAL    During manual placement of symbols, hovering over symbols does not highlight them
1732915 ALLEGRO_EDITOR     UI_GENERAL    Alias does not work in release 17.2-2016 when switching windows
# W. _: k( C/ l3 z8 i3 I1770723 ALLEGRO_EDITOR     UI_GENERAL    Funckey does not work if focus is not on canvas in release 17.2-2016
1793839 ALLEGRO_EDITOR     UI_GENERAL    Function Key does not work if a form is opened by a previous command
# B# c+ f0 F; Z1813961 ALLEGRO_EDITOR     UI_GENERAL    Inconsistent file formats available when saving reports
1816716 ALLEGRO_EDITOR     UI_GENERAL    Shortcut not working when using working layer with 'add connect'
1864321 ALLEGRO_EDITOR     UI_GENERAL    Funckeys not being registered after focus has moved to other window and back again in PCB Editor
1865010 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor does not get focus when clicking shortcut after switching from any other program or application
1868708 ALLEGRO_EDITOR     UI_GENERAL    Allegro PCB Editor, funckeys stop working intermittently in release 17.2-2016, hotfix 032
1869745 ALLEGRO_EDITOR     UI_GENERAL    Allegro 3D Canvas window becomes active on pointing at minimized icon on taskbar
1869860 ALLEGRO_EDITOR     UI_GENERAL    Hotkeys no longer functional on switching from PCB Editor to another application and then back again
* s! r! o1 D% H4 j7 `9 K' r1870744 ALLEGRO_EDITOR     UI_GENERAL    Need html extension added to Save pull down menu.
1870996 ALLEGRO_EDITOR     UI_GENERAL    If you switch from one active window to other, hotkeys stop working
( e2 S0 h& U: O9 ?8 ?1883507 ALLEGRO_EDITOR     UI_GENERAL    Hotkeys stop working after Allegro PCB Editor UI window is opened
" ^/ B$ \0 C: z* \1886981 ALLEGRO_EDITOR     UI_GENERAL    Focus lost from layout when switching between PCB Editor and Capture
% J, b. h+ U& O" T% y" S# r: u1 s1887519 ALLEGRO_EDITOR     UI_GENERAL    Release 17.2-2016, hotfix 034: Shortcuts defined using funckeys not working correctly
1887660 ALLEGRO_EDITOR     UI_GENERAL    Alias does not work in release 17.2-2016 when switching windows.
$ i6 e8 n( w) @: M8 {. C1891204 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor crashes if SKILL form is closed using the Close icon ('X')
1898059 ALLEGRO_EDITOR     UI_GENERAL    Funckey commands are not working consistently in release 17.2-2016
1902322 ALLEGRO_EDITOR     UI_GENERAL    Cannot use funckey commands when cross-probing
! H  n; j3 f; S: a9 }1905906 ALLEGRO_EDITOR     UI_GENERAL    Issue with keys and focus when navigating between windows
" {8 d7 m+ H2 n/ l& ]1913768 ALLEGRO_EDITOR     UI_GENERAL    Uppercase funckey shortcuts do not work
1751586 APD                OTHER         axlGetMetalUsageForLayer() for etch returns value including pins and vias
0 S& f% f" V$ o2 i1863241 APD                SHAPE         Fillet is left on the T-Point without Cline(center) connection.
' P/ y3 N' y; D3 y; v9 E+ V  h1894438 APD                STREAM_IF     APD/SiP Layout: Export rounded features as circumscribed and not inscribed polygon in GDS
$ ~7 I6 y9 C: ]5 `, O  j. ^/ B1812699 ASDA               AUTOMATION    Enhance the performance when extracting data from SDA, using TCL functions
  p" |5 h0 s+ f  U1863436 ASDA               CANVAS_EDIT   alignment guides are not displayed when placing or copy a part, only when moving. They are most needed during placement
4 B) D$ s( V: r# r4 Q1863445 ASDA               CANVAS_EDIT   Dark theme blue text in docked CM needs to be of a different color: difficult to read
$ k4 l* J- _) k5 p* l+ d1802111 ASDA               DARK_THEME    Dark theme in SDA should also change the border line color and text color of grid references: they are still black
6 v6 Z' u: {4 B$ N9 y$ h' l: j% w1869951 ASDA               EXPORT_PCB    File browser button in Export to PCB Layout flashes graphics of the window behind the form
1845831 ASDA               FORMAT_OBJECT Width of the twisted pair of wire should automatically be set to 6, otherwise it is not drawn correctly
1879914 ASDA               INTERNATIONAL Using French Keyboard cannot use the . (point) delimiter to set VOLTAGE property value
1865753 ASDA               MISCELLANEOUS Inconsistent and non-ideal behavior in SDA product choice dialog, small box, hard to check unlike the bottom box
1863457 ASDA               PACKAGER      Unset all user-assigned references globally
9 I6 r- x# O8 X$ A) z/ _1889301 ASDA               TDO           SDA TDO Crashes when switching to/from Offline mode
- @& n+ ]6 m' U- q% ^1823203 ASDA               VARIANT_MANAG Variant setting part to not present does not do anything
! W4 }, e9 @0 d% Y' c1823992 ASDA               VARIANT_MANAG Variant Editor fails to read netlist if a net is named NC
1 p9 \# Y" j3 p. I: t/ a- A! Z1863451 ASDA               VARIANT_MANAG variant mode can select multiple parts to add to variant but can't select multiple parts to hit reset
; U5 G. Y1 S: X5 V1863455 ASDA               VARIANT_MANAG Cannot resize any panels in the Variant mode
1874952 ASDA               VARIANT_MANAG Letter I in the alternate part icons in variant spreadsheet should be  white for readability
1878401 ASDA               VARIANT_MANAG SDA Variant Display - DNI marker color switches between black and red
9 G: q$ ^+ q+ ?/ a1877239 ASDA               WORKSPACE     SDA DRC window is hidden if undocked and minimized
8 U0 U6 y% a, y1809605 CAPTURE            LIBRARY       Part has pins in the incorrect order in the Connectors library
1638693 CAPTURE            OTHER         Capture Footprint Viewer not showing footprint.
1873612 CONCEPT_HDL        COPY_PROJECT  Copy project causes nets to be added to net groups and ports - fails to package due to mismatch
1779289 CONCEPT_HDL        CORE          Adding a component and wire and saving the design results in a 'Connectivity save failed' error
1878719 CONCEPT_HDL        CORE          Cannot enable or apply block variants at the top-level in a hierarchical design.
" \; n( A- n) p, x8 ~1865480 CONCEPT_HDL        OTHER         'partmgr -ptfMode shoppingCart' cannot output cell name with project ptf file into shoppingCart.xml
1829966 CONSTRAINT_MGR     CONCEPT_HDL   DML independent flow: Export Physical audits missing signal models in release 17.2
1904458 CONSTRAINT_MGR     ECS_APPLY     'Audit - ECSets' crashes DE-HDL in release 17.2-2016, Hotfix 037
1 t0 w& l7 B2 o. E% [1798269 CONSTRAINT_MGR     OTHER         Script changes '-' in layer name to '_'
4 l' F! t* L9 x& Z- M/ _1835520 CONSTRAINT_MGR     OTHER         Cannot add members to netclass name with parenthesis
1896638 CONSTRAINT_MGR     OTHER         Constraint Manager worksheets jump abruptly
( O2 k3 e& v4 M1801938 CONSTRAINT_MGR     UI_FORMS      Add To Netclass window: Focus not on ClassSelection
' t7 f" [0 l3 R* I0 J1854060 CONSTRAINT_MGR     UI_FORMS      Using the tab key in the Manufacturing workbook jumps a cell
* r% f6 {$ j( v: W' i1881832 ECW                ROLES_PERMISS Adding Users in SSO environment using PS is error prone
1864870 F2B                BOM           Incomplete BOM report generated
5 m2 ]; ^# H, @: ]: A1846578 PCB_LIBRARIAN      GRAPHICAL_EDI radio buttons and clickable buttons are hidden in the UI for verify rules
1854080 PCB_LIBRARIAN      METADATA      con2con needs to support special characters in Primitive Name
1796377 PCB_LIBRARIAN      SYMBOL_EDITOR Unable to move pins using arrows when symbol is opened in Symbol Editor
) X; l  _* U" S. G# S1839692 PCB_LIBRARIAN      SYMBOL_EDITOR Properties tab grayed out in Symbol preview window
1865657 PCB_LIBRARIAN      SYMBOL_EDITOR Cannot change symbol properties using the General tab
1906888 PCB_LIBRARIAN      SYMBOL_EDITOR Properties button in Symbol Pins tab of the Symbols section is inactive.
1891248 PCB_LIBRARIAN      SYMBOL_EDITOR Copy and mirror arc drawing object in the new Symbol Editor results in wrong arc on opening symbol in DE-HDL
1908381 PDN_ANALYSIS       PCB_STATICIRD Allegro PCB PDN Analysis crashes after performing analysis and saving result in release 17.2-2016
3 u: Z! ^) q4 o9 G! ]1825087 PSPICE             AA_OPT        Graph view menu does not appear when we use 'Curve Fit' in Optimizer.
1808091 PSPICE             ENVIRONMENT   'orSimSetup' crashes when 'Restart Simulation' is selected
1811782 PSPICE             ENVIRONMENT   Setup Simulation Profile no longer enables Advanced Markers when appropriate
1834147 PSPICE             ENVIRONMENT   PSpice Part Search library icons not displayed if product is installed in the Program Files folder in release 17.2-2016
1841992 PSPICE             FRONTENDPLUGI Getting a blank Error dialog while adding a marker
1858574 PSPICE             NETLISTER     PSpice simulation: Some models cannot be used after upgrading to release 17.2-2016
1 E# v+ z: x, K# t. C, E6 m1865022 PSPICE             NETLISTER     The division operator is not recognized by PSpice in DEV expressions in release 17.2-2016
1677119 PSPICE             PROBE         PSpice crashes when plotting simulation message summary
1837046 PSPICE             PROBE         On Windows 10, PSpice crashes on clicking Yes to see message
/ b- Q/ q3 _8 g/ h1879387 PSPICE             PROBE         PSpice crashes when we choose to plot simulation message summary
1842231 PSPICE             SIMULATOR     Wrong results in PSpice Advanced Analysis for DC Sweep Analysis
1 w0 g& N1 d0 o3 |! T% e2 x  X1843446 PSPICE             SIMULATOR     Distribution type is not showing under Assign Tolerance window for transistor
+ ]3 r0 J" ?/ O+ k8 ]1872630 RF_PCB             ROUTING       Transition taper length does not work in route- Add RF trace
* s7 i! e+ f3 t" x0 H1872636 RF_PCB             ROUTING       Inherit Width parameter in Route -RF trace only uses width of one side
1872644 RF_PCB             ROUTING       Regression RF trace: change in trace width not retained while routing
" ]9 `  M7 z  x; k; o1901201 SIP_LAYOUT         EXTRACT       extracta is not retaining custom layer names
1813380 SIP_LAYOUT         OTHER         Layer Compare is not adding the required shapes
1852762 SIP_LAYOUT         OTHER         Error generated in Package Design Integrity Check when adding soldermask to my design
2 J' m) t" w5 r; ~: v1886847 SIP_LAYOUT         REPORTS       Incorrect metal area in metal usage report
8 U9 z& D0 N4 d, N' z6 ]1491315 SIP_LAYOUT         SHAPE         Dynamic shape filling exceeds the shape boundary on running 'create bounding shape' command
, k% X$ F( I0 [! m1853989 SIP_LAYOUT         SHAPE         'Shape - Select' and then' Move' from pop-up with ix 500 iy 0 moves shape diagonally
: ^. i/ ~8 E% f  v& B' H+ f7 L/ W1868509 SPECCTRA           PARSER        Autorouter takes long time to invoke
5 ?5 b$ _( W) X$ t7 C, L+ s4 P' g1869317 SYSTEMSI           ENG_PBA       SystemSI PBA does not align correlation waveforms correctly on Linux platform
/ b6 _# v% O5 z& g+ v; [. j
6 B% F1 l+ q+ Y- F
Fixed CCRs: SPB 17.2 HF037
" i1 G; x+ ^& \" v2 N" Q03-30-2018
1 f4 A  }6 ~& `4 [( D) g========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
6 K8 X4 {1 b& @! W( |- y& P$ ]========================================================================================================================================================
7 S2 `; `% b8 U, I1886573 ALLEGRO_EDITOR     IN_DESIGN_ANA Fail to launch Sigrity executable from release 17.2-2016
: v1 R2 T7 U/ m/ S1891113 ALLEGRO_EDITOR     NC            Clubbing total backdrill layerwise data
1886085 ALLEGRO_EDITOR     SHAPE         Line to Thru Via DRC is not displayed automatically
1850888 ALLEGRO_PROD_TOOLB CORE          Design Compare crashes immediately after execution
% T6 Q) H8 G9 R% P* t1639079 ALTM_TRANSLATOR    CAPTURE       Title block issues with third-party design
1722577 ALTM_TRANSLATOR    CAPTURE       Third-party translator does not work in Capture in release 17.2-2016 if CDSROOT is not defined
1744697 ALTM_TRANSLATOR    CAPTURE       Third-party translator crashes
  `0 _9 t! U2 S4 ]1820160 ALTM_TRANSLATOR    CAPTURE       Title block does not show ghost image when selecting it for placement
2 D( ^+ @# L6 ~: m" h1628560 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translation to PCB Editor not working properly
1836750 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator fails to translate a complete design
6 u) Q0 m# a5 j3 R8 ~3 A  m3 u1844423 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translation takes a long time in release 17.2-2016
1849338 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translated board not correct
: E* D& D1 f5 r1894607 CONCEPT_HDL        CORE          Closing CM during 'Save Hierarchy' crashes DE-HDL
, `" m& R% D  |1703351 CONSTRAINT_MGR     CONCEPT_HDL   SigXplorer shows invalid models instead of default models in extracted topology
1868687 CONSTRAINT_MGR     CONCEPT_HDL   DML-independent flow: some pin-pairs missing for Differential Pair XNets when migrating 16.6 design to 17.2
1868747 CONSTRAINT_MGR     CONCEPT_HDL   Additional pin-pairs created on migrating design to release 17.2-2016 DML-Independent flow
1887794 CONSTRAINT_MGR     OTHER         Ability to disable cross-section changes in F2B flow
7 B  S" Q* q2 Y4 }1 P5 e# l. e1859193 MODEL_EDITOR       TRANSLATION   DML provided by Model Integrity has a parsing error: curve must start at time zero
) z& x/ k' t0 h

Fixed CCRs: SPB 17.2 HF036
03-16-2018
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
% Z" }" T8 T, J2 y' z, v========================================================================================================================================================
1880209 ADW                DBEDITOR      DBEditor quick search is resetting the check boxes in the Attributes tab
" C4 d9 ?  x- r' C3 [1880376 ADW                DBEDITOR      Allegro EDM Database Editor wildcard search functionality broken after installing hotfix 034.
7 B1 I" _7 u/ s1855444 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes on creating MDD files after deleting subclasses
1863478 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes on a specific machine when loading any .mdd file
1875544 ALLEGRO_EDITOR     SCHEM_FTB     Constraints are getting removed
/ D# ^" x& j. {3 J1719683 ALLEGRO_EDITOR     UI_GENERAL    Incorrect display when using infinite cursor.
1765989 ALLEGRO_EDITOR     UI_GENERAL    Selection window does not work correctly with infinite cursor option checked
( E8 {$ ^, }5 ?1885667 ALLEGRO_EDITOR     UI_GENERAL    Infinite cursor is not working correctly
1873954 ASDA               IMPORT_DEHDL_ SDA: Inconsistent pin number positions on part in an imported DE-HDL project
; V/ n* e, W/ ^1873883 ASDA               NEW_PROJECT   SDA: New project from DE-HDL creates blank Page 1
1852036 ASDA               VARIANT_MANAG Design with variant cannot generate a variant BOM
1875549 CONCEPT_HDL        CORE          Incorrect PART_NUMBER/VALUE properties on schematic
7 A- ?) P" R+ B; L3 j$ s1881848 CONCEPT_HDL        OTHER         License issue: Cannot open Allegro Design Authoring and unable to choose options and features
- v" x# `# v9 U. S! e  L: P3 d1872189 CONSTRAINT_MGR     CONCEPT_HDL   Pin-pairs are created for incorrect members of differential pair after ECSet is applied
$ M9 u) m& T5 i$ U1880235 CONSTRAINT_MGR     UI_FORMS      Ability to lock auto-generated Constraint Set in UI
1868711 CONSTRAINT_MGR     XNET_DIFFPAIR Nets are dropped from XNets on the BRD file in the front-to-back flow
! w9 B8 J) b. @$ U2 S" c1879296 ECW                PROJECT_MANAG Mode to remove Uprev Lock from locked webs in admin keys
% Y- F7 g0 ~# W; m1881632 PSPICE             SLPS          PSpice creates 'psp_input.log' during co-simulation flow
1879302 SCM                OTHER         SCM crashes when global nets are changed in the Block Packaging Options dialog box
% v2 `8 a3 p, m! ?; c1879580 TDA                SHAREPOINT    GetData error when opening a project in Design Data Management


% B& Z1 s( i9 g& }1 ?3 FFixed CCRs: SPB 17.2 HF035
03-02-2018
' Q, l% {4 }2 d+ C+ a: f========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
+ v3 E6 @) k. b, _6 P( U5 X2 C========================================================================================================================================================
1873547 ADW                ADW_UPREV     adw_uprev resulted in incomplete footprint XML
& H: n2 G8 m& `. A% T. E1643895 ADW                DBEDITOR      Create Footprint model name is not working properly if footprint exists in local flatlib
5 g8 u9 m% o3 B5 x4 b$ E6 [1846400 ADW                DBEDITOR      'Copy As' and 'Rename' STEP model options do not work
" b4 Y2 E5 ]9 H6 _. n3 P5 n1868299 ADW                FLOW_MGR      Copy Project fails and makes Flow Manager unresponsive
4 @2 `, V) x6 L/ s& N! M' Q4 N3 b! g7 ^1872796 ADW                PART_BROWSER  Part/Model Details Attributes are all empty when connected to the EDM DB
8 g) U6 w5 m/ N* m) ?$ [5 ?1877199 ALLEGRO_EDITOR     DATABASE      Purging backdrill adds bottom filmmask to vias when it is not defined in the padstack
1877219 ALLEGRO_EDITOR     DRC_CONSTR    PCB Editor crashes on updating DRC
1875528 ALLEGRO_EDITOR     GRAPHICS      Subclasses disappear in partition
6 y! u& g; r) S) S1868364 ALLEGRO_EDITOR     OTHER         Translator for Layout to PCB Editor fails in release 17.2-2016 but works in 16.6
1822989 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor very slow when using infinite cursor
1855275 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor becomes slow if OpenGL is disabled
1868803 ALLEGRO_EDITOR     UI_GENERAL    Infinite cursor not working as expected
$ z+ k& _$ S' Q! D1869523 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor hangs inconsistently on axlOpenDesign
1871409 ALLEGRO_EDITOR     UI_GENERAL    ESC key does not function with Enable_command_window_history set
/ j( z8 N. a+ K5 E% z5 H5 X1812306 ALLEGRO_PROD_TOOLB CORE          Incorrect DIFF result of PCB Design Compare
  U5 t* @2 x' l; n: p1872772 ASDA               MISCELLANEOUS SDA pulls a license for 'Allegro_performance'
1877070 CAPTURE            OTHER         Capture redraws icons
+ b0 E6 t2 h3 R3 O9 q' y1863624 CONCEPT_HDL        CONSTRAINT_MG XNet names are changed in the designs migrated to release 17.2-2016
1866290 CONCEPT_HDL        CORE          variant editor/DE-DHL crashed when changing a component property
1858139 CONCEPT_HDL        OTHER         Slow graphic response in Windows10: Icons redraw
1872703 CONCEPT_HDL        OTHER         Icon and toolbar in DE-HDL keeps on refreshing for every command
7 j7 L! g: p2 o0 p2 `1873949 CONCEPT_HDL        OTHER         DE-HDL user interface refreshes frequently
1871542 CONSTRAINT_MGR     INTERACTIV    Extracting object with 'Referenced ECSet' does not inherit T-points from the applied ECSet
1868812 CONSTRAINT_MGR     UI_FORMS      Cannot Save Log File from CM ECSet Audit.
4 r" m: ~( u$ W* B7 o* p1878574 ECW                PROJECT_MANAG Duplicate entries are created in SharePoint users list while creating project on SSO setup
8 i. [1 I; w1 p. y1878619 ECW                PROJECT_MANAG Too many mails generated on doing create project
  `6 W5 }  w4 B% O1862772 ECW                TDO-SHAREPOIN Logical BOM file name not displayed in Changed Files of Pulse Activity Log.
, w( T/ {$ D6 f5 V+ ~5 S4 G1860641 INSTALLATION       DOWNLOAD_MGR  Download Manager remembers credential settings
7 D, q- n1 K3 |4 O3 v' _# ~$ ?1867195 INSTALLATION       DOWNLOAD_MGR  Download manager crash
6 b) e3 ^2 |/ H5 E$ U1872187 SIP_LAYOUT         DRC_CONSTRAIN Sliding a cline removes DRC markers but updating DRC shows more DRC markers


) |2 F  _, r: [) ?5 JFixed CCRs: SPB 17.2 HF034
) ?7 u) ?, ~( H# L" b5 ~9 s02-11-2018
: W2 m+ j' e6 A+ Z========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
( i5 [4 e+ d+ E' c0 f2 O0 a1863981 ADW                ADW_UPREV     adw_uprev is taking a long time after installing hotfix 031
# d, s" P( k: H. ^: Q1868186 ADW                DBEDITOR      Configured LDAP authentication giving error on launching DBeditor after ISR31 installation
) C# n6 x( a* e( r  D/ o/ I5 F1861524 ADW                LIBDISTRIBUTI Library distribution is checking for obsolete classifications every time it is run hence taking more time
1842998 ADW                LIB_FLOW      Footprint model check-in fails with verification checks failed error
1863047 ALLEGRO_EDITOR     DATABASE      The layer added above the TOP layer in SiP Layout cannot be deleted from database.
/ r4 j# a' D* g: J# `1852799 ALLEGRO_EDITOR     DFM           Refresh symbols crashing inside constraint re-enablement code
1865732 ALLEGRO_EDITOR     DFM           The Thru via hole to Pad check in Annular Ring should check only the Finished hole size instead of backdrill diameter
& v. _* ]& B1 m- s: d1862977 ALLEGRO_EDITOR     DRC_CONSTR    Differential pair phase tolerance DRCs introduced in release 17.2-2016 DML-independent flow
1864460 ALLEGRO_EDITOR     EXTRACT       Running Extracta from outside using command window writes layer name for top/bottom layers incorrectly for SiP designs
1859208 ALLEGRO_EDITOR     GRAPHICS      Pop-up menu remains on desktop when PCB Editor is minimized
1866422 ALLEGRO_EDITOR     MANUFACT      Backdrill update taking a long time
1867148 ALLEGRO_EDITOR     MANUFACT      Backdrill update taking longer time to process.
7 ^5 q) P4 a3 V& Y* t1872127 ALLEGRO_EDITOR     MANUFACT      Backdrill performance issues - Additional fixes required for S034
6 y; r" \) f  {6 R' F7 L) f# H" S% X1866577 ALLEGRO_EDITOR     SHAPE         Board becomes unresponsive on Shape Update or Slide Trace
* W5 ~4 J1 e+ C; Z1867590 ALLEGRO_EDITOR     SHAPE         The Shape to Pad clearance on multi drill oblong padstacks is not working correctly
1871902 ALLEGRO_EDITOR     SHAPE         Void issue during rotation of symbol with multi-drill padstack from hotfix S032
1866778 ALLEGRO_EDITOR     UI_GENERAL    Unsupported prototype 'Enable_command_window_history'  is not allowing text edits using arrow keys
1865757 ASDA               DESIGN_CORRUP SDA hangs when trying to save design or copy page or circuitry
1865872 ASDA               DESIGN_CORRUP Corrupt design crashes on editing.
$ E" b6 ?* I- A1867039 ASDA               DESIGN_CORRUP Design corruption issues
+ |$ u* N( q: Y1831263 CAPTURE            OTHER         Toolbar refresh is very slow on windows 10 after installing latest windows patch
* x+ r2 X& \6 K) r1843595 CAPTURE            OTHER         Icon refresh is very slow on Windows 10 Professional after installing Hotfix 029
1845003 CAPTURE            OTHER         Application slow to respond after running for a long time
1847062 CAPTURE            OTHER         Starting OrCAD Capture redraws the toolbar icons many times.
1850816 CAPTURE            OTHER         Capture redraws toolbar very slowly and repeatedly
+ E2 A2 h5 _, T8 J1851346 CAPTURE            OTHER         Capture CIS redraws toolbars repeatedly
" c. _  z5 M. \( R- e! V' c4 P0 e" Q1851354 CAPTURE            OTHER         Capture slows down in Hotfix 30 as tools icons are repeatedly redrawn very slowly
6 m6 p1 k/ K7 d3 J1 d  _1851883 CAPTURE            OTHER         Toolbar content refresh is very slow
$ R; S4 M, A2 k3 |. Q- F1852819 CAPTURE            OTHER         Capture refreshes toolbar again and again
1853395 CAPTURE            OTHER         Release 17.2-2016: Capture is refreshing toolbar icons many times at startup with latest hotfix
1853972 CAPTURE            OTHER         Capture starts and redraws toolbar very slowly
1854735 CAPTURE            OTHER         Capture toolbar reloads multiple times
1855850 CAPTURE            OTHER         Toolbar content refresh is very slow
; k; ~8 x8 k; \0 r1857523 CAPTURE            OTHER         Toolbar icons refresh multiple times and very slowly in release 17.2-2016
1859219 CAPTURE            OTHER         Toolbar is refreshed multiple times while starting Capture CIS
1 c& s$ a  E; p- D$ ^" P* R1859626 CAPTURE            OTHER         OrCAD Capture does not work with the latest Windows 10 update
1863341 CAPTURE            OTHER         Toolbar icon refresh is very slow
1865661 CAPTURE            OTHER         Release 17.2-2016, hotfix 032: Capture extremely slow on Windows 10
1867009 CAPTURE            OTHER         Slow graphics with Design Entry CIS on Windows 10.
% Q& }6 g/ D) W: U1869160 CAPTURE            OTHER         OrCAD Capture poor performance (toolbar related)
& t* A; V1 B& e0 x0 d' E1869692 CAPTURE            OTHER         Redrawing of toolbars on Windows 10
  F4 v' U+ S' _8 k: N1870310 CAPTURE            OTHER         Allegro Design Entry CIS redraw issue
' y8 H3 Y# I8 w7 N1870367 CAPTURE            OTHER         OrCAD Capture Slow Redraw
+ R: q" o* ]/ \! r' J1871382 CAPTURE            OTHER         Schematic will not open and toolbars refreshed repeatedly
1872427 CAPTURE            OTHER         OrCAD Capture freeze on Windows 10
1862679 CONCEPT_HDL        COMP_BROWSER  Unable to input property value to search in Part Information Manager
1865039 CONCEPT_HDL        CORE          'Save Hierarchy'  of a release 16.6 design opened in release 17.2-2016 results in unexpected part changes
  T, C  K9 O" Z! V- r; i0 A8 v1866544 CONCEPT_HDL        CORE          XNET_PINS added to migrate Design as DML Independentflow does not get saved in the CSA files
4 M& Q6 g5 f% r. O. e0 z1849363 SIG_INTEGRITY      SIMULATION    Differential impedance calculation shows ZERO when changing dielectric constant
1854195 SIP_LAYOUT         UI_GENERAL    After setting 'enable_command_window_history' in QIR5/Hotfix 031,  Edit - Text no longer functions
. [7 U$ n1 f- n1 j7 W$ O" e
. w7 }* B4 L! d( o* @
6 r2 q+ Q- q2 M& BFixed CCRs: SPB 17.2 HF033
; D+ A* _: \. f2 q7 M% R01-25-2018
========================================================================================================================================================
# F1 ]( C. e: r7 {- K3 g% @9 nCCRID   Product            ProductLevel2 Title
- O) L1 G9 z" I& D$ }========================================================================================================================================================
1828672 ADW                ADWSERVER     LDAP connection error while trying to log in to DBeditor
1840699 ADW                DBEDITOR      Unable to release footprint model due to older version being linked to a DE-HDL Block Model
6 f4 e8 A# c0 v; z5 j1852402 ALLEGRO_EDITOR     DATABASE      Cutouts are not converted correctly when opening release 16.6 board in release 17.2-2016
% l+ z* M: j4 n. y; T) o6 L# [2 p1855223 ALLEGRO_EDITOR     DATABASE      Release 16.6. BoardOutline not fully converted to release 17.2-2016 Cutout Layer
1855252 ALLEGRO_EDITOR     DATABASE      Unable to open a previously saved release 17.2-2016 database
5 _) n8 Y9 j# z1 g( {* o! ]( w1863025 ALLEGRO_EDITOR     DRC_CONSTR    Shape voiding to Via pad with backdrill keepout is oversizing the Dynamic shape void by the backdrill keepout
8 @: @" P9 {' M+ l4 F1854087 ALLEGRO_EDITOR     EDIT_ETCH     Sliding arc crashes PCB Editor
- k4 ]. C6 r( N' |8 L1840667 ALLEGRO_EDITOR     INTERACTIV    Choosing 'Change Text block to' from pop-up displays message 'E- (SPMHGE-150): Text font is not defined'
0 Z- X  ^6 |8 `- A2 O1849133 ALLEGRO_EDITOR     INTERACTIV    On choosing 'Change Text block to' on text , 'Text font is not defined' message appears
1854695 ALLEGRO_EDITOR     MANUFACT      PCB Editor crashes while performing nc_route
, e: G2 S8 J! H3 H6 x/ T' C1854634 ALLEGRO_EDITOR     NC            NC Drill file is generated with half the number of Drill Holes on enabling 'Optimize drill head travel'
1856773 ALLEGRO_EDITOR     NC            Issue with Optimize Drill head travel in hotfix 031: Missing drill holes
8 k( K6 ^0 ^, z1860876 ALLEGRO_EDITOR     NC            NC route critical difference between hotfix 031 and 022: No slots found warning
' T/ o4 @" g* D8 a1758671 ALLEGRO_EDITOR     OTHER         Export parameters takes long time to export and some times the process hangs
1040989 ALLEGRO_EDITOR     SHAPE         PCB Editor crashes while editing board outline
' X; q; m2 D- v! a# I1328385 ALLEGRO_EDITOR     SHAPE         Check for missing thermal reliefs when shapes overlap
( _9 J) B3 e  F1366376 ALLEGRO_EDITOR     SHAPE         Thermal created for Xhatch shape overlapping another shape, but not created when solid shapes overlap
$ p4 D9 K* B; n1716436 ALLEGRO_EDITOR     SHAPE         Acute angle trim should not violate DRC.
1822377 ALLEGRO_EDITOR     SHAPE         Setting shape parameter Acute angle trim control to Full round produces unwanted shape to keepout DRCs
; H9 O" @- c4 R7 y9 T0 }% P0 D1826436 ALLEGRO_EDITOR     SHAPE         Same net shape to hole spacing not voiding shape for cline of different net moved close to vias of same net shapes
. d# N) c6 e9 T1834510 ALLEGRO_EDITOR     SHAPE         Same Net Shape to Via Spacing does not always clear correctly
1850716 ALLEGRO_EDITOR     SHAPE         'DiffPair combined void for vias added with Return Path option' does not work with fillet and pad suppression
1 M) {4 Y( `3 z5 ~0 S1852814 ALLEGRO_EDITOR     SHAPE         Thermal reliefs are not created after placing modules.
1853453 ALLEGRO_EDITOR     SHAPE         Route keepout clipping of cross-hatched shapes needs to be corrected
  ]# k" b' G" Q+ G' g; y9 @1859391 ALLEGRO_EDITOR     SHAPE         Shapes are not using 'minimum aperture for gap width' for voiding after back drill update.
1859410 ALLEGRO_EDITOR     SHAPE         Shape to Teardrop is not using same net spacing rules
1825397 ALLEGRO_EDITOR     UI_FORMS      Option panel disappears in release 17.2-2016
0 Y+ b9 N: b' D; X/ Q9 [1854070 ALLEGRO_EDITOR     UI_GENERAL    enable_command_window_history prevents many aliases and commands from working correctly
, s" b3 A* t+ W/ O1855180 ALLEGRO_EDITOR     UI_GENERAL    Comma and dot do not work in funckey if 'enable_command_window_history' is set
8 U$ W* H4 ]: e, Y1860003 ALLEGRO_EDITOR     UI_GENERAL    Icons and features missing or behaving differently in release 17.2-2016, Hotfix 031
  E. E2 c' W  J; T% m4 N. F1861278 ALLEGRO_EDITOR     UI_GENERAL    Icons and menus missing in PCB Editor in release 17.2-2016, Hotfix 031
9 ^# h: f$ `& L  M5 J1 _/ C" E! ^1862292 ALLEGRO_EDITOR     UI_GENERAL    Layout Pins icon missing in toolbar in Symbol Editor since Hotfix 031
. f* v1 O7 N% d2 i8 o) K: L1793284 ALLEGRO_PROD_TOOLB CORE          Limit View (V1R, V2R, COM) for OUTLINE layer.
' ~% R: X0 F# w+ g- H- V7 D9 f1712701 ALTM_TRANSLATOR    CAPTURE       Third-party translator shows error for missing operand
1802182 ALTM_TRANSLATOR    CAPTURE       Imported schematic has connectivity loss
1802462 ALTM_TRANSLATOR    CAPTURE       Hierarchical ports placed incorrectly for imported third-party design
- r: ?. N+ f& q1823935 ALTM_TRANSLATOR    CAPTURE       Translating third-party schematics with hierarchical pages from Design Entry CIS
& r* X& L2 O- [1830570 ALTM_TRANSLATOR    CAPTURE       Third-party to Capture translation is translating only one page out of 32
# s4 {% z% [2 Q1839627 ALTM_TRANSLATOR    CAPTURE       Third-party translator is not importing complete schematic
1846965 ALTM_TRANSLATOR    CAPTURE       Cannot translate third-party schematic
1816767 ALTM_TRANSLATOR    DE_HDL        Error when translating third-party schematic to DE-HDL
1845601 ALTM_TRANSLATOR    PCB_EDITOR    Cannot operate third-party PCB translation in release 17.2-2016 Allegro Venture PCB Designer license
4 b1 f, [# C3 k  p1841060 APD                DIE_GENERATOR Cannot 'die text out' from SiP Layout or Allegro Package Designer
1793232 APD                SHAPE         When fillet/taper not connected to a pin, voiding process incorrectly applies shape clearance values
1846541 APD                SHAPE         shape degassing does not obey void to shape boundary
1863446 ASDA               CONSTRAINT_MA A space in the name of a spacing or physical constraint results in the incorrect constraint set name
1859678 ASDA               VARIANT_MANAG SDA - When hovering over all three buttons, under Preferred Parts in the Variant info it says (Do not install)
6 \. m: W) b' q6 \# u$ r: y/ `1815839 CONCEPT_HDL        CORE          Allegro Design Entry HDL crashes when entering Location data manually
1841857 CONCEPT_HDL        CORE          Unable to modify Components in non-windows mode
1852096 CONCEPT_HDL        CORE          Creating a block using top-down approach does not generate the CSB file
1857390 CONCEPT_HDL        CORE          DE-HDL crashes on moving symbol
6 u+ U& G0 ^/ e" b4 v2 T1789070 CONCEPT_HDL        OTHER         Having folder 'allegro' in cpm root directory gives error while launching layout editor from Project Manager
1862484 CONSTRAINT_MGR     CONCEPT_HDL   Extracting an ECSet in SigXP is missing a t-point
1 f4 ~1 z% m3 `7 ^/ C' W1863045 CONSTRAINT_MGR     CONCEPT_HDL   Pin pairs deleted for a few differential pairs after upreving the design to release 17.2-2016
* |3 `3 a7 {3 P% |5 S1863054 CONSTRAINT_MGR     CONCEPT_HDL   Differential Pairs are treated as invalid objects on upreved design
1863094 CONSTRAINT_MGR     CONCEPT_HDL   Pin-Pairs are shown duplicated in the topology for the extracted object (Diff Pair)
1831998 CONSTRAINT_MGR     OTHER         'Tools - Options' settings not saved on closing Constraint Manager
; X7 M0 Z7 q$ i" }6 Q1855324 CONSTRAINT_MGR     OTHER         Enable the option 'Expand Hierarchy' in 'Find and Replace' dialog, by default
5 }7 D7 d7 Q1 }4 C8 B1860847 CONSTRAINT_MGR     OTHER         'Include Routed interconnect' option once enabled, should remain enabled for that board file
# ?3 T+ B  J/ c* z2 Q1843359 EAGLE_TRANSLATOR   PCB_EDITOR    While importing third-party PCB, many footprints do not convert, even though the log file says footprint created
1839978 SCM                REPORTS       dsreportgen unable to output reference designator from a lower-level hierarchical block if it has a single component
3 F( Y" [( V! A3 D) Z1850013 SIP_LAYOUT         OTHER         Environment variable 'icp_disable_cte_auto_update' needs grammatical change
1833742 SIP_LAYOUT         PADSTACK_EDIT When creating Die to Die Via using Generate Padstacks, resultant pad stack has wrong Layers
7 f* W7 B( [$ ]% s# K1619098 SIP_LAYOUT         SHAPE         Acute angle of shape in design
# \) m( h4 d6 a5 s  m1728628 SIP_LAYOUT         SHAPE         Auto-void in dynamic shape does not disappear if object is removed
4 K! a' p* u' m) B! K1854592 SIP_LAYOUT         VIA_STRUCTURE Create via structure returns an error

5 S) s' [$ s6 x- ^! F7 w9 O
3 B& b( ^. Z$ H3 S. ]2 fFixed CCRs: SPB 17.2 HF032
4 P# `' _8 [- G01-13-2018
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1846603 ADW                FLOW_MGR      Copy project GUI not displaying correct design name after changing the project folder name
1831152 ALLEGRO_EDITOR     3D_CANVAS     New 3D viewer canvas is blank
8 @. D+ @& O' r- A  A1805870 ALLEGRO_EDITOR     COLOR         Color file with dot (.) in the filename is not recognized for setting color from the Visibility tab
" I) u8 ^: b; j: A1843126 ALLEGRO_EDITOR     DATABASE      DBDoctor UI is taking very long
1857588 ALLEGRO_EDITOR     DFM           Design for Fabrication - Aspect Ratio is not taking correct drill hole size
1844313 ALLEGRO_EDITOR     INTERFACES    STEP output viewed in third-party tool has parts sunken into the secondary side
, S- Y! X. x" s4 G; {1 n  y$ @  w1801301 ALLEGRO_EDITOR     MANUFACT      Export IPC 2581 fails if VOLTAGE property is attached to the nets on each side of a RF component
1850078 ALLEGRO_EDITOR     MANUFACT      Choosing 'Manufacture - Artwork' crashes tool
  c- ~, j1 i4 O, `. T8 g% x1844049 ALLEGRO_EDITOR     MODULES       Module deletion not removing related component information.
1849665 ALLEGRO_EDITOR     MULTI_USER    Shape rejected by muserver
1782831 ALLEGRO_EDITOR     RAVEL_CHECKS  RAVEL file does not load when it is located on a network with a UNC path specified
; C; }6 S  K8 B4 M1830442 ALLEGRO_EDITOR     SCHEM_FTB     Fail to import technology file with message for failure to read the configuration file
1837391 ALLEGRO_EDITOR     SCHEM_FTB     Capture Property cannot rewrite or update constraints in PCB Editor
1840643 ALLEGRO_EDITOR     SCHEM_FTB     Export physical does not work after modifying PCB cross section
: I2 I8 g2 R4 J) y1718165 ALLEGRO_EDITOR     SHAPE         Drill hole cannot be voided by shape
+ ~1 _) E2 l# T3 O2 ~1753245 ALLEGRO_EDITOR     SHAPE         Update Shape retracts more than the shape to shape spacing
1827366 ALLEGRO_EDITOR     SHAPE         out of date shape is not flagged as out of date
- }0 t4 a9 F6 g, g1828208 ALLEGRO_EDITOR     SHAPE         Shape remains out of date, but status shows otherwise
1832098 ALLEGRO_EDITOR     SHAPE         Skip via shorts to plane at few places even after the necessary keep-outs are assigned to the via pad-stack.
1834281 ALLEGRO_EDITOR     SHAPE         DBDoctor creates a large number of DRCs
1842121 ALLEGRO_EDITOR     SHAPE         Unable to clear the Drill Hole to Shape Spacing DRC as Pin is not able void to the shape correctly.
1846010 ALLEGRO_EDITOR     SHAPE         Changing MCAD hole to copper spacing in Analysis Modes - Design does not make shapes out-of-date
1839119 ALLEGRO_EDITOR     UI_GENERAL    On some machines, PCB Editor hangs when launched with a script that uses SKILL to open a design
9 y1 ~8 m# ^& [1 o+ `1828794 APD                SHAPE         Setting Shape Fill Xhatch Cells option to HIGH, crashes the application
9 w7 v9 S& y8 ?/ F' V& j1840748 CAPTURE            PROJECT_MANAG Capture crashes on opening or creating designs
1785298 CONCEPT_HDL        CORE          Incorrect object access during variant load
1832119 CONCEPT_HDL        CORE          Save Hierarchy shows ERROR(SPCOCN-2010) messages but design packages without error
2 s0 B/ v" e) T4 Q% n! O& A+ p1833036 CONCEPT_HDL        CORE          nconcepthdl crashes with a core dump when running an external script
1841545 CONCEPT_HDL        CORE          NO_XNET_CONNECTION properties added to two-pin filters after upreving to release 17.2-2016
1842289 CONCEPT_HDL        CORE          Opening a schematic in release 17.2-2016 causes the .dcf file to be overwritten
& ^6 W. ^* M& U: D4 f' q1841543 CONCEPT_HDL        OTHER         DE-HDL crashes when changing a net name/page name/bit bus after installing release 17.2-2016, Hotfix 029
3 Z( @$ R6 Z9 S9 n1 H1 o5 j1843791 CONCEPT_HDL        OTHER         Table of contents listing does not update for some hierarchy blocks at the top level
! x( ~: d0 s2 S: @/ z7 n0 z1850709 CONCEPT_HDL        OTHER         DE-HDL crashes on editing text on canvas in release 17.2-2016, Hotfix 030
9 [& S% q) d' b! U. M4 P) i1853377 CONCEPT_HDL        OTHER         DE-HDL crashes on trying to edit bus tap value on Windows 10.
3 V+ y: a/ @3 I1857213 CONCEPT_HDL        OTHER         DE-HDL crashes when changing Power Property
4 u' X. _& x* {- g9 t' S. p8 N: t1857214 CONCEPT_HDL        OTHER         In release 17.2-2016, DE-HDL crashes on using 'Change' for a $LOCATION text value on Windows 10
1821982 CONCEPT_HDL        PDF           Pin number shown in PDF published from DE-HDL
7 s) f$ Z- t% Q( A' _1848615 CONCEPT_HDL        PDF           PDF Publisher shows incorrect pin text values for parts
1845996 CONSTRAINT_MGR     CONCEPT_HDL   Confusing error message regarding 'Auto XNets Off Mode' vs 'DML Enabled'
! y/ [: Q6 }. r$ E3 e2 Z# W2 Z) ?1854190 CONSTRAINT_MGR     CONCEPT_HDL   'Audit - Electrical CSets' hangs Constraint Manager after the design is upreved to release 17.2-2016
1854868 CONSTRAINT_MGR     CONCEPT_HDL   Match Group getting deleted after upreving the design to 17.2 and removing the signal_models
  Z7 ?1 P2 `8 a9 t1854872 CONSTRAINT_MGR     CONCEPT_HDL   Additional Pin-Pairs getting created on the DiffPair after upreving to 17.2
3 G5 W* O" T$ s- P1 f( P: E1822624 CONSTRAINT_MGR     ECS_APPLY     Cannot copy PCB net schedule from a net to other nets
1854883 CONSTRAINT_MGR     ECS_APPLY     Match group showing 0 length for pin pairs in design upreved from release 16.6 to 17.2-2016
1855893 CONSTRAINT_MGR     OTHER         SigXplorer extraction crashes PCB Editor
- y. c. v: ]4 j5 W! {1 ]- S0 b' P1855917 CONSTRAINT_MGR     OTHER         SigXplorer extraction does not extract constraints unless the worksheet is opened once in CM
% D+ ^" x% q/ E0 o5 D1855350 CONSTRAINT_MGR     UI_FORMS      Constraint Manager significantly slower in release 17.2-2016, Hotfix 031
* s! J1 G: _4 e- }, {: z1855860 EAGLE_TRANSLATOR   PCB_EDITOR    Cannot invoke a CAD translator in PCB Editor
  t3 @5 B- D) H' Z1857745 EAGLE_TRANSLATOR   PCB_EDITOR    A CAD translator does not invoke in PCB Editor
' i: I7 S6 Z6 C: j" m( r6 e' }' H1859005 EAGLE_TRANSLATOR   PCB_EDITOR    Eagle translator is not invoking at all
1843091 F2B                DESIGNVARI    Variant Editor allows mismatched JEDEC_TYPEs in release 17.2-2016
/ C+ L9 V& ~0 R( m1719059 FSP                DE-HDL_SCHEMA Termination resistors on buses not being drawn efficiently
% B* g% ~1 {1 ^' P1823419 FSP                GUI           Net Name Template not visible in Change Net Name in Windows 10
, G/ v  k  U8 O+ B3 J9 n1480035 ORBITIO            ALLEGRO_SIP_I Die symbols are mirrored when imported back to SiP Layout
1853331 PCB_LIBRARIAN      SETUP         CPM file not updated from PCB Librarian setup
1841308 PCB_LIBRARIAN      SYMBOL_EDITOR Symbol not updated in Library View
1831269 SCM                OTHER         Blank properties of associated components are being filled with NULL
8 `0 @5 {1 l! s0 d6 C$ r" p1719057 SCM                SCHGEN        Pins off grid for voltage nets
! V7 F0 c" u# o# F1719060 SCM                SCHGEN        Pull-ups and pull-downs showing upside down in view
1732687 SCM                SCHGEN        Schematic generation deletes IO ports; says it's placing them on last page, but never places them
+ j8 w5 a. S4 k2 M, @, C1855932 SIG_EXPLORER       OTHER         For non-DML designs, SigXplorer defaulting to mils when PCB Editor design units and CM constraints are in mm
) T! T* M" |% f- {& e# k8 G1824035 SIP_LAYOUT         WLP           SiP Layout DRC GUI not reading Tcl blocks in PVS DRC rule deck
' X' |- t1 c8 v% {: D" P6 }
1 N" R6 B1 z# t( O5 J
Fixed CCRs: SPB 17.2 HF031
12-8-2017
========================================================================================================================================================
- j) f4 a4 V( NCCRID   Product            ProductLevel2 Title
! ^% A* r; K! m! `5 S0 H; `========================================================================================================================================================
1746108 ADW                DBADMIN       Adding and then saving a custom rule set in rule manager results in corrupt rules.xml
1609983 ADW                DBEDITOR      dbeditor should automatically change mechanical kit names to uppercase
% P# E2 t5 z0 y3 K1807139 ADW                DBEDITOR      Cannot add new properties, though the new properties were shown in dbeditor
1807410 ADW                LIB_FLOW      Checked-in parts not available in database
1797408 ADW                TDA           TDO crashes without displaying exception during check-in
1804500 ALLEGRO_EDITOR     3D_CANVAS     Interactive 3D canvas fails to show all placebounds of a .dra
1810758 ALLEGRO_EDITOR     3D_CANVAS     3D Viewer represents symbol incorrectly in hotfix 025 but as expected in hotfix 024
3 U5 v) n( M# ~: u2 t  O+ y1795567 ALLEGRO_EDITOR     EDIT_ETCH     Route menu has same hot key for 'Connect' and 'Convert Fanout'
1796525 ALLEGRO_EDITOR     EDIT_ETCH     AiPT is not pushing dynamic shape to add bumps to resolve dynamic phase DRC
1818170 ALLEGRO_EDITOR     EDIT_ETCH     Fanout with Outward Via direction is shorting few pins
0 p+ \5 ?# T3 p8 O3 m: Y5 w7 F1712658 ALLEGRO_EDITOR     INTERACTIV    Add connect: Pin remains highlighted even after choosing 'Done'
$ Y0 ^9 D0 h5 T5 {1727193 ALLEGRO_EDITOR     INTERACTIV    Logic - Part List truncates device names to 64 characters though database allows longer names
+ Y' q% Z# N- C( t6 V/ j# f) n1775484 ALLEGRO_EDITOR     INTERACTIV    Choosing Next with persistent snap in Show Measure disables persistent snap
, ^7 b1 s) I' @. F( a1711860 ALLEGRO_EDITOR     MULTI_USER    Multi-user lock cannot be cancelled
6 v- i" \8 J: Z1812448 ALLEGRO_EDITOR     NC            Crash when canceling NC Parameters dialog
1792987 ALLEGRO_EDITOR     PAD_EDITOR    Pad Designer does not recognize flash names longer than 31 characters
2 Y6 O& O) g* K1810958 ALLEGRO_EDITOR     PAD_EDITOR    Padstacks with offset holes
787024  ALLEGRO_EDITOR     SHAPE         Improve dynamic shape voiding in regions
( K1 C2 L7 O! b793232  ALLEGRO_EDITOR     SHAPE         Line to Shape spacing rule outside region affects shape void in region
' l9 F0 B- A* o6 s9 Q9 M/ b! g797245  ALLEGRO_EDITOR     SHAPE         Line to Shape Spacing with Region not followed
865822  ALLEGRO_EDITOR     SHAPE         The autovoid functionality should use the true line-to-shape spacing value
912051  ALLEGRO_EDITOR     SHAPE         Improve dynamic shape voiding in regions
965714  ALLEGRO_EDITOR     SHAPE         Region constraints are not working correctly on dynamic shapes
968342  ALLEGRO_EDITOR     SHAPE         Shape Voiding when crossing constraint region is taking conservative value and not the actual spacing value
974734  ALLEGRO_EDITOR     SHAPE         Shape Voiding when crossing constraint region takes conservative value and not actual spacing value
  p5 ]7 J0 V' C9 e, W* A1073908 ALLEGRO_EDITOR     SHAPE         Allow line to shape spacing in Region
1154787 ALLEGRO_EDITOR     SHAPE         Region constraints not applied correctly to dynamic shapes
1171283 ALLEGRO_EDITOR     SHAPE         Shape Voiding when crossing constraint region takes conservative value and not actual spacing value
) i. ]; J+ V, M1181767 ALLEGRO_EDITOR     SHAPE         Allow override on line to shape spacing in Constraint Region
1 o4 K5 [( f3 E/ E" l- m1183792 ALLEGRO_EDITOR     SHAPE         Allow override on line to shape spacing in Constraint Region
1 n, m0 [4 ~9 l" k( Q1186210 ALLEGRO_EDITOR     SHAPE         Line to shape spacing constraint does not follow the Constraint Region value
; Y" l8 V- }( z4 u2 a; j* u/ ^1192312 ALLEGRO_EDITOR     SHAPE         Region constraints are not working correctly.
1387021 ALLEGRO_EDITOR     SHAPE         Improve dynamic shape voiding in Regions
1447891 ALLEGRO_EDITOR     SHAPE         Resolved constraint and actual air gap differ
1465383 ALLEGRO_EDITOR     SHAPE         Line to shape spacing constraint does not follow the Constraint Region
8 k7 L; }& g9 y6 H0 U8 V1583144 ALLEGRO_EDITOR     SHAPE         Line to shape spacing inside the constraint region does not follow region rules
7 A. |3 p" Q% ?) p2 S- N8 v1591320 ALLEGRO_EDITOR     SHAPE         Resolve shape to pin constraint in constraint region
8 w* d* b8 L) u- p9 a1627305 ALLEGRO_EDITOR     SHAPE         Shape Voiding when crossing constraint region takes conservative value and not actual spacing value
1694552 ALLEGRO_EDITOR     SHAPE         Constraint region not working correctly
) g$ i: R. R+ y1 q1764474 ALLEGRO_EDITOR     SHAPE         Line to Shape Spacing for Region should be used inside region instead of conservative value
1775119 ALLEGRO_EDITOR     SHAPE         Shape voiding is not following constraint rules for dynamic shapes in a constraint region
1784916 ALLEGRO_EDITOR     SHAPE         Shapes are not voiding to other shapes against DRC settings, creating random DRCs.
1793179 ALLEGRO_EDITOR     SHAPE         'Same net shape to hole spacing' is only detecting the DRC and not voiding the shape
1803365 ALLEGRO_EDITOR     SHAPE         Region shape to shape constraints take precedence when shapes have multiple constraints
1800530 ALLEGRO_EDITOR     UI_FORMS      3D Anchor menu missing when using new style OrCAD PCB Editor menu
9 s' ?4 u7 Q5 o2 Y4 N1813604 ALLEGRO_EDITOR     UI_FORMS      3D Anchor View is not available on OrCAD PCB Editor menu.
1784710 ALLEGRO_EDITOR     UI_GENERAL    During Place Replicate and saving file with same name, the warning pop-up window does not show on top
: v) X7 u- s' v( U1784728 ALLEGRO_EDITOR     UI_GENERAL    During Place Replicate and saving file with same name, the warning pop-up window does not show on top
) _" a2 D% d, l& r3 G' B, }1721853 ASDA               CANVAS_EDIT   Movement of components results in shorts and inconsistent routing
4 H1 [0 x- j5 }) ^6 c1802120 ASDA               CONTEXT_MENUS Ports are selected though filter is set to Components
" Z4 N: t9 v9 \- o+ C3 N1 W1803832 ASDA               MISCELLANEOUS Browse and select new libraries without editing cds.lib
1804643 ASDA               TABLE         Exception when pasting table data from third-party tool in SDA
& A" f5 }7 b8 {& x8 @2 l1794004 CAPTURE            LIBRARY       Diode pin numbers different in Capture in release 16.6 and 17.2-2016
* n  E7 T6 O8 `* B( _# G) j4 Z1735506 CAPTURE            OTHER         File menu is missing in Capture
1766663 CAPTURE            SCHEMATICS    Capture crashes during part placement
1762181 CAPTURE            SCHEMATIC_EDI Crash on 'Push Occ. Prop into Instance'
1786762 CAPTURE            SCHEMATIC_EDI 'Remove Occurrence Properties' and 'Push Occ. Prop into Instance' corrupt database
% c9 l2 U/ q" K" s$ Y1759424 CIS                PART_MANAGER  Unable to save the link database part from part manager
, U% x5 F4 b9 l; |- K/ K1802670 CONCEPT_HDL        CORE          Variant commands take 6 to 10 hours to run on a block
; u5 ~; Y8 L! f# ~, d9 h1816798 CONSTRAINT_MGR     CONCEPT_HDL   CM API ACNS_DESIGN returns the design name in mixed case
1812656 CONSTRAINT_MGR     DATABASE      Constraint Value specified at the DEFAULT PCSet/SCSet is not shown in bold blue
  L4 K# w- d. O! w1635766 CONSTRAINT_MGR     UI_FORMS      Worksheet views are not changed as per input
' j+ P& B) [. N1 K1700505 ECW                PART_LIST_MAN Shopping Cart Quantity is not read or not displayed in Pulse
1797371 ECW                PROJECT_MANAG Clicking on another project sometimes takes you to the default project instead of the project you click on
1843526 INSTALLATION       TRIAL         Trial installer should not check disk space in update licensing mode
1762148 PCB_LIBRARIAN      SETUP         Part Developer: Text not readable in Setup form
1770760 PCB_LIBRARIAN      SYMBOL_EDITOR Symbol Editor does not remember the last size of the window
1773604 PCB_LIBRARIAN      SYMBOL_EDITOR Option to switch between the new and legacy Symbol Editors
' {: t) U" w/ s1800354 PCB_LIBRARIAN      SYMBOL_EDITOR Resistor has too many lines and looks wrong in new symbol editor
8 G& u" P2 a; Q4 C9 {1813346 PCB_LIBRARIAN      SYMBOL_EDITOR Resistor looks different with multiple diagonal lines in new Symbol Editor but looks normal in DE-HDL
1815279 PCB_LIBRARIAN      SYMBOL_EDITOR Unable to change Grid Settings from Lines to Dots
3 S6 h: D6 ?3 X$ ?8 F1738603 PSPICE             DIG_SIMULATOR Release 17.2-2016 PSpice digital model: Delay defined by PINDLY is not taken into account
$ Z' E9 L" ^  ^) b, y1802905 PSPICE             ENCRYPTION    Incorrect option shown in PSpiceENC syntax in usage detail
1765345 PSPICE             ENVIRONMENT   Custom distributions are not added to the dropdown
9 f! N0 w: X  w& X4 F. P1784856 PSPICE             ENVIRONMENT   PSpice ignoring directory changes for Save check point in simulation setup session
1817805 PSPICE             ENVIRONMENT   Incorrect result for PSpice 'Start saving data after'
% G8 c& y+ _" V+ |9 c1784507 PSPICE             FRONTENDPLUGI Spelling of 'Definition' in PSpice Part Search is not correct
1801790 PSPICE             LIBRARIES     SAC model giving errors
1738776 PSPICE             SIMULATOR     PSpice simulation stops before TSTOP
. Y$ l9 V" c4 @) q8 U! \1795950 PSPICE             SIMULATOR     Simulation cannot be completed in release 17.2-2016 but is completed in release 16.6
1803407 PSPICE             SIMULATOR     Getting convergence error on a model
  d  ^) q" E. z+ ?- L- k1814759 PSPICE             SLPS          .INC file is not working with SLPS
7 N# n, m  w$ c1715859 SIP_LAYOUT         ETCH_BACK     Etchback mask not overlapping each other; creating floating metal
& p& S' u) h! x: p2 t2 M1 u3 C6 `! [1729523 SIP_LAYOUT         INTERACTIVE   When creating a bond finger solder mask the results do not match the required settings
1800069 SIP_LAYOUT         INTERACTIVE   Corrupt dra/psm symbol, but the reason is unclear
* B* a" i. {5 r% E% C1756620 SIP_LAYOUT         SHAPE         Performance issue when moving vias.
1782928 SIP_LAYOUT         SHAPE         Shape merging (logical operation) shows error though measuring shows elements are correctly spaced
  l+ o: y& {; F' h0 p, T1816454 SIP_LAYOUT         THIEVING      Thieving: need thieving as a specific data type in CM to better control the filling pattern
1728026 TDA                CORE          Check-in should not require all child objects to be checked in specially if they are not checked-out
% w# z2 q  l/ h% V  ~0 n1823976 TDA                SHAREPOINT    Connection to server terminates when joining a project
) |/ U0 V- p( q

Fixed CCRs: SPB 17.2 HF030
1 g$ d  c" P( L; \' L3 T2 v0 o11-17-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
# ~/ o" p) ~5 p# x========================================================================================================================================================
0 N+ i" ~# C( Z1821774 ADW                DBEDITOR      MPN is tagged Pending Purge after deletion and lib_dist
1829549 ALLEGRO_EDITOR     DRC_CONSTR    Dynamic phase DRC marker displayed at the design origin
% \7 P) G; e! n: y5 s1690998 ALLEGRO_EDITOR     INTERFACES    Runtime error when running PDF Publisher
1805203 ALLEGRO_EDITOR     INTERFACES    Runtime error when exporting smart PDF on a large board with all film layers selected
: s: v# y- I5 @+ [" L4 g0 `6 J0 X1811698 ALLEGRO_EDITOR     INTERFACES    Runtime error while exporting PDF
1823818 ALLEGRO_EDITOR     INTERFACES    Cannot map some step models
1750654 ALLEGRO_EDITOR     MANUFACT      Cut marks cannot be generated on cut outline.
- ~# r( f( A6 J; X1828293 ALLEGRO_EDITOR     NC            Incorrect status returned for backdrill
1825401 ALLEGRO_EDITOR     PADS_IN       In PADS library translation, pads_lib_in fails to create Placebound_Top as a shape
) Y- n3 t( ]2 f0 m, i8 M1825427 ALLEGRO_EDITOR     PADS_IN       Symbol drawing files (.dra) created after PADS Library translation are not getting renamed to their decals
1825460 ALLEGRO_EDITOR     PADS_IN       Pins are moved from their correct locations during PADS Library Translation
6 J! u( K- A' p; e4 @' x5 B4 G! n1831200 ALLEGRO_EDITOR     PLOTTING      Incorrect PDF output for traces
1321314 ALLEGRO_EDITOR     SHAPE         Force update of dynamic shape generates thermal tie that causes net to short
5 c+ N5 ^4 D: O7 ?0 F1647585 ALLEGRO_EDITOR     SHAPE         Void around holes is not circular but of the shape of the bounding box
1830676 ALLEGRO_EDITOR     SHAPE         XHatch Shape not voiding properly
1821286 ALLEGRO_EDITOR     SKILL         Using axlSetParam to set static shape clearance parameter crashes PCB Editor
% W6 T( r" |( ?2 ]& R. J' a1804662 ASDA               DARK_THEME    Dark Theme: Change color of selected cells in Rename signals dialog so user can see they are selected
1817486 ASDA               NEW_PROJECT   Need to save a project with a new name, 'copyprojectas' does not seem to work
+ T6 ]1 a* t" C2 R! I1826023 ASDA               NEW_PROJECT   SDA requires user to go into project settings window twice to add a library
1830632 ASDA               SCRIPTING     SDA crashes when you type 'find -types' in the Tcl command window
1 `* r* o! g. P  E- ^$ b# m" p, a1798864 ASDA               VARIANT_MANAG Retain default part visibility when substituting preferred part for variant
1798865 ASDA               VARIANT_MANAG Value attribute of variant is off while printing though on for default and view
& q! P2 }) y) V, d1 q1798866 ASDA               VARIANT_MANAG Variant Printing: Pin numbers printed though set to off on default part
1831836 ASDA               VARIANT_MANAG Cannot delete existing variants in design
! {7 d3 L, \2 h# w1821120 CONCEPT_HDL        CORE          SIGNAL_MODEL attached to a component is not displayed on the canvas in the Attributes form
1824714 CONCEPT_HDL        CORE          Display issue: Page border disappears when running the command _movetogrid
% h1 r" i6 X$ r- z* g; [1822587 CONCEPT_HDL        CREFER        CRefer crashes on a hierarchical design using split blocks
1825461 CONSTRAINT_MGR     CONCEPT_HDL   Uprevving to release 17.2-2016 adds NO_XNET_CONNECTIONS on components having custom models
1825968 CONSTRAINT_MGR     DATABASE      cmxlGetObjects returns all the aliased nets and the physical net that goes to the netlist
! K5 w( j* h* {% l: g8 Q1819622 CONSTRAINT_MGR     XNET_DIFFPAIR Discrete with NO_XNET_CONNECTION removed from topology when extracted with Routed Interconnect
/ D/ `, O+ ?) ^  f- `1829762 ECW                PROJECT_MANAG Pulse log in: Multiple processes triggered, generating many zip file packets and corrupting many of the packets
9 y" q& R: k( r& d- _1810296 F2B                BOM           BOM includes status column,  nothing should ever be forced on a users BOM output
1824593 F2B                PACKAGERXL    PXL crashes and removes the pxl.log file from the Packaged directory
1832005 F2B                PACKAGERXL    Message stating 'PXL has stopped working' when packaging design
& t4 {& Y" w/ Z  O+ [1822912 RF_PCB             AUTO_PLACE    rf_autoplace fails for RF component containing variable
1803731 SIP_LAYOUT         DXF_IF        DXF export from 'Component Geometry/Pin_Number' subclass not working in release 17.2-2016
0 ~5 @" |5 g; V% w2 i1825478 SIP_LAYOUT         SHAPE         When running the Shape Islands report it is listing all the Fillets as Islands


  A- {( R, J' e* |: d) e9 ^Fixed CCRs: SPB 17.2 HF029
" m5 Z9 r6 r" ?* k7 s' M, u2 w( D11-3-2017
========================================================================================================================================================
" ]" Q6 w2 ^% D5 W1 FCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1814597 ADW                DBEDITOR      Associate part classification is very slow in release 17.2-2016 of Allegro EDM
; a5 L& K# \9 e3 H% ?1733482 ADW                FLOW_MGR      After installing QIR3, Flow Manager prompts with Java Help question
1814789 ADW                PART_BROWSER  PTF shows data in old component browser but not new component browser
1808620 ALLEGRO_EDITOR     DFM           Missing graphics in new drc browser.
1814558 ALLEGRO_EDITOR     DFM           Silkscreen checks do not work if silkscreen is defined as mask in cross section
1 Q* w' K3 Q+ S1807996 ALLEGRO_EDITOR     EDIT_ETCH     Route Clearance View is not using the correct spacing constraint when nets are partially routed in a region
1747929 ALLEGRO_EDITOR     INTERFACES    Cannot import logo/bmp on a .dra file
1820142 ALLEGRO_EDITOR     INTERFACES    pdf_out command not supporting UNC paths for the output pdf file
$ y) Y( x/ d" f1 q2 I- b1671865 ALLEGRO_EDITOR     MANUFACT      Exceeding 20 characters in Artwork Control Form - General Parameters - Prefix displays 'Illegal Character(s)' error
1710032 ALLEGRO_EDITOR     MANUFACT      Adding Artwork prefix gives error for illegal characters
7 D1 T/ V- h4 s4 j6 C: a. D1714911 ALLEGRO_EDITOR     MANUFACT      ERROR: 'illegal character(s) present in name or value' while adding prefix in Artwork Control Form
7 }7 D* |) [( g) w$ B1813950 ALLEGRO_EDITOR     MANUFACT      In the drill chart, the titles 'tolerance_drill' and 'tolerance_travel' seem to be reversed
1820970 ALLEGRO_EDITOR     MANUFACT      IDX_EXCLUDE and BOM_IGNORE excluding objects from IDX export
1822045 ALLEGRO_EDITOR     PARTITION     Shape fillet becomes static shape and loses fillet attribute after importing partition
1776181 ALLEGRO_EDITOR     SHAPE         Placing via arrays around a differential pair places vias only for one net
1817283 ALLEGRO_EDITOR     SHAPE         Allegro PCB Editor Show Measure Air Gap shows a very large number
1815595 APD                DRC_CONSTRAIN Differential pair spacing constraint not propagating to physical cset nets
1785116 APD                SHAPE         Big size die performance issue
1811134 APD                STREAM_IF     GDS stream out with 2000 precision has sharp edges along shapes.
1811882 APD                VIA_STRUCTURE High-speed via structure refresh fails
1814878 ASDA               DARK_THEME    Part Manager: Difficult to read black text on black background
1814889 ASDA               DARK_THEME    Change 'updating route in progress' message color: a bright orange bar in dark theme is difficult to read
1817355 ASDA               PAGE_MANAGEME Double-clicking a library in project preferences library does not move the library but changes appearance
$ z* F& A# x' `6 O' K* b) K7 j' o. a1817964 ASDA               SHORTCUTS     User Preferences shortcut misspelled
7 W% `5 u2 `. H3 p- P1820247 CONCEPT_HDL        CORE          DE-HDL crashes while saving a design
1823187 CONCEPT_HDL        CORE          DEHDL allows editing of the locked component's refdes using change text editor
1824052 CONCEPT_HDL        CORE          Trying to edit on a group containing a LOCK component, deletes the packaging data on the schematic
/ U) `9 _2 O$ s! I1813987 CONSTRAINT_MGR     OTHER         PCB Editor crashes when Constraint Manager is closed
' Z2 N. F, z% f. m7 \1821129 CONSTRAINT_MGR     XNET_DIFFPAIR Uprev to release 17.2-2016 adds unwanted NO_XNET_CONNECTION property to discrete symbols
1814725 PSPICE             PROBE         PSpice Measurements crashes PSpice for a digital simulation
# j# m$ E  g! V5 }) J1808672 SIP_LAYOUT         INTERACTIVE   create bounding shape command options: 'Min Area' and 'Sync with shape layer'
1817458 SIP_LAYOUT         MANUFACTURING Error in DXF conversion after updating SiP Layout  from Hotfix 066 to 082 in release 16.6
1 c% x0 @% \2 ^

Fixed CCRs: SPB 17.2 HF028
1 `; [% y8 H+ N10-14-2017
6 p4 V6 K9 f- S========================================================================================================================================================
) C9 c7 M1 d0 q' q/ FCCRID   Product            ProductLevel2 Title
, v( x9 b/ v+ [7 h* R========================================================================================================================================================
1773530 ADW                FLOW_MGR      DE-HDL hangs on importing components from another design or copying and pasting components within a design
% a- o! S6 H( P4 q; K% [2 U1790584 ADW                FLOW_MGR      SKILL code for comparing two PCB Editor .brd files does not work in EDM in release 17.2-2016
1794116 ADW                FLOW_MGR      LRM fails to run on project
1 |9 O* l7 U1 t) Q% B8 Y1811532 ADW                FLOW_MGR      The message for missing tools.jar should not appear in adwcopyproject.log
9 m( B4 M  B+ O1812109 ADW                LRM           Library revision manager displays errors while re-importing updated sub-blocks
$ c1 T' `+ Q* ]5 \1771851 ADW                PCBCACHE      Problem in packaging upreved imported block
! M) }8 G" M5 f1 [3 @1814785 ALLEGRO_EDITOR     3D_CANVAS     PCB Editor crashes when a bend is created and then viewed in 3D Viewer
' V2 ?, D1 E& W# G9 A7 n/ n1800131 ALLEGRO_EDITOR     DATABASE      allegro_downrev_library utility fails on Windows 10
1 |/ g  O/ K* b' C: h1814607 ALLEGRO_EDITOR     DFM           DFM check for soldermask does not include Package Geometry/ Soldermask if the soldermask is part of stackup
1813996 ALLEGRO_EDITOR     EDIT_ETCH     Add Connect crashes PCB Editor if clearance view is set to channel
1810832 ALLEGRO_EDITOR     SCHEM_FTB     Error while doing Export Physical from DE-HDL to PCB Editor
1811785 ALLEGRO_EDITOR     SCHEM_FTB     Import > Logic > Import Directory does not resolve the relative path to the packaged folder
1814166 ALLEGRO_EDITOR     SCHEM_FTB     Error message when exporting design to board using an earlier version of database
! ~$ P/ B! m" \( g1817891 ALLEGRO_EDITOR     SCHEM_FTB     Error message when exporting design to board using an earlier version
1818954 ALLEGRO_EDITOR     SCHEM_FTB     Error message when exporting design to board using an earlier version of database
8 E1 E+ D9 K' A, `4 k8 a; q9 v1812808 ALLEGRO_EDITOR     SHAPE         Artwork is different from PCB board
1814836 ALLEGRO_EDITOR     SKILL         Doing zcopy Xhatch pattern crashes PCB Editor in release 17.2-2016
; V, Y0 X0 x# i1 E% i: b1772218 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor stops responding on Show Element
1778353 ALLEGRO_EDITOR     UI_GENERAL    Intermittent PCB Editor crashes on loading IDX in release 17.2-2016 Hotfix 020
1818077 ALLEGRO_EDITOR     UI_GENERAL    axlViewFileCreate disappears behind window or is blank
. }; {& P/ X5 g1807423 ASDA               NEW_PROJECT   SDA CPM file has erroneous date
8 r" M# U: ]9 J* ^1809597 CONCEPT_HDL        CORE          Problem auditing SI model in Allegro Design Entry HDL from Hotfix 025 onward, no problem in Hotfix 024
1810322 CONCEPT_HDL        CORE          Unable to package design if OK_NET_ONE_PIN property is set
1813436 CONCEPT_HDL        CORE          Read-only block import issue in same session: displays error message SPCOCD-553
+ G; M$ L8 p1 `- V9 ?. X1813912 CONCEPT_HDL        CORE          The response in DE-HDL is sometimes extremely slow
# ^( R2 T* X; {1812506 CONCEPT_HDL        INTERFACE_DES Error messages during packaging followed by a success message though there are errors in design
" c$ z" a( O# [/ \% j7 j! E1808677 CONSTRAINT_MGR     CONCEPT_HDL   Auto-generation of differential pair finds several instances of the same net
1808898 CONSTRAINT_MGR     CONCEPT_HDL   Unable to resolve the ECSet mapping errors if the topology has pin of PINUSE POWER & GROUND
% Y# a& h9 P" L4 a4 N3 O1810320 CONSTRAINT_MGR     CONCEPT_HDL   DE-HDL - Constraint Manager:  Cannot add group to net class if a net in group is a member of the net class
" }, k& m/ a6 I- q1812459 CONSTRAINT_MGR     CONCEPT_HDL   Auto-generation of differential pairs has issues
1796234 CONSTRAINT_MGR     OTHER         PCB Editor crashes on query (ALLOW_ON_ETCH_SUBCLASS) without data type defined
3 h: r5 E7 Z4 @9 `1811692 CONSTRAINT_MGR     OTHER         Constraint Manager: Set Topology Constraints - Rel Prop Delay - Pins is empty in release 17.2-2016 Hotfix 026
1816311 CONSTRAINT_MGR     XNET_DIFFPAIR Extracting a differential pair into SigXplorer crashes DE-HDL
: O0 h/ P; n9 z* b- h2 w1807593 ORBITIO            ALLEGRO_SIP_I Die symbol shifts when importing die from OrbitIO to SiP Layout
1800763 PSPICE             SLPS          Error while running co-simulation in MATLAB for PSpice-SLPS demo designs
( g1 t' U- T5 Q' Y* M, t" {

Fixed CCRs: SPB 17.2 HF027
6 K, o' Z* o: @$ i. F09-29-2017
2 h* g- {- f# O6 E7 l3 `========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
; c) C: K4 k% |1 u2 H5 f) U/ j========================================================================================================================================================
1795353 ADW                FLOW_MGR      Tool unable to find project in windows_project.txt
1810386 ADW                FLOW_MGR      Error regarding not finding project in 'windows_project.txt'
- P1 Z3 E, L8 G; S1 a, x1743732 ADW                LIBDISTRIBUTI adwserver -install does not give error if it cannot connect to server.
- ]2 i2 X# w7 g% B! k5 T1804378 ALLEGRO_EDITOR     3D_CANVAS     Bend area issues in 3D Viewer
1795312 ALLEGRO_EDITOR     DATABASE      Cannot unlock symbols as status is changed to View on opening design
: ?. q2 b7 s3 f- q9 K1803262 ALLEGRO_EDITOR     DATABASE      Donut pad With DYN_THERMAL_CON set to FULL_CONTACT has connectivity issues
$ h9 f( c/ K% o; A+ d2 @1802183 ALLEGRO_EDITOR     DFM           Using mouse wheel to scroll error information in DRC Browser changes font size
  d- R6 o. e5 ]8 K2 h& n1797222 ALLEGRO_EDITOR     DRC_CONSTR    Updating DRC results in error 'SPMHDB-403'
6 O- n' v/ l& }, R1792163 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashes on moving components
7 m. p1 G" n0 j- y1806640 ALLEGRO_EDITOR     INTERFACES    Step Mapping not working in release 17.2-2016 Hotfix 025
1807278 ALLEGRO_EDITOR     INTERFACES    Running 'step_export_product_asm.exe' displays 'vcruntime140.dll' missing error
1 G. k5 A  t/ b. v3 |1807286 ALLEGRO_EDITOR     INTERFACES    The facet file (.xml) for the STEP model 'modelname.step' cannot be found.
) D2 R( g! b; y# g1808006 ALLEGRO_EDITOR     INTERFACES    Facet file for step model cannot be found
' D8 s# |* o+ d( I! Y+ F, R! N1704335 ALLEGRO_EDITOR     MANUFACT      Documentation Editor shows an error about backdrill while no backdrill was used in the design
, }9 c  s: d5 S8 C, |' {1800115 ALLEGRO_EDITOR     MANUFACT      IPC2581 Export giving error that backdrill is out of date even though no backdrill is defined in the design
3 m4 a) g, J" D; Z& }1799444 ALLEGRO_EDITOR     PLACEMENT     Via Array - Boundary placement fails with error
* Y8 r0 k. d6 H1 }5 ^5 ^' o$ P1725242 ALLEGRO_EDITOR     SHAPE         'Same net shape to hole spacing' is only detecting the DRC and not voiding the shape
1804129 ALLEGRO_EDITOR     SHAPE         XHatch Shape not voiding properly
) R0 b4 I1 d1 M9 B1805238 ALLEGRO_EDITOR     SHAPE         PCB Editor crashes while importing netlist
6 v& Z" Z/ i3 p$ d1803542 ALLEGRO_EDITOR     SKILL         Using axlPadstackEdit to change drill size causes via net to change in release 17.2-2016 Hotfix 025
1800774 APD                STREAM_IF     Only one pad in GDSII when running 'stream out' with the Flatten Geometry option
! Z5 t5 E0 s+ r: ^4 s1804196 APD                STREAM_IF     Component is mirrored by X-axis instead of Y-axis on enabling mirror geometry
) D* g' o% ^& n! l2 m" I" \1803375 ASDA               IMPORT_BLOCK  Import HDL Block fails with message regarding Xnet states and DML independence
; @( I# Z* I9 o1807423 ASDA               NEW_PROJECT   SDA CPM file has erroneous date
1789400 CAPTURE            SCHEMATIC_EDI Capture schematic opens unannotated pages on search
1801573 CONCEPT_HDL        CONSTRAINT_MG Upreving release 16.6 design to 17.2-2016 adds NO_XNET_CONNECTION to some components
1810586 CONCEPT_HDL        CONSTRAINT_MG DE-HDL crashes when transferring XNET properties to similar components in a read-only block
& y* K$ j( x$ }0 C% _: a! X8 z1794169 CONCEPT_HDL        CORE          _automodel command crashes DE-HDL if PACK_IGNORE is set
9 v& G4 t% {, g. Q: Z1798672 CONCEPT_HDL        CORE          Dashes in design name creates an extra design folder in worklib after upreving to release 17.2-2016
1802258 CONCEPT_HDL        CORE          Locking unlocked components results in a warning (SPCOCN-3403)
1803019 CONCEPT_HDL        CORE          DE-HDL crashes on backannotation
1803615 CONCEPT_HDL        CORE          After running 'Mark for Variant', the block cannot be changed to blue
1804029 CONCEPT_HDL        CORE          Visibility issues when using the LOCK functionality
& F3 g5 L. D$ I) A, p1806352 CONCEPT_HDL        CORE          Group Mirror is causing design corruption.
; V7 d( k+ U( V) X1806978 CONCEPT_HDL        CORE          Cannot mirror a group of  objects
# x' P2 P/ T+ s  Y1810387 CONCEPT_HDL        CORE          Mirroring groups causes erratic display and may corrupt database if project is saved
4 Q/ k' z* d  V1812811 CONCEPT_HDL        CORE          Schematic group mirror not working
5 g) m2 h8 V# n$ \1 F: E1810401 CONCEPT_HDL        INFRA         Add Signal Name: Cannot select suggested net name
1787409 CONCEPT_HDL        PDF           Minus character at the end of netname causes unexpected string concatenation during PDF Publish
1800931 CONSTRAINT_MGR     OTHER         Even after removing NO_XNET_CONNECTION on parallel termination, topology extracted has duplicate capacitors
) P# x4 d3 G- O: {# L1790106 CONSTRAINT_MGR     SCM           Cannot find the constraints file (0) in the schematic project
0 m7 r+ I' r: @: T* x1787117 CONSTRAINT_MGR     UI_FORMS      Creating bundle in Constraint Manager crashes PCB Editor
) ]: \0 K' g; N- e  ~& Q1797384 ECW                METRICS       Pop-up metrics value tool tip is translucent, making values hard/impossible to read
& N! ^2 [; J* F. u. Z1803226 ECW                METRICS       Pop-up metrics value tool tip is translucent, making values hard/impossible to read
1664059 ORBITIO            ALLEGRO_SIP_I Incorrect connectivity after .brd import
4 [5 m  a9 ^# s! g# R1799338 SIP_LAYOUT         DRC_CONSTRAIN Multi-threaded DRC fails with internal memory error even after setting shape_cache_size
1799499 SIP_LAYOUT         DRC_CONSTRAIN Multi-thread DRC fails
! a: p6 R, H' R0 M5 ?, E& E1806585 SIP_LAYOUT         DRC_CONSTRAIN Multi-threaded DRC update aborted: internal memory resource depleted
1809804 SIP_LAYOUT         DRC_CONSTRAIN Error message while updating DRCs in release 17.2-2016 Hotfix 026 regarding shape_cache_size
! K' R3 X3 ~& L: b6 i3 h' W2 w1788770 XTRACTIM           ENG           Translated bump / ball conductivity is wrong (PowerDC and XtractIM)
% f) T0 A! D& V( ?, I7 v

Fixed CCRs: SPB 17.2 HF026
09-15-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
" x' ^7 R( T9 e6 u========================================================================================================================================================
( c( f) {; ^1 `1765398 ADW                DATAEXCHANGE  Duplicate  MPNs are created when updating MPN classification properties with data exchange
% J+ u3 j$ ^7 L% }5 g2 b9 N) X1780147 ADW                DBEDITOR      'Associate Footprint from Tree' does not log the information
; P" N9 r! Q7 O; X4 ?( B: y0 ^1790134 ALLEGRO_EDITOR     DATABASE      Correct spelling  in Layer Function definition
1792345 ALLEGRO_EDITOR     DATABASE      Pastemask is added to bottom layer on backdrilled pins
5 V  K. w8 t) S1792930 ALLEGRO_EDITOR     DATABASE      Uprev required for all libraries and padstacks to use release 16.6 DRA in release 17.2-2016
$ [9 h" M7 l. R+ s' O1781203 ALLEGRO_EDITOR     DFA           DFA Spreadsheet Editor not starting from Windows Start menu
1797422 ALLEGRO_EDITOR     DFA           DFA Spreadsheet Editor not starting from Windows Start menu
+ {, ]: A, A) A' Y' h8 c1770694 ALLEGRO_EDITOR     INTERFACES    Incremental IDX does not place unplaced components
% q6 W0 ~) b1 u+ e1776791 ALLEGRO_EDITOR     INTERFACES    STEP file not displayed in PCB Editor for mapping
! x5 X5 X$ }8 B9 q$ u1783515 ALLEGRO_EDITOR     INTERFACES    PCB Editor reading step model incorrectly
9 F$ k( d4 j4 l) I8 c; _1781485 ALLEGRO_EDITOR     MANUFACT      Setting ipc2581attrpath results in error 'E- ipc2581attrpath: Variable not defined'
9 A8 j: W! b/ D, o1772713 ALLEGRO_EDITOR     MULTI_USER    Allegro Symphony Server rejects group moves
/ K, b$ _; [  t- F$ ?1789853 ALLEGRO_EDITOR     MULTI_USER    Symphony Server rejects updates and hangs frequently
1725591 ALLEGRO_EDITOR     OTHER         File - Export PDF crashes on the design attached
1736324 ALLEGRO_EDITOR     OTHER         Export - PDF fails to export PDF
8 Q6 b  B0 f& A: E0 X* s7 k1794071 ALLEGRO_EDITOR     PLACEMENT     The placement of component is very slow and takes around 3 to 5 minutes per component.
1496199 ALLEGRO_EDITOR     SHAPE         Overlapping route keepouts result in a broken shape.
1760146 ALLEGRO_EDITOR     SHAPE         Void offset in Artwork but not in board for a particular instance only
1770372 ALLEGRO_EDITOR     SHAPE         Overlapping shapes merged in artwork shifts void causing a manufacturing short
  w& m3 v6 d" @1793419 ALLEGRO_EDITOR     SHAPE         Unexpected shape void in artwork in release 16.6
1 @- h+ U/ s8 [9 \3 T1796666 ALLEGRO_EDITOR     SHAPE         DRCs for out-of-date shape while placing single via
3 F- u7 d3 c7 K- E" h8 _4 a7 |1786386 APD                EXPORT_DATA   Exported dra and pad files do not have right stackup
1765673 APD                SHAPE         Shape in Cu1 and Cu3 cannot void correctly
/ A5 R/ @6 A+ Z' ^; V1782418 APD                SHAPE         Artwork is showing unnecessary horizontal lines
% w0 q+ k- \, p6 F2 Q$ u1778366 CONCEPT_HDL        CHECKPLUS     CheckPlus not printing logic design name
" ^9 G! I, _2 ]" ]3 Z" ~" O: p/ s1723855 CONCEPT_HDL        CORE          Cannot use Rename Signal for unnamed wire segment if the wire has a branch to the same instance
1755174 CONCEPT_HDL        CORE          Unable to create XNETs on the read-only blocks
1765533 CONCEPT_HDL        CORE          Strokes are slow to respond in release 17.2-2016
4 b: v% u6 W2 T5 l( H7 p- C2 G1780253 CONCEPT_HDL        CORE          In Windows mode, with copy command still active and symbol on cursor, DE-HDL stops responding on pressing Delete key
; a' ]1 r- W: x7 a& Z1785069 CONCEPT_HDL        CORE          Warning box for SPCOCN-2251 needs to be resized and the text formatted correctly
1786030 CONCEPT_HDL        CORE          Packager fails in release 16.6 but runs successfully in release 17.2-2016
3 I' H" G- c. ?% L) Y1788077 CONCEPT_HDL        CORE          Creating new window (new tab) in DE-HDL resets view of original window
1788591 CONCEPT_HDL        CORE          Wrong pin number displayed after running packager
1 M# @8 h: Z0 G' @! h8 F; i: q8 ?1776774 CONCEPT_HDL        CREFER        CRefer crashes without error entry in log file
1328320 CONCEPT_HDL        PDF           Cannot select/search sig_name in published PDF
( q) r3 y9 a% \$ E2 E1787409 CONCEPT_HDL        PDF           Minus character at the end of netname causes unexpected string concatenation during PDF Publish
- P* q5 R* {- ?* @4 {0 m5 T1758122 CONSTRAINT_MGR     ANALYSIS      Extracted topology for a differential pair is missing a pin-to-pin connection in the top file
1786161 CONSTRAINT_MGR     CONCEPT_HDL   Random crashes in release 17.2-2016 while working on the schematic editor along with Constraint Manager
1788877 CONSTRAINT_MGR     DATABASE      Constraint Manager API cmxlImportFile looks for sub-string during replace mode and not explicit names
1800263 CONSTRAINT_MGR     OTHER         DE-HDL and CM crash when deleting regions
; K- Q2 C& Z0 E! A1792000 CONSTRAINT_MGR     UI_FORMS      Data type of constraint not shown in GUI
8 `( i! r' i2 x" ^/ s$ f1744828 FSP                CAPTURE_SCHEM Button appears during 'Generate OrCAD Schematics'
1747568 ORBITIO            OTHER         Import of .oio file in SiP Layout takes a long time
. h  l" I/ |  E3 Y+ @1765229 PSPICE             AA_FLOW       Not able to run PSpice MC after setting Assign Tolerance
1770174 PSPICE             MISC          Issues with DMI Template Code Generator
9 _& B  J% q5 P& n7 r

Fixed CCRs: SPB 17.2 HF025
08-25-2017
========================================================================================================================================================
8 {7 r+ w3 j" R. g; jCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
* _- ?0 a" D3 N2 P1258913 ADW                ADWSERVER     Copy project message: Unable to locate tools.jar
0 v5 `" I- K7 j4 Q0 Q1760866 ADW                ADWSERVER     Metrics dashboard in Allegro EDM Configuration Manager does not show updated SPB 17.2 hotfix
1055946 ADW                ADW_UPREV     Set PTF_SUBTYPE SEARCHABLE to false and default value to exclamation mark
1508163 ADW                COMPONENT_BRO Manufacturers Part tab disappears on clicking anything other than the part number in the left tree
1 e: |. o! i' \- x+ q1774164 ADW                COMPONENT_BRO In release 17.2-2016 Hotfix 22, DE-HDL crashes on using Generate View
1345018 ADW                DBEDITOR      Database Editor does not catch empty mandatory properties if no changes are made to the part
& G! d- K0 N, \0 _* _$ Y/ W1586858 ADW                DBEDITOR      'Access Denied' Error while opening Datasheet Model using Launch Viewer in Database Editor
( r% S3 K4 A; c+ N# Y' P' c( C1754185 ADW                DBEDITOR      Max Height value in DBEditor is different from PCB Editor
( G5 E* }8 l  y7 R1719260 ADW                FLOW_MGR      Configuration error on a fresh install of EDM in release 17.2-2016 Hotfix 014
1743730 ADW                LIBDISTRIBUTI .lis file error in install_model while using MLR.
! x( t2 G- K( A9 u: L& Q1757178 ADW                LIBIMPORT     back-end libimport failed, crash and existing flashmodel not found
1648609 ADW                SRM           PCB Editor stops responding when launched with -s option in release 16.6-2015 Hotfix 078
& X& d9 m/ W0 W2 F. R1731152 ADW                TDA           TDO coredumps after a new object has been checked in as minor and deleted.
2 Q3 E, a+ g0 F% i7 W: K$ m8 L1766998 ADW                TDA           TDO-ASA: Cannot enable the project for team design until a component is added to the new ASA/SCM design
9 ]3 _4 `- Z: W) \6 s2 M1695240 ALLEGRO_EDITOR     3D_CANVAS     Interactive 3D View of a package symbol not showing the correct mapped STEP file attached to the package symbol
1698148 ALLEGRO_EDITOR     3D_CANVAS     Allegro 3D Viewer crashes on Windows 10
1738655 ALLEGRO_EDITOR     3D_CANVAS     Interactive 3D canvas crashes on Windows 10
. V! S" W5 U; a1750001 ALLEGRO_EDITOR     3D_CANVAS     Interactive 3D Canvas crashes on selecting in symbol view
& z4 s! y4 d+ o- y8 j4 V: M  L/ s1751796 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas shows component placed at wrong layer for Embedded components
- j2 h( G* B9 n3 F5 L3 r1 V4 x1768775 ALLEGRO_EDITOR     3D_CANVAS     Allegro 3D canvas closes when Update Symbol is done and cannot be re-invoked
% j' A3 H4 \* C1695025 ALLEGRO_EDITOR     ARTWORK       Artwork film show shorts.
1708674 ALLEGRO_EDITOR     COLOR         Dehighlight all should disable the check boxes in the color dialog/nets
1735522 ALLEGRO_EDITOR     COLOR         In release 17.2-2016, PCB Editor crashes when not being able to write the CVSettings.xml file.
" m: z, Q6 ]4 Y1 S% b( q1764475 ALLEGRO_EDITOR     COLOR         Allegro PCB Editor hangs when selecting OK on the Color Dialog form
1718438 ALLEGRO_EDITOR     CROSS_SECTION User interface is inconsistent for the Mask Layer Subclass site file editor.
$ a- h# M3 W* K1765387 ALLEGRO_EDITOR     CROSS_SECTION Cross Section Editor does not retain or remove layers added/removed from Setup-->Subclasses
1714910 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes with blank allegro.jrl file when a release 16.6 board is opened in release 17.2-2016 Hotfix 013
3 E) m! v# n9 m+ @( m1769534 ALLEGRO_EDITOR     DATABASE      DBDoctor unable to delete invalid subclass
1775705 ALLEGRO_EDITOR     DATABASE      Updating stackup in PCB Editor does not change backdrill status to 'Out-of-Date backdrills'
1778608 ALLEGRO_EDITOR     DATABASE      Rigid Flex design: Components with pads defined on the TOP and BOTTOM layers are not placed on the correct layer
1778644 ALLEGRO_EDITOR     DATABASE      Allegro PCB Editor crashes while trying to place dimensions
( o& l6 i2 g6 a7 e1698695 ALLEGRO_EDITOR     DRC_CONSTR    Line to Mech-Pin DRC not displayed
1705214 ALLEGRO_EDITOR     DRC_CONSTR    Shape to drill DRCs not getting void and 'cns_show' does not report constraint value
1722841 ALLEGRO_EDITOR     DRC_CONSTR    Inconsistent soldermask to soldermask DRCs on vias as compared to board geometry/soldermask
8 L$ K3 d4 k" M9 K1736116 ALLEGRO_EDITOR     DRC_CONSTR    Shape Voiding and DRC error on layer with no hole or pad definition
% s, i% ]3 f0 Q9 l4 r1744248 ALLEGRO_EDITOR     DRC_CONSTR    Release 16.6 to 17.2-2016 DML Independent Flow does not resolve differential pair pin pairs Correctly
1776848 ALLEGRO_EDITOR     DRC_CONSTR    Negative plane island DRC reported in release 17.2-2016 Hotfix 23
1730806 ALLEGRO_EDITOR     EDIT_ETCH     Element 'vias_allowed' is not valid for content model adding high speed via structures
% m0 T- v. ^# {2 ]8 z) M, ~1745332 ALLEGRO_EDITOR     EDIT_ETCH     In release 17.2-2016, PCB Editor crashes when starting Add ZigZag Pattern
+ f+ V7 c  t" n% x/ G3 U1765555 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashes during contour routing
1644401 ALLEGRO_EDITOR     INTERACTIV    PCB Editor crashes on running the z-copy command
1657621 ALLEGRO_EDITOR     INTERACTIV    Copy cline and via cause redundant vias
1688556 ALLEGRO_EDITOR     INTERACTIV    Limitations with editpad boundary
2 N' |. Q/ e3 O7 J, R1704901 ALLEGRO_EDITOR     INTERACTIV    Changes cannot be done when 'Design outline' is selected
1710731 ALLEGRO_EDITOR     INTERACTIV    The Edit > Change command does not select or change the text on a block
* ^8 e; O" y3 H+ ^" @+ }( R0 D- b1714855 ALLEGRO_EDITOR     INTERACTIV    Placing two objects on the Design_Outline subclass causes PCB Editor to crash
1725736 ALLEGRO_EDITOR     INTERACTIV    Edit>Change cannot change silkscreen line to a different class, but works in preselect mode
- B9 B5 a2 {; i) c; L( O/ _1728004 ALLEGRO_EDITOR     INTERACTIV    Text cannot be edited if the Design_Outline subclass is in the selection box
1728794 ALLEGRO_EDITOR     INTERACTIV    The Oops command and the Esc key do not work when moving components in the Temp Group mode
' k' t1 q; ]7 p4 k1738070 ALLEGRO_EDITOR     INTERACTIV    Copying shape after Shape Operations results in error 'E- (SPMHDB-72): Current active shape must be filled first'
1750696 ALLEGRO_EDITOR     INTERACTIV    Add notch angle option fails to update if changed while add notch command is active.
" r8 B& E, a1 |" u. @8 d# w9 y1755240 ALLEGRO_EDITOR     INTERACTIV    Copy via does not work
8 C" d) b) @- G5 l1 y: W1777416 ALLEGRO_EDITOR     INTERACTIV    Running shape operations results in database corruption
1715835 ALLEGRO_EDITOR     INTERFACES    When IDX is imported in PCB Editor, all the shapes are created on package keepout on all subclasses
1744111 ALLEGRO_EDITOR     INTERFACES    Pads rotating 90 degree when exporting DXF file from Allegro PCB Editor
1736045 ALLEGRO_EDITOR     MENTOR        Third-party import crashes PCB Editor with error stating that .SAV file will be created
7 [0 i0 [7 L/ t# E+ f1751914 ALLEGRO_EDITOR     MULTI_USER    Find Filter options get disabled while creating symbols
- s6 C! u- X* M- A. C; `1770811 ALLEGRO_EDITOR     MULTI_USER    In release 17.2-2016, axlTriggerSet('exit 'routine) causes a crash while exiting
6 P1 S! w% }: q* k3 H& F1736545 ALLEGRO_EDITOR     OTHER         Spelling mistake in description of no_dynamic_zoom variable in user preferences Editor
1761610 ALLEGRO_EDITOR     OTHER         Dynamic shape is not voiding as expected.
  A" t$ f! w+ K; r+ t" A1702535 ALLEGRO_EDITOR     PAD_EDITOR    After modifying a padstack in Pad_Editor, the Update to Design function fails to update the dra file
1713461 ALLEGRO_EDITOR     PAD_EDITOR    Padstack editor default geometry not working when cell is preselected
1715702 ALLEGRO_EDITOR     PAD_EDITOR    Donut shape is lost on cutting the pad shape of the donut pad
1720300 ALLEGRO_EDITOR     PAD_EDITOR    Multi-drill staggered pattern: Different hole placement for first and second rows for releases 16.6 and 17.2-2016
2 i; `( M- ]5 B# U1 x+ w- C- n1724896 ALLEGRO_EDITOR     PAD_EDITOR    Padstack Editor shows flash symbol for regular pad on selecting 'Shape Symbol'
1714839 ALLEGRO_EDITOR     PLACEMENT     Selecting an alternate symbol (alt_symbol) in a group, in the Placement Edit mode, removes the symbol from the group
1781502 ALLEGRO_EDITOR     PLACEMENT     Quickplace by room crashes Allegro PCB Editor
7 o! N6 A8 l) r$ B' ^% B1699690 ALLEGRO_EDITOR     SCHEM_FTB     'view_pcb directive' no longer working as expected
1758796 ALLEGRO_EDITOR     SCHEM_FTB     PCB Editor launched from Project Manager does not read the relative paths specified in the view_pcb directive
: ?+ n0 S- t2 b$ \; K) R/ W  K1761101 ALLEGRO_EDITOR     SCHEM_FTB     On saving a board after import logic in PCB Editor, the file is saved in the cpm location and not in the physical folder
1761394 ALLEGRO_EDITOR     SCHEM_FTB     Working directory for PCB Editor changes after import logic
1 u8 u! _* ~0 d: K) [4 M1714922 ALLEGRO_EDITOR     SCRIPTS       Running script in the non-graphic mode runs the tool graphically
2 |+ r3 _! A) o1 ~) M  \1726550 ALLEGRO_EDITOR     SHAPE         Shape failed to connect to pin
! `) }3 n* }: z/ [) L4 G) {5 B1754945 ALLEGRO_EDITOR     SHAPE         In release 17.2-2016, Delete islands  fails to add DYN_DELETED_ISLAND to voids on Windows 10 systems
1766280 ALLEGRO_EDITOR     SHAPE         SPMHGE-300 Polygon operation failed because of an internal error
' a9 Y! H1 f9 ]' Y' s) u1 c1768307 ALLEGRO_EDITOR     TECHFILE      Properties defined in the technology files are not being imported in a new design
1771584 ALLEGRO_EDITOR     TECHFILE      The tech file import command does not update user-defined property immediately
1730104 ALLEGRO_EDITOR     UI_FORMS      Change description  of Title bar option variables in User Preferences
! X' M: Y7 v/ [5 B& ]8 i1 M' Z1749272 ALLEGRO_EDITOR     UI_FORMS      etchlen_ignore_pinvia variable needs to be updated
1649254 ALLEGRO_EDITOR     UI_GENERAL    Using wildcard to open padstack file generates error SPMHA1-161 in Padstack Editor in release 17.2-2016
1685985 ALLEGRO_EDITOR     UI_GENERAL    Funckey not working for Display - Measure
1687073 ALLEGRO_EDITOR     UI_GENERAL    Show Measure command shifts focus to Search field in result window after selecting first element
1699272 ALLEGRO_EDITOR     UI_GENERAL    File Viewer not displaying HTML files correctly when 'allegro_html_qt' is enabled
1711321 ALLEGRO_EDITOR     UI_GENERAL    Database settings do not change on changing color settings using the SKILL function axlDBDisplayControl()
9 U9 X) b# u) I1728468 ALLEGRO_EDITOR     UI_GENERAL    The Show Element window takes the focus away from the PCB Editor window
+ F# p; c& G7 m  y- i  f: K1733690 ALLEGRO_EDITOR     UI_GENERAL    Performance issues in Visibility dialog if called repeatedly in release 17.2-2016, Hotfix 017
1734176 ALLEGRO_EDITOR     UI_GENERAL    Unable to sort padstacks to open in the padstack editor using wildcards
1735733 ALLEGRO_EDITOR     UI_GENERAL    RAVEL checks slower in release 17.2-2016, Hotfix 017
0 {. o# P8 h* {. `" G, ?1 w7 b1737545 ALLEGRO_EDITOR     UI_GENERAL    axlVisibleSet is slower in release 17.2-2016
1744655 ALLEGRO_EDITOR     UI_GENERAL    SKILL code with axlVisibleSet slower in release 17.2-2016 compared to 16.6
1759380 ALLEGRO_EDITOR     UI_GENERAL    axlLayerPriority API changes layer visibility and colors
' y" S; T" ]+ n. F1775071 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, dialog boxes are not displayed in the right order on using SKILL
1708554 APD                GRAPHICS      MCM shape lines are almost short and different with DXF and Gerber files
1678824 APD                SHAPE         Updating dynamic shape fails to void all elements on layer L2.
: [8 B# N  E5 l  Z1742335 ASDA               COMPONENT_BRO Libraries missing from new Component Browser
, w9 C% \2 n7 |0 M1779777 ASDA               CONNECTIVITY_ SDA: Net name and physical net name are different
1721919 ASDA               CROSSPROBE    Cross-probing a net from the .brd file highlights the entire bus in the schematic
1714313 ASDA               EDIT_OPERATIO Filter does not work correctly in the Change RefDes form
& q' ?) M; }* w( \* H3 q; O: x; W2 c% H1730809 ASDA               FORMAT_OBJECT Image transparency slider does not update the number in the combo box correctly
1747397 ASDA               GRAPHICS      Pop-up DRC descriptions are too small and cannot be read
1640061 ASDA               HIERARCHY     Incorrect message received when invalid characters are specified for subdesign suffix
- J+ a: z- L4 A: {) n0 j1723535 ASDA               MISCELLANEOUS Clicking in the Command window should place the cursor at the last line to avoid editing previously run commands
1699936 ASDA               PAGE_MANAGEME Page gaps created while moving pages
8 {$ S/ m6 r' W1 ~6 d# L8 k2 H  \4 K1737180 ASDA               VARIANT_MANAG Deleted variants are removed from the variant.lst file but displayed in SDA
  p+ Z' M8 Z9 ]8 u- `1763247 ASDA               VARIANT_MANAG Changes in Variant Editor are not reflected on the schematic page.
3 V9 P6 G. P5 H3 C1 O' O* m1733971 CAPTURE            CONNECTIVITY  Auto connect to bus not working in the attached design
, X( f5 |! A+ X. G1 X1236010 CAPTURE            DATABASE      Capture is very slow in processing designs.
7 J# W7 X; D% U1518560 CAPTURE            DATABASE      Large schematics are slow to respond
1705592 CAPTURE            DATABASE      Capture hangs when switching between schematics that contain nested netgroups
1770687 CAPTURE            GENERAL       In release 17.2-2016 Hotfix 021 and 022, selecting Help - Learning PSpice throws Java Script error
1692435 CAPTURE            HELP          Version Info Window is empty
  `  \, ^: W: D# N: A2 d  }1767374 CAPTURE            NETLIST_ALLEG Capture crashes on canceling the netlisting process
2 o% {) V0 H! j% d1719613 CAPTURE            OTHER         Moving a wire in OrCAD Capture CIS or Allegro Design Entry CIS results in design crash
1746663 CAPTURE            OTHER         Capture slows down significantly in release 17.2-2016 Hotfix 017 and 018
5 n! `4 Z6 k+ s/ b+ g1709179 CAPTURE            PROPERTY_EDIT Unable to delete unwanted properties associated with Ground and VCC nets.
& ]7 m7 g( m9 h1714121 CAPTURE            SCHEMATIC_EDI Mirroring and moving a symbol resets the position of a newly added pin property
1729861 CIS                OTHER         The 'Refresh Part Types' icon is alternated with 'Refresh Symbols From Libs' icon
& }9 g( H- O& V" H1333600 CONCEPT_HDL        COMP_BROWSER  Sort the sections numerically in Part Information Manager
1758761 CONCEPT_HDL        COMP_BROWSER  Incorrect Version showing in Component Browser in 17.2
1769591 CONCEPT_HDL        COMP_BROWSER  Modify Component / Project Information Manager (PIM), parts take longer to load in EDM
$ ~( z- n% S! R1 ~8 a6 ~2 C# A) b1479711 CONCEPT_HDL        CORE          Mirroring symbols causes alignment issues
5 V7 N4 j- \- ]! ?+ |( B% N1696208 CONCEPT_HDL        CORE          Display issue with the grid visibility after a save hierarchy
# F. X. v1 ^, R+ v0 o: R! R1698802 CONCEPT_HDL        CORE          Pin number overlap with the pin stub when the component is mirrored.
& d& y* V4 F: e6 U1708917 CONCEPT_HDL        CORE          nconcepthdl crashes on a design with a core dump
* w. G) B2 s5 @$ j. H# r1744815 CONCEPT_HDL        CORE          Deleting a page crashes DE-HDL
; {, q4 C1 B, {* N2 o1751863 CONCEPT_HDL        CORE          'Move' does not move body but only properties of selected part
1763556 CONCEPT_HDL        CORE          Component Alignment and other graphical feature not working in Windows 10
1725121 CONSTRAINT_MGR     CONCEPT_HDL   Audit report of ECSets reflects some gaps in certain columns
1758740 CONSTRAINT_MGR     CONCEPT_HDL   Extracted topology does not populate the gather control used in the ECSet
1759580 CONSTRAINT_MGR     CONCEPT_HDL   Class to Class assignments are incorrectly displayed in the 'CSet Assignment Matrix'
% s  z  t2 A0 ^0 J: }1759590 CONSTRAINT_MGR     CONCEPT_HDL   Unable to create bookmarks in Constraint Manager
1764597 CONSTRAINT_MGR     CONCEPT_HDL   Copying constraints from a SKILL-defined CSet copies the automation flag/attribute ('A' in UI), as well.
1771427 CONSTRAINT_MGR     CONCEPT_HDL   Decimal units specified in the precision settings are not applied correctly
1700402 CONSTRAINT_MGR     DATABASE      Parallelism violation DRC not reported until cline is moved
1700370 CONSTRAINT_MGR     OTHER         Constraint Manager: Expanded nodes collapse on restart
1735636 CONSTRAINT_MGR     OTHER         Inductors are extracted as resistors in the topology
* N6 T4 e* T9 X1776917 CONSTRAINT_MGR     OTHER         Creating advanced formula causes the tool to crash
1762979 CONSTRAINT_MGR     TECHFILE      Constraint Manager does not retain values after importing tech file
1699275 CONSTRAINT_MGR     UI_FORMS      Constraint Manager: Dialog boxes opened from the File – Import menu show files and folders in incorrect order
4 E( K* g9 v; N1699312 CONSTRAINT_MGR     UI_FORMS      Typing *.* in the File name field does not display all the files in the Import Constraints dialog box
1742134 CONSTRAINT_MGR     UI_FORMS      Editing a cell from any of the constraint set in Constraint manager is filling other cells that should not be selected
1755576 CONSTRAINT_MGR     UI_FORMS      Constraint Manager: Physical CSet filter not working correctly
1775333 ECW                DASHBOARD     Activity Log is not accessible to ECAD_Integrators if they are not part of the project team
1 c) F, k# V7 [/ u1749220 ECW                OTHER         Remove 'Role' column from Users web parts
1716527 ECW                TDO-SHAREPOIN Allegro Pulse: Mismatch between metrics with components on schematic and components in layout
7 y. Y8 [! S, ~2 M7 m4 s1724195 FSP                SYMBOL_EDITOR Device pins are not correctly aligned after being moved in Schematic Symbol Editor
; {& n' W6 F" ~. Y- C; l1725479 INSTALLATION       DOWNLOAD_MGR  Download Manager error prompts user to close downloadmanager.exe
1738952 PCB_LIBRARIAN      SYMBOL_EDITOR Pin table must allow for Copy/Paste of Rows
, H8 u5 a: H0 j& x8 K  B1638740 PSPICE             FRONTENDPLUGI Set minimum height for the search field in PSpice Part Search
# D4 O9 r- H$ f; y- \+ u1699822 PSPICE             FRONTENDPLUGI Set minimum height for the search field in PSpice Part Search
+ e& x, ~& a3 N% u; y# z2 Y1652265 PSPICE             MODELING_APPS Cannot place PWL source from PSpice Modeling App
, ?/ r# {0 V: ~5 {4 K: b7 ~1685967 PSPICE             MODELING_APPS Getting error when trying to place PWL source from PSpice Modeling App
- a% ~, _2 B: Z2 O$ @1716313 PSPICE             MODELING_APPS PSpice PWL Sources not working correctly in release 17.2-2016 Hotfix 014
1738747 PSPICE             MODELING_APPS Inconsistent file type for PWL part in modeling application and source library
1762202 PSPICE             MODELING_APPS PSpice modelling app Tcl issues
* O1 r: n& z, h1736605 PSPICE             SIMMODELS     BSIM4.6 model parameters incorrectly handled by simulator
1442623 PSPICE             SIMULATOR     Bias points are nor correct in attached circuit
5 S0 W  m# o  r8 K: f1618815 PSPICE             SIMULATOR     Bias Point calculation appears incomplete
0 A6 Z7 A+ `; [1723039 PSPICE             SIMULATOR     PSpice crashes when curly braces are specified for the ETABLE parts
1782353 SIG_INTEGRITY      SIGWAVE       SigWave crashes when opening .sww file in release 17.2-2016 Hotfix 023
2 K! {- S( f' F+ V1745940 SIP_LAYOUT         DATABASE      Cutting a part of a tapered cline does not remove the connectivity on the dangling cline
1780072 SIP_LAYOUT         DIE_ABSTRACT_ Export->Die Abstract File causes a crash
/ p1 G3 C' y9 ~) _. r+ H1736396 SIP_LAYOUT         SYMB_EDIT_APP 'No such child' error message when deleting pins in symed
0 C" r! J2 A6 n1 |2 R  Q1769728 TDA                CORE          Default policy file needs to be fixed
* s4 X* h# ^: u7 v7 K: J9 m1735682 XTRACTIM           GUI           XtractIM translation is incorrect: adds anti-pads
( j# X, h7 U/ d' }) y

Fixed CCRs: SPB 17.2 HF024
, E2 V$ G  Z8 |& q4 c07-28-2017
========================================================================================================================================================
, J6 b9 M# R  B' N$ V% jCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1762143 ADW                COMPONENT_BRO Part placed using the 'Add' button does not populate 'PART_NAME' property
1765790 ADW                PART_BROWSER  Fail to extract component part number and footprint information
1757719 ADW                TDA           TDO and Windchilll Work Group Manager out of sync at times
1 u5 N3 A: s. V1 p8 y. r. m  p1760607 ALLEGRO_EDITOR     DATABASE      Value for number of decimal places changes in Pad Designer in release 17.2-2016
1775160 ALLEGRO_EDITOR     DFA           Loading DFA spreadsheet crashes PCB Editor in release 17.2-2016
1765984 ALLEGRO_EDITOR     OTHER         Cannot view System Info
1729350 ALLEGRO_EDITOR     REPORTS       Net loop is not listed in report
1725242 ALLEGRO_EDITOR     SHAPE         'Same net shape to hole spacing' is only detecting the DRC and not voiding the shape
6 ^5 v- A4 G% E+ {9 C5 j/ U1754402 ALLEGRO_EDITOR     SHAPE         Illegal arc radius error (SPMHA1-85)
& @, A, k/ Q. f+ F% N, H% z, e1762888 ALLEGRO_EDITOR     SHAPE         Border line missing for some crosshatch (xhatch) shape voids
1769188 ALLEGRO_EDITOR     SHOW_ELEM     'Show Element' with the 'Groups' option used on certain modules crashes PCB Editor
% D  K  q0 o$ }# j# y5 j1767690 ALLEGRO_EDITOR     TESTPREP      PCB Editor crashes when running automatic Testprep
1737337 ALLEGRO_EDITOR     UI_FORMS      Pinned Show Element window closes when opening new design in release 17.2-2016
1736642 ALLEGRO_PROD_TOOLB INTEGRATION   Cannot change accuracy to 4 for 'Change Width' in Productivity Toolbox
1685216 ALTM_TRANSLATOR    CAPTURE       Third-party translator placing symbols off grid
/ K/ J, Q# C3 {4 I5 H& I& j1738679 ALTM_TRANSLATOR    CAPTURE       Connectivity loss in imported schematic
$ L& v+ K+ B; `1738705 ALTM_TRANSLATOR    CAPTURE       Connectivity loss in imported schematic
: M% p- Q8 o' E3 H6 ^% s# u$ n1748583 ALTM_TRANSLATOR    CAPTURE       Crash on importing design using third-party translator
1679310 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator should fix off-centered connections
5 j0 I/ v) ]; N+ Q* _7 N1686845 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator does not place parts after successful translation
1723141 ALTM_TRANSLATOR    PCB_EDITOR    Placement outlines are rotated in third-party translator
1723164 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator creates board with missing data: vias, traces, and so on
7 b4 l7 E4 @, P8 H+ w5 o% |% K1723190 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator changes design origin
1750496 ALTM_TRANSLATOR    PCB_EDITOR    Third-party board with arc tracks not correctly converted to arc clines
1769624 APD                DATABASE      Attempted symbol delete crashes APD
" z+ z7 J3 b1 s9 w0 f9 \9 p! O5 D1727206 APD                SHAPE         Merging two shapes results in an incorrect shape
% ~! M, `6 u$ I2 Z( R& h1707756 ASDA               VARIANT_MANAG Scrolling in Create Variant closes tool
1753699 CM                 RELEASE       installDebugger() does not work in release 17.2-2016 as SKILL kit is not installed
1741534 CONCEPT_HDL        CORE          DE-HDL freezes when selecting a net that contains many connections
) m+ U# K& F* U1752687 CONCEPT_HDL        CORE          The move command changes the connectivity of the schematic
1 C& u2 l4 \3 u. S1763525 CONCEPT_HDL        CORE          Genview crashes when generating split symbols
1766797 CONCEPT_HDL        CORE          Schematic not refreshed after using the clear xnet overrides feature
8 P0 I( s* h' D  ~' j1770852 F2B                PACKAGERXL    ERROR(SPCOPK-1138): A hard location was found on instances of different physical part types
8 k7 a8 }) a! Q1 o3 d6 W  z1754473 FSP                DE-HDL_SCHEMA Provide an option to generate symbols with custom attributes
1748106 FSP                OTHER         Create protocol from existing protocol error message needs clarity
( }) Y/ ^* ?2 L1724201 FSP                SYMBOL_EDITOR Unable to change 'Pin Direction' in symbol editor
; e- J3 x- J3 d8 D7 n1 l6 _8 p1772429 ORBITIO            ALLEGRO_SIP_I Import - OrbitIO: Translator cannot create bundle in PCB Editor
1725759 SIG_INTEGRITY      OTHER         PCB shape/plane capacitance
6 p* a# N; C2 D* @, G1760924 SIP_LAYOUT         DIE_STACK_EDI Package height of die .dra file reset to 110um when placed
. B) N# L1 u2 p* o+ c: x1764385 SIP_LAYOUT         MODULES       Embedded components are unplaced in created modules (.mdd)
  m: Q" r3 M* U2 y$ o; V1 @* h1733679 SIP_LAYOUT         OTHER         'metal density scan' does not use select window
1763707 SIP_LAYOUT         OTHER         SiP Layout exits with error message in release 17.2-2016
8 L" @5 S- I. E1763515 SIP_RF             DIEEXPORT     Virtuoso writes incorrect width for 45 degree path segments in XDA file
! b$ D3 T6 `! J- ~  [" ^  O1772397 TDA                DEHDL         DE-HDL crashes if license is not available for team design
) E! M7 m9 b* P

/ u/ x& f, B/ j: y3 nFixed CCRs: SPB 17.2 HF023
4 f4 h3 F( E. k. G07-7-2017
========================================================================================================================================================
- Q" M) g. O  A# l( r: j) G. u; |CCRID   Product            ProductLevel2 Title
, T1 \! {% z3 I  F9 g========================================================================================================================================================
1703281 ADW                ADW_UPREV     Design_init needs to support the -cb command
1762238 ADW                COMPONENT_BRO DEHDL crashes without reason
1759467 ADW                DBEDITOR      DBEditor does not recognize that 1.10 is a higher version than 1.9
1731459 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
1731460 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
, M2 y# S/ \. m. ^1757443 ADW                LIBDISTRIBUTI Blank PHYS_DES_PREFIX in PTF file
1752126 ADW                LRM           cache not getting updated with std models when moving from 16.6 to 17.2
2 f) n; l8 f' @5 y1754444 ADW                LRM           Update Standard library in LRM causes an error, "Cannot proceed with update as don't have permission to delete."
1715861 ADW                SRM           symbolrevchk.par has incorrect variable name for SRM to ignore the tool version
1628403 ADW                TDO-SHAREPOIN Objects remain checked-out after multiple failed 'check in hierarchy' attempts
# c( X) G3 @9 `! v1759250 ALLEGRO_EDITOR     DATABASE      Flex-rigid placement does not move bottom pads to nearest layer
1762782 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when creating artwork
1746665 ALLEGRO_EDITOR     DFA           Cannot scroll in DFA Constraints Dialog if the DFA constraint file is read only
$ [" A, P2 G. n8 J  A% R) `1750084 ALLEGRO_EDITOR     DFA           DFA spreadsheet disappears from the DFA library if hyphen is present in the name
1697155 ALLEGRO_EDITOR     GRAPHICS      Position and size of Show Element and Measurement windows not saved in PCB Editor
1734282 ALLEGRO_EDITOR     GRAPHICS      Placement of reports and pop-ups not retained in PCB Editor
1740863 ALLEGRO_EDITOR     GRAPHICS      Show Element and Measure windows do not retain position
% U& D7 A/ }! c6 r6 R+ A* e1749687 ALLEGRO_EDITOR     GRAPHICS      Position and size of Show Element and Measure windows are not saved in PCB Editor in release 17.2-2016
1764124 ALLEGRO_EDITOR     SCRIPTS       Replaying recorded script file crashes PCB Editor
1762888 ALLEGRO_EDITOR     SHAPE         Border line missing for some crosshatch (xhatch) shape voids
- X6 P1 q) q* X1763619 ALLEGRO_EDITOR     SKILL         Incorrect text block name when extracting text parameters using SKILL
1685826 ALLEGRO_EDITOR     UI_GENERAL    Reports when opened from Status Form disappear behind PCB Editor canvas when clicking on canvas
1733552 ALLEGRO_EDITOR     UI_GENERAL    Although F1 is defined as an alias for another command, pressing F1 opens help
; M" ~5 ~' j) h4 m- g9 `1735098 ALLEGRO_EDITOR     UI_GENERAL    axlUIYesNo displays garbled text when customized for Chinese in release 17.2-2016
, A* e0 g4 a/ m: d. `5 H1753430 ALLEGRO_EDITOR     UI_GENERAL    'Tools - Quick Reports' opens only one report at a time
1754283 ALLEGRO_EDITOR     UI_GENERAL    Call multiple reports from a function key
$ p  c# b) b' Q0 }1 X1742822 APD                STREAM_IF     Component pins are not mirrored properly when mirror geometry option is checked and component is mirrored at 90/270
0 M$ o" E1 H# b2 U+ P) {1762284 ASDA               COPY_PASTE    Copying testpoint crashes tool and eventually the operating system
1655057 CONCEPT_HDL        COMP_BROWSER  ADW Part Manager and Component Modify hangs
& q- G4 B8 e; U1689740 CONCEPT_HDL        COMP_BROWSER  Bad response time using Dehdl component browser
1735332 CONCEPT_HDL        COMP_BROWSER  Sort in mathematical order Symbol list in Component Browser
1739197 CONCEPT_HDL        COMP_BROWSER  Part Information Manager can`t sorted symbol version
) N$ ]( j( o) K0 E1764605 CONCEPT_HDL        CORE          Signal added from the console should be 'Left Aligned' instead of 'Center Aligned'
) o& @4 t4 q5 {7 f+ }4 Y3 c% }1761706 CONSTRAINT_MGR     CONCEPT_HDL   cmDiffUtility has a typo in the usage statement
1758426 ECW                DASHBOARD     Behavior of 'Apply Label' for Dynamic and Status labels should be same in TDO and DE Webpart
1764096 ECW                PROJECT_MANAG Renaming project using the ETD window randomly hangs the edit window, refreshing bring backs the page
1764070 ECW                TDO-SHAREPOIN Join Project: Multiple entries shown for workspace/project with multi-hierarchical structure
  `5 u  s2 v2 L: X* j3 C& v1754473 FSP                DE-HDL_SCHEMA Provide an option to generate symbols with custom attributes
" B5 N' f) ?* F1724124 FSP                DESIGN_EXPLOR Provide Tcl command to filter data in Design Connectivity Window
1726548 FSP                OTHER         Unable to open FPGA system planner if username/log file path has Cyrillic letters
) |( i) l3 g5 n1719133 SCM                SCHGEN        Voltage symbol not getting placed for some of the voltage nets
, N# f. O4 G3 k" x# f1680989 SIP_LAYOUT         ARTWORK       Artwork film set-up: Match Display including invisible layer
1732218 SIP_LAYOUT         DEGASSING     Shape will not degas as needed - not all voids degassed
1763280 SIP_LAYOUT         DIE_ABSTRACT_ SiP Layout does not recognize width of segment when importing .xda
1762992 SIP_LAYOUT         OTHER         Saving a design after adding a solder mask layer in the cross-section crashes tool


Fixed CCRs: SPB 17.2 HF022
; Y& F+ B5 d6 X/ y0 T7 H06-16-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
, r! ]( N. Q8 D9 J7 v( Q========================================================================================================================================================
1755789 ADW                DBEDITOR      Checking in HSS Block returns 'Failed to create archive'
4 d& m( \1 q2 [' f1731459 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
" l. S6 \/ I. \1 F/ q! V1731460 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
) R; T; r' o6 N' b; G7 |1744081 ADW                FLOW_MGR      Error regarding configuration file when trying to open Workflow Manager
1756727 ADW                LIBIMPORT     EDM Library Import fails with java exceptions when merging classifications
& X* L2 j% n0 v' G0 F1743763 ADW                SRM           Find filter is grayed out when Allegro PCB Editor is opened from EDM Flow Manager
6 }" G% J" T* t! S: A% h1748399 ALLEGRO_EDITOR     DATABASE      In release 17.2-2016, end caps not visible for certain clines in PCB Editor
' _/ V7 i' U! i' [4 ^1748522 ALLEGRO_EDITOR     INTERACTIV    A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it
, f+ a) I. G1 K" J" b1734983 ALLEGRO_EDITOR     INTERFACES    Secondary step model does not stay mapped after drawing is reopened
1753704 ALLEGRO_EDITOR     REFRESH       Refreshing symbols crashes PCB Editor
6 n: }2 d2 F* C" [0 t) T% ]1493721 ALLEGRO_EDITOR     SHAPE         Voids on negative planes are not adhering to constraints
5 F" ~. e! W: G1 g' h1711242 ALLEGRO_EDITOR     SHAPE         Route keep out leads to partly unfilled shapes with gaps
8 O6 V9 a2 @3 {$ n1 T1 z" p1726865 ALLEGRO_EDITOR     UI_GENERAL    Pop-up Mirror command does not mirror at cursor position
" B& ^- f3 m4 D) \5 F1752987 ALLEGRO_EDITOR     UI_GENERAL    axlUIViewFileCreate zoom to xy location not working while in user created form.
9 q0 e6 |" g- _. J- h% p+ f1755638 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run
$ o% b5 X8 ~0 `  X7 w' A1719792 ALLEGRO_PROD_TOOLB CORE          Productivity Toolbox Z-DRC hangs or crashes PCB Editor
! S9 M. {4 K. ^8 W1624869 ALTM_TRANSLATOR    CAPTURE       A structure file is required to translate a third-party schematic to OrCAD Capture
6 L1 ]0 E3 n) J- `1707416 ALTM_TRANSLATOR    CAPTURE       Missing components and pins in the OrCAD Capture schematic translated from a third-party tool
1708825 ALTM_TRANSLATOR    CAPTURE       The third-party translator fails to translate the schematic
% q) |. }- c5 ^2 l1719200 ALTM_TRANSLATOR    CAPTURE       The third-party translator fails to translate all the pages of a schematic
1546070 ALTM_TRANSLATOR    CORE          Third-party to DE-HDL schematic translation fails
/ }' w: J. u7 z5 j: V8 G: x& T1700508 ALTM_TRANSLATOR    CORE          Third-party PCB translator does not work in release 17.2-2016
6 _# D4 D' H, Z/ \5 {$ x9 b1699340 ALTM_TRANSLATOR    DE_HDL        Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor
1630379 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator is not importing clines and vias
1708615 ALTM_TRANSLATOR    PCB_EDITOR    All items of third-party PCB not imported in release 17.2-2016
1758296 APD                DXF_IF        DXF OUT: Rounded rectangle pads mirrored incorrectly
8 e' t* _& w& ~- o1756040 APD                IMPORT_DATA   The 'die text in' command ignores values after the decimal point
1727206 APD                SHAPE         Merging two shapes results in an incorrect shape
/ |" ?# T) Y* d" |- A) s) G1753682 CONCEPT_HDL        CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL
1721334 CONCEPT_HDL        CORE          dsreportgen not able to resolve gated part on schematic
4 w2 y+ z1 M1 E( p7 M1747559 CONCEPT_HDL        CORE          Copying a logic symbol without a part table entry results in ERROR(SPCODD-53)
1749644 CONCEPT_HDL        CORE          In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes
% b0 J  g) M$ d2 a# M" {1746910 CONCEPT_HDL        GLOBALCHANGE  Global Component Change unable to identify part data when using schematic pick option
; E: V. K6 V; G/ D  N! f1743572 FLOWS              PROJMGR       Project Manager displays incorrect values in Project Setting
5 ]; W% `- A2 H2 K$ F1724124 FSP                DESIGN_EXPLOR Provide TCL command to filter design connectivity window
1719105 FSP                GUI           Tabular sorting not working in FPGA System Planner
& g" b& m. \- r1755750 PCB_LIBRARIAN      GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor
8 ~" U( e0 `4 F, ]5 ^, ]' z6 x% @4 }  F1722993 PCB_LIBRARIAN      IMPORT_CSV    Part Developer crashes while importing part information stored in a .csv file
0 j; Z& F0 m+ ~9 Y! n0 q- p" b1758856 SIP_LAYOUT         3D_VIEWER     Correct the spelling error in the 3D Viewer Design Configuration window
1755179 SIP_LAYOUT         ARTWORK       PCB Editor crashes when creating Gerber files
1743511 SIP_LAYOUT         MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check
5 d8 y) U+ M) ?) G/ k: z
  x- D6 Y) f! y5 c  k/ h
! B1 o9 r6 k! I! B1 o7 ?Fixed CCRs: SPB 17.2 HF021
& Y# @% q$ I  w+ k06-3-2017
! k6 I! e) k7 e3 E0 ]( ^9 B========================================================================================================================================================
9 p9 j8 t( s- ?- C  w5 CCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
+ o4 e2 L$ A; {% \$ e  G1401318 ADW                DBEDITOR      Bulk Edit - Previously modified cells do not turn blue when selected
$ L$ \5 H3 y4 S0 i7 i1621446 ADW                DBEDITOR      Bulk Edit - sorting highlights incorrect cells to mark them as changed
9 }3 ^7 l: F+ J) |. c1743997 ADW                LIB_FLOW      Match file for standard models is incorrect
* a: b% P* J- x1746052 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when applying no drc property
1736067 ALLEGRO_EDITOR     DRC_CONSTR    Interlayer checks not reporting DRCs between cline and mask layer
4 I; @9 H; V6 I1738587 ALLEGRO_EDITOR     EDIT_ETCH     Line width changing on slide for ETCH - Conductor (Not on a NET)
1745277 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashes on using the slide command
1747942 ALLEGRO_EDITOR     EXTRACT       Fabmaster Out does not export arc in pad_shape
1737202 ALLEGRO_EDITOR     GRAPHICS      Setting the variable display_raster_ops
1744042 ALLEGRO_EDITOR     GRAPHICS      Unused pad suppression is not working on few nets
1703848 ALLEGRO_EDITOR     INTERFACES    IPC 2581 fails with error 'E- (SPMHGE-268)' and the log file is empty
1743899 ALLEGRO_EDITOR     MANUFACT      Glossing dangling vias crashes PCB Editor
1744467 ALLEGRO_EDITOR     OTHER         The 'logical_op_new' variable is not displayed in User Preferences Editor
% V9 \3 v7 n9 P7 @1748520 ALLEGRO_EDITOR     OTHER         TDP fails to load on an empty database
1748581 ALLEGRO_EDITOR     PAD_EDITOR    Padstack Editor crashes when changing default pad geometry
' Q* z$ u3 {( H/ s1751469 ALLEGRO_EDITOR     PAD_EDITOR    Padstack Editor crashes/freezes when browsing for a shape symbol
1725948 ALLEGRO_EDITOR     SHAPE         Shape differences after conversion from release 16.6 to release 17.2-2016
  P3 S( \) X% h1729306 ALLEGRO_EDITOR     SHAPE         Seting shape_rki_autoclip variable causes no void to be generated
1698876 ALLEGRO_EDITOR     UI_GENERAL    Tabs are large and text is compressed in release 17.2-2016
1698883 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, enlarging icons makes selection boxes/text unreadable on 4K monitors
1707933 ALLEGRO_EDITOR     UI_GENERAL    axlUIMenuFind not locating menu as per x_location
0 r5 k. H; {  D% S1741460 ALLEGRO_EDITOR     UI_GENERAL    Right-click, context menu options grayed in some cases after choosing Edit - Copy
0 D# X: N' m( H1 O3 [1747588 ALLEGRO_EDITOR     UI_GENERAL    Interacting with PCB Editor by sending messages is not working
" z' c6 e6 I9 ~+ Q- r( @3 H1 T1747488 APD                EDIT_ETCH     Route connect is improperly affecting existing routes in locked high speed via structures
1750182 APD                STREAM_IF     The stream out settings are not saved
# s& V3 Q/ H1 K- y: {1752067 ASI_SI             GUI           Links to differential waveforms do not work in Sigrity SI report
1752131 CONCEPT_HDL        COMP_BROWSER  Symbol view in part manager doesn't match the symbol version
7 Y2 z0 j: H8 |2 M6 U! U1754116 CONCEPT_HDL        COMP_BROWSER  Default Symbol selected is n°2 instead of n°1 in component Browser
5 H, f0 N* `- ~( D2 {/ I& P1754949 CONCEPT_HDL        COMP_BROWSER  Part Information Manager displays preview window with the wrong symbol and missing footprint
% z& ~/ J0 E& p# Z. |0 ]3 Y1721334 CONCEPT_HDL        CORE          dsreportgen not able to resolve gated part on schematic
1750916 CONCEPT_HDL        CORE          DE-HDL crashes when trying to uprev a project in release 17.2-2016
$ u2 M! Z1 U- L& N7 |4 p- }/ ]1711487 CONCEPT_HDL        INFRA         Restrict opening of release 16.6 designs from a release 17.2-2016 design using File - View Design
1746915 CONSTRAINT_MGR     CONCEPT_HDL   Unable to copy a Physical and Spacing CSet generated from the Constraint Automation flow
1743523 CONSTRAINT_MGR     DATABASE      Suppress warning pop-ups from the constraint automation script
1746941 CONSTRAINT_MGR     UI_FORMS      'Go to Source' from DRC tab is not working in release 17.2-2016
. ?1 P% u- ~$ R: \; a& [1753010 ECW                METRICS       Metrics not getting collected due to old license in use
% U1 l: p2 Z# }1713052 FSP                GUI           Pin/Port Name and Group Name are not aligned properly in FPGA Port and Use Pin Mapping for DeviceInstance
" n1 o. x% B9 o0 G* |. V8 p' j1719099 FSP                GUI           Net naming wrong after building block
1719105 FSP                GUI           Tabular sorting not working in FPGA System Planner
1720479 PSPICE             ENVIRONMENT   Probe window does not open consistently on Windows 10 systems
1723411 PSPICE             ENVIRONMENT   Probe window does not open consistently on Windows 10 systems
1 X" o: H7 k# V1746628 PSPICE             ENVIRONMENT   PSpice Simulation Manager displays same message for all simulations in release 17.2-2016, Hotfix 016
1745976 SIG_INTEGRITY      GEOMETRY_EXTR Arcs with coplanar waveguides are extracted with incorrect spacing
1690820 SIP_LAYOUT         PLATING_BAR   Cannot add fillets to pads with plating bars in release 17.2-2016
1725042 SIP_LAYOUT         PLATING_BAR   Creating a plating bar removes dynamic fillets
% d2 N) q2 @; u& ^' |4 V! x6 R0 K# d* D1747534 SIP_LAYOUT         SHAPE         Moving fiducial crashes SiP Layout


Fixed CCRs: SPB 17.2 HF020
05-21-2017
0 Q' c( ~. K3 ]+ _# f========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1737443 ADW                DBEDITOR      Revising the schematic model classification for one category causes all parts in the library to be revised
, U0 W4 c( A. p: u% A" f9 B- u1734123 ALLEGRO_EDITOR     3D_CANVAS     Interactive 3D canvas crashes Allegro PCB Designer in 17.2 S016
5 `. K  {# E- w  W+ c" ?, r1742084 ALLEGRO_EDITOR     DATABASE      Running DB Doctor on DRA files with custom pad shapes resets some of the custom padstack shapes in release 17.2
1739397 ALLEGRO_EDITOR     INTERACTIV    In release 17.2, running the SKILL function axlImportXmlDBRecords causes Allegro PCB Editor to crash
, r6 `5 V6 D% l2 ]6 c# z+ F1724588 ALLEGRO_EDITOR     MANUFACT      Backdrill Route keepout suppressing existing Route Keepouts
+ I8 \. ~8 X" @1740036 ALLEGRO_EDITOR     MANUFACT      Generating the cross-section chart does not provide information about the overall board thickness
6 h/ |6 a: Y8 G9 s5 S  M1743726 ALLEGRO_EDITOR     OTHER         IDF file export: In release 17.2, only one design outline is exported as against multiple board outlines in release 16.6
1744467 ALLEGRO_EDITOR     OTHER         The 'logical_op_new' variable is not displayed in User Preferences Editor
1729350 ALLEGRO_EDITOR     REPORTS       Net loop report is not working.
1713014 ALLEGRO_EDITOR     SHAPE         Incorrect behavior of donut shaped pads at certain rotations
1739870 ALLEGRO_EDITOR     SHAPE         The artwork is different from the PCB in release 17.2 Hotfix 17
9 Z: X( w1 b/ K) B) L1698869 ALLEGRO_EDITOR     SKILL         PCB Editor crashes when trying to open another .brd file after running SRM on first .brd file
; A; d& l8 J, i1739307 ALLEGRO_EDITOR     SKILL         axlCNSDFAExport fails after first run
0 V  V! R/ B$ @3 `2 M: V1743385 ALLEGRO_EDITOR     SKILL         SKILL APIs for STEP model mapping are not available in release 17.2 Hotfix 17 or 18
5 w' }9 {1 n; q/ H2 m1685826 ALLEGRO_EDITOR     UI_GENERAL    Reports when opened from Status Form disappear behind PCB Editor canvas when clicking on canvas
1687797 ALLEGRO_EDITOR     UI_GENERAL    Cannot open two HTML windows, one after the other, while using SKILL function
1696229 ALLEGRO_EDITOR     UI_GENERAL    Setting the 'allegro_html' environment variable in User Preferences Editor overwrites existing popup text windows
1708636 ALLEGRO_EDITOR     UI_GENERAL    In SPB 17.2 release, keyboard focus automatically shifts to the newly opened dialog box
1711367 ALLEGRO_EDITOR     UI_GENERAL    Launching two report windows using SKILL is not working in 17.2
% l& \/ ^1 @) ?" f& a; m2 n- X1742856 ALLEGRO_EDITOR     UI_GENERAL    Allegro PCB Editor crashes if Project Manager is open for a design in release 17.2 Hotfix 18
1729519 APD                SHAPE         shape degassing does not generate all voids to cover entire shape
1711375 CONCEPT_HDL        CORE          Copy-paste of schematic between two instances of DE-HDL is not working as expected
1737230 CONCEPT_HDL        CORE          On the Linux platform, copying of schematic objects does not work between designs of releases 16.6 and 17.2
9 y0 b; x6 {6 d& Q9 c7 e8 n! E1741375 CONCEPT_HDL        CORE          Inconsistent behavior of the Move command when moving a symbol
* X; \! K: N' }$ A# {1743992 CONCEPT_HDL        CORE          Inconsistent behavior of the Move command when moving a symbol
( U' g! S0 o+ E% S) }0 w1736093 CONSTRAINT_MGR     CONCEPT_HDL   Incorrect topology extraction and mapping errors related to MUX parts
7 @# L& D; T- L9 r1743518 CONSTRAINT_MGR     CONCEPT_HDL   Lag observed in expanding and collapsing the net classes in Constraint Manager
1730159 FSP                ALLEGRO_INTEG FSP diff engine does not read PF Thevenin connections in FSP
1664070 ORBITIO            ALLEGRO_SIP_I Display pads of SMD components on correct layer
1709319 ORBITIO            USABILITY     OrbitIO issues an error about Device template while importing brd with Bundles
1741150 PSPICE             ENVIRONMENT   Need a way to prevent the 'pspSimSetting.js' file from being overwritten by a hotfix installation in 17.2
) n$ T. }% s+ B1 Q# v0 J# t$ d1735354 PSPICE             SIMULATOR     Access to custom nom.lib is not working as expected
1716523 SIP_LAYOUT         COLOR         Tool crashes on using the PageUp, PageDown, and Tab keys in the Color dialog box.
9 t% i8 @( m+ c! {4 {! a
7 X! c& G& S7 A! s' \) K
. S( a) `4 A1 W0 L+ }7 n' cFixed CCRs: SPB 17.2 HF019
0 M% i: R% g+ Z2 k05-6-2017
========================================================================================================================================================
& U  a$ a; T& X# P; CCCRID   Product            ProductLevel2 Title
8 J& K' S2 r* p========================================================================================================================================================
1701785 ADW                ADWSERVER     Getting 'Unable to locate tools.jar' error while using 'Copy Projects'
  W+ I7 {0 d2 c- E4 a1706782 ADW                ADW_UPREV     Design uprev failed with error 'ERROR (FM-107): Failed to run adw_uprev'
3 x8 Y) z& _$ _2 F1508159 ADW                FLOW_MGR      Flow Manager 'Open Last Project' option points to a deleted project
1690903 ADW                FLOW_MGR      Flow Manager library project list empty after 'Remove From List'
1705224 ADW                LIBDISTRIBUTI Cannot migrate Library Footprint Models having subdirectory to release 17.2-2016
  o" M% W5 D' u6 z" }; S6 `' X4 p1672037 ALLEGRO_EDITOR     EDIT_ETCH     Add ZigZag Pattern crashes PCB Editor
1695711 ALLEGRO_EDITOR     EDIT_ETCH     In release 17.2-2016, Fiber Weave Effect - Add ZigZag Pattern crashes in Windows 10
1706522 ALLEGRO_EDITOR     INTERFACES    DFX import displays error message '*Error* eval: undefined function - cloneID' but imports outline
1716336 ALLEGRO_EDITOR     INTERFACES    DXF file is not correctly imported into PCB Editor
( L9 q( l/ n, ~6 h- Q1720290 ALLEGRO_EDITOR     INTERFACES    Incorrect rotation of padstack after dxf import
1724683 ALLEGRO_EDITOR     INTERFACES    DXF OUT: incorrect Rounded/Chamfered rectangle pad rotation
- i2 p! ?/ x7 e( {4 @6 T1732587 ALLEGRO_EDITOR     INTERFACES    Format/content of ipc356 files exported in release 17.2-2016 different from release 16.6
2 @9 s# \) v+ c& m: I- t1737516 ALLEGRO_EDITOR     INTERFACES    IDX Import works differently for placed and unplaced parts
# A  u( O/ n- B+ z1715152 ALLEGRO_EDITOR     SCRIPTS       Clicking Layout in Project Manager fails to load PCB Editor and gives message 'Word too long'
/ h( D, j3 Y' Q8 `: a( v940699  ALLEGRO_EDITOR     SHAPE         Update shape to smooth fails to void a few clines.
' j6 H) Q. w, X1706581 ALLEGRO_EDITOR     SHAPE         Dynamic shape void clearance errors with vias
+ L  ?6 y" C& ?$ t" D0 o- m3 v1638300 ALLEGRO_EDITOR     UI_GENERAL    Version information set in $cdsversion truncated on title bar for some tools
1697732 CONCEPT_HDL        CORE          Pasting a signal name results in warning (SPCOCN-922) if the wire is too close to the edge of the page border
1729510 CONCEPT_HDL        CORE          Changing the name of a split block adds pages that are part of the page gaps
1721065 CONSTRAINT_MGR     CONCEPT_HDL   Physical import errors on changing plane to conductor in stack-up
1734875 CONSTRAINT_MGR     OTHER         'Create Spacing CSet' crashes tool from existing CSet context and grayed out in design context
4 Z1 W* N5 Q( t" c1473104 ECW                PART_LIST_MAN Pulse does not filter capacitor values correctly
1736580 PCB_LIBRARIAN      SYMBOL_EDITOR Grids are not displayed correctly in Symbol Editor
1738955 PCB_LIBRARIAN      SYMBOL_EDITOR Need ability to edit Symbol Properties
9 O4 I$ g' r8 u9 r/ O5 [) B( M8 y9 \1735215 PSPICE             FRONTENDPLUGI PSpice part search customization CDN_PSPICE_ODBC_SRC environment variable is not working
1733198 PSPICE             PROBE         Probe crashes when exporting trace expressions with multiple plots to CSV files
1737060 SIG_INTEGRITY      SIGNOISE      signoise fails for the AllegroSigrity_HS_Base_Suite option in release 17.2-2016 and release 16.6-2015
+ e! e7 }2 s! i1 J1707443 SIP_LAYOUT         WIREBOND      Moving bondfingers violates spacing constraint


Fixed CCRs: SPB 17.2 HF018
2 d4 w5 Y7 T$ T+ j' @04-23-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1721773 ADW                ADW_UPREV     adw_uprev updates all versions in history log to the new version. Should only insert note about uprev.
1684346 ADW                LIBDISTRIBUTI lib_dist_client fails for new release 17.2-2016 design server
8 G4 H6 G  E. V) j  _1696632 ADW                LIBDISTRIBUTI lib_dist_client fails on release 17.2 Designer Server having release 16.6 Master Server
1705224 ADW                LIBDISTRIBUTI Cannot migrate Library Footprint Models having subdirectory to release 17.2-2016
: u3 [# C+ W. L6 @" E) @+ [0 |1721017 ADW                LIBDISTRIBUTI adwserver -install fails intermittently during Master Library Server or MLR distribution
+ j  G- f  \, p2 X4 a# B" w6 {* R1711373 ALLEGRO_EDITOR     COLOR         Cannot interact with Allegro PCB Editor when Color dialog is open
1710772 ALLEGRO_EDITOR     DATABASE      Mirror command not working on zones
; G* D8 p; w7 Z9 `1725621 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when moving a group of components or clines
, d& e$ G  ~" {4 m; `( N. y  y% i1699796 ALLEGRO_EDITOR     EDIT_ETCH     AiDT fails and reports there are no timing constraints even when propagation delay is set
( x# x7 |% q  ~+ J5 A$ k  }1726483 ALLEGRO_EDITOR     EDIT_ETCH     PCB Editor crashing when converting corners to arcs
3 K3 \* [  A; Z  o& {. b, v- {1726678 ALLEGRO_EDITOR     INTERFACES    IDX copper layer export does not export all pin pads
1691036 ALLEGRO_EDITOR     MANUFACT      Fillet not centered on trace
5 i% J' e) E' w/ ^* l8 a1732304 ALLEGRO_EDITOR     MANUFACT      Countersink does not have drill figure on NCCOUNTERDRILL-1 subclass
1719564 ALLEGRO_EDITOR     OTHER         Cannot open PDF published in release 17.2-2016 in third-party software
1723065 ALLEGRO_EDITOR     OTHER         PDF out does not print the outline correctly
, i' k* S: \/ l/ ~1729247 ALLEGRO_EDITOR     OTHER         Cannot delete shape on Route Keepout layer
1722747 ALLEGRO_EDITOR     PAD_EDITOR    Option to enable 'Connect by Touch' in Pad Editor
% b( `* o* @: u1731643 ALLEGRO_EDITOR     PAD_EDITOR    Changes to secondary drill are not saved on padstack update
4 D6 U1 L4 l, ^! [! g1727303 ALLEGRO_EDITOR     REPORTS       The 'Shape Dynamic State' report has changed to 'Shape Dynamic Status' in release 17.2-2016
1695879 ALLEGRO_EDITOR     SHAPE         Dynamic shape priority error creates shorts.
. k" a' X9 ?: H4 X; l+ u/ y1713014 ALLEGRO_EDITOR     SHAPE         Incorrect behavior of donut shaped pads at certain rotations
9 i8 D; D/ n( J& h1588769 ALLEGRO_EDITOR     UI_GENERAL    Alt+key shortcuts are not available in release 17.2
1602563 ALLEGRO_EDITOR     UI_GENERAL    Shortcuts to menu items not working in release 17.2
1603776 ALLEGRO_EDITOR     UI_GENERAL    Alt key not working with menu commands
1611516 ALLEGRO_EDITOR     UI_GENERAL    Keyboard shortcuts have no response
1647271 ALLEGRO_EDITOR     UI_GENERAL    Preselection is not working for docked Find window
6 h, j" p' @8 z4 Y1650044 ALLEGRO_EDITOR     UI_GENERAL    Keyboard shortcuts are not working properly in release 17.2
1651912 ALLEGRO_EDITOR     UI_GENERAL    Inconsistent response when using the Alt key
1679964 ALLEGRO_EDITOR     UI_GENERAL    Many dialog boxes are blurred in Allegro PCB Editor
1692416 ALLEGRO_EDITOR     UI_GENERAL    Underscores in menu commands denoting shortcuts are missing in release 17.2
1693055 ALLEGRO_EDITOR     UI_GENERAL    Reports with html links end with an extra > at the end
1693968 ALLEGRO_EDITOR     UI_GENERAL    Batch process that uses SKILL is taking too long to process files and generate reports
4 ]/ B# R0 K! @$ m# k# h6 X% d* m2 x0 \1698840 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016 Waive DRC report, selected coordinates of a Waived DRC remain blue
1703065 ALLEGRO_EDITOR     UI_GENERAL    Menu shortcuts do not work as expected
. j2 \7 C0 L5 E( P4 _6 H1707547 ALLEGRO_EDITOR     UI_GENERAL    Release 17.2: The Alt key function is not working in PCB Editor
1709280 ALLEGRO_EDITOR     UI_GENERAL    Alt+Function key not working in release 17.2.
1711203 ALLEGRO_EDITOR     UI_GENERAL    Color does not change for selected coordinates in reports and Show Element
1711724 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, custom interactive menus stop responding when invoking another custom command
1715613 ALLEGRO_EDITOR     UI_GENERAL    With undocked Options window there is a mix up of entered text and funckey
* ~% L: m: k" y" H* u; N! K1719301 ALLEGRO_EDITOR     UI_GENERAL    Selected coordinates do not change color in reports and Show Element
1724197 ALLEGRO_EDITOR     UI_GENERAL    Short cuts and hot keys not working in PCB Editor in release 17.2-2016
1728724 ALLEGRO_EDITOR     UI_GENERAL    Funckey is not working in release 17.2-2016
7 w! O, B* `/ @& F9 h: P1673703 ALLEGRO_PROD_TOOLB OTHERS        Design compare not reporting the Top and Bottom layer differences
1704474 ALLEGRO_PROD_TOOLB OTHERS        When using Productivity Toolkit - PCB Design Compare, 'Override undefined width' is incorrectly applied
1571035 ALTM_TRANSLATOR    CAPTURE       Circles in third-party schematics not getting translated into Capture
3 i, Z$ @) p4 U: [& ?' l5 S1588911 ALTM_TRANSLATOR    CAPTURE       Capture crashes when translating, project and libraries are empty
1589394 ALTM_TRANSLATOR    CAPTURE       Schematic getting shifted off the page after translation
1631294 ALTM_TRANSLATOR    CAPTURE       Errors while translating third-party design when original design is in metric units
1663176 ALTM_TRANSLATOR    CAPTURE       Only first sheet of design getting translated from third-party schematic into Capture
" G- ^* F! h% W* ]1694363 ALTM_TRANSLATOR    CAPTURE       Capture is unable to translate third-party designs
3 Z# h$ l: [4 B( L8 Z: T1539739 ALTM_TRANSLATOR    CORE          Capture crashes on importing a third-party project
1542860 ALTM_TRANSLATOR    CORE          Capture crashes on clicking Translate after selecting a third-party design
/ j7 {3 i  f1 T/ v; s# U. f" [* j1551642 ALTM_TRANSLATOR    CORE          Unable to import third-party schematics into Capture
1572929 ALTM_TRANSLATOR    CORE          Footprint names getting altered during translation
6 [0 N3 k% W$ d) v; P: o1568436 ALTM_TRANSLATOR    PCB_EDITOR    Unable to translate third-party layout data into PCB Editor
% E2 G& k4 u" y1629256 ALTM_TRANSLATOR    PCB_EDITOR    Getting empty symbol and devices folders when importing into PCB Editor
* F! r& s/ ]; Z4 y1664120 ALTM_TRANSLATOR    PCB_EDITOR    Import from third-party to PCB Editor is not translating data correctly
( ]# ]# j! T3 i1701537 ALTM_TRANSLATOR    PCB_EDITOR    Import does not complete and reports errors
1698706 APD                DIE_GENERATOR When using Compose Symbol from Geometry, circle from DXF cannot generate to pin
$ {5 t3 z; w  j8 O; _1714528 APD                DIE_GENERATOR Getting 'illegal pad pointer' warning when creating die from geometry
; e) f. N+ ?0 E  E8 d5 o1714532 APD                DIE_GENERATOR Compose Die from Geometry creates incorrect pad shapes
1734310 APD                MULTI_USER    Symphony server mode malfunctions when die layer present.
1725506 APD                SHAPE         In release 17.2-2016 Hotfix 015, void is not generated in Artwork for BC7 layer causing short
1724395 APD                WIREBOND      Running axlBondWireDelete returns error message
1726609 ASDA               CANVAS_EDIT   Paste should not be allowed in the Current Refdes column of the Change Refdes form
# K  U+ E& w' @1 }- Y1719754 CONCEPT_HDL        ARCHIVER      Path stored in the compressed file starts from /home instead of the current working directory
1726570 CONCEPT_HDL        CHECKPLUS     Checkplus crashes on Windows 10
( H& Q, f* y/ f6 J* I( Y1697977 CONCEPT_HDL        CONSTRAINT_MG Differential pair disappears when it is packaged
1679575 CONCEPT_HDL        CORE          Page numbers are duplicated in Hierarchy Viewer when editing page names
1697732 CONCEPT_HDL        CORE          Pasting a signal name results in warning (SPCOCN-922) if the wire is too close to the edge of the page border
1711564 CONCEPT_HDL        CREFER        CRefer crashes while processing a hierarchical design containing subdesigns
1730736 CONCEPT_HDL        OTHER         Crash on generating BOM from design
1608350 CONSTRAINT_MGR     CONCEPT_HDL   Name of buffer model is not passed from Constraint Manager of DE-HDL to SigXplorer
1715803 CONSTRAINT_MGR     CONCEPT_HDL   Extract a net from constraint manager to SigXplorer, the models assigned are not displayed in SigXplorer
7 K' s& m: R5 r% e& b1718073 CONSTRAINT_MGR     CONCEPT_HDL   ECSet mapping errors on an upreved design in release 17.2: Pins in XNet and CSet do not match
7 L8 S, p; V% Y! x" F1720886 CONSTRAINT_MGR     CONCEPT_HDL   SigXplorer does not extract assigned model from the schematic
0 \" z/ U$ }' p1718514 CONSTRAINT_MGR     ECS_APPLY     Extracted topology does not use the PINUSE overrides specified on the canvas
1722306 GRE                CORE          Boards with Total Etch Length constraint only should not include z-axis when budgeting pin pairs
1710049 PSPICE             SIMULATOR     Functions are not taking parameters in correct order
1693021 SIG_INTEGRITY      OTHER         PINUSE is not updated correctly at model assignment with specific steps
" I( l2 L' K- F% J1 d# ~9 H1730854 SIP_LAYOUT         SYMB_EDIT_APP Cannot delete all the die pin from a symbol using the Symbol Edit application mode
$ |& v- ^1 z: S+ g+ |8 T/ H3 |
' h* s, H; |2 T4 h- Q% _
Fixed CCRs: SPB 17.2 HF017
4 ]' E5 N  y$ W$ S! n+ E04-13-2017
========================================================================================================================================================
& r+ O0 C8 @+ L( LCCRID   Product            ProductLevel2 Title
! L% i$ H- o1 D1 f- `========================================================================================================================================================
1732877 ALLEGRO_EDITOR     SKILL         The 'axlXSectionGet' function fails in release 17.2 Hotfix 016


6 S* F) P$ c5 t6 w1 g) OFixed CCRs: SPB 17.2 HF016
  e  I6 k7 q6 T8 |04-6-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
: ^* G# b, n, K+ e3 a: q; k========================================================================================================================================================
# a) \0 C8 B6 ]; e7 o5 J1673128 ADW                COMPONENT_BRO Directive is saved in project CPM
1673510 ADW                COMPONENT_BRO Lifecycle status color column is not sorted correctly in Component Browser search results
1604734 ADW                DATABASE      Parts displaying non-key properties and values in the Component Browser in ADW
0 s1 h0 c' v, Q1142957 ADW                DSN_FLOW      No Help available for schematic design verification
1609186 ADW                DSN_MIGRATION ADW Design Migration utility should handle ADW board reference projects and manage atdm.ini
- ~# i. R1 E! e3 W1591757 ADW                GENERIC_UI    Running 'Create Test Schematic' in ADW Flow Manager results in Error SPCOCN-1736
1588111 ADW                LIBIMPORT     Library Import fails with Java errors while processing .csv files
1642367 ALLEGRO_EDITOR     3D_CANVAS     Component height is not correct in new 3D Viewer
1642668 ALLEGRO_EDITOR     3D_CANVAS     The new 3D canvas does not show STEP model of the drawing (.dra)
1653247 ALLEGRO_EDITOR     3D_CANVAS     New interactive 3D Viewer shows wrong placement
+ T7 f4 |* j" ^4 e1 Z1658275 ALLEGRO_EDITOR     3D_CANVAS     Components on the bottom side are shifted in the new 3D view
1639244 ALLEGRO_EDITOR     ARTWORK       When importing an artwork, a sub-folder is created with the value of the ads_sdart environment variable
: R5 {7 A2 ?# x# C1658173 ALLEGRO_EDITOR     ARTWORK       ARTWORK: Value of Scale factor for output.
0 X: X$ f) E  M8 C: {  z! P1661760 ALLEGRO_EDITOR     ARTWORK       Import artwork to Design Outline layer does not give error in Allegro prompt.
1667778 ALLEGRO_EDITOR     COLOR         Add option to set FORM mini dehl_retain_color to NO
1669462 ALLEGRO_EDITOR     COLOR         Changes made to the Visibility tab are not reflected in the Color Dialog window
  t- f5 `2 j1 ^5 @% E! {1641265 ALLEGRO_EDITOR     CROSS_SECTION The differential impedance value for a layer is not getting updated
& `' O9 N( v, V. X- L1648149 ALLEGRO_EDITOR     CROSS_SECTION Getting warning when calculating impedance in mixed stackup
& n- g. R0 h# Y! S. D: t. C, o1671441 ALLEGRO_EDITOR     CROSS_SECTION Enhancement request for cross section dialog box
! }* P0 K! A$ i! x  M, D7 d1673320 ALLEGRO_EDITOR     CROSS_SECTION Diff impedance calculation fails
1690021 ALLEGRO_EDITOR     CROSS_SECTION How to keep settings of expanded/compressed columns in the Xsection
1703831 ALLEGRO_EDITOR     CROSS_SECTION Calculation of Diff Z0 fails in flex designs
9 a  R3 U4 n1 T" r/ x1711484 ALLEGRO_EDITOR     CROSS_SECTION ShowAll Column does not retain its status
1672841 ALLEGRO_EDITOR     DATABASE      ERROR(SPMHDB-153): Table corrupt; current/maximum mismatch
1673613 ALLEGRO_EDITOR     DATABASE      COVERLAY_TOP not present in the Non-conductor section of Color Dialog window
1688123 ALLEGRO_EDITOR     DATABASE      Drill Plating Issue
1701995 ALLEGRO_EDITOR     DATABASE      When upreving a 16.6 brd to release 17.2, lines drawn on OUTLINE are translated to CUTOUT and not DESIGN_OUTLINE
1710772 ALLEGRO_EDITOR     DATABASE      Mirror command not working on zones
$ B# O/ K$ J* l% Y1713335 ALLEGRO_EDITOR     DATABASE      Defining Adjacent_layer_keepout_above and/or Adjacent_layer_keepout_below and then saving the .dra file giving error
1693289 ALLEGRO_EDITOR     DFA           File - Save As script does not save the DFA file
: q. Y& D, |  T1644004 ALLEGRO_EDITOR     DRC_CONSTR    Unreported DRCs from dynamic copper to line and dynamic copper to SMT pin
1651425 ALLEGRO_EDITOR     DRC_CONSTR    The .brd file crashes when moving text controlled with minimum metal to metal constraints
1663494 ALLEGRO_EDITOR     DRC_CONSTR    Reported Mechanical Pin to conductor spacing DRC constraint value is incorrect leading to false DRCs
1 u" b9 b& O! S3 t$ _# s  A1687049 ALLEGRO_EDITOR     EDIT_ETCH     Create a Via Structure disconnects nets
" |  z2 Y+ v( C2 `) F3 c1704296 ALLEGRO_EDITOR     EDIT_ETCH     Asymmetrical fanout created for BGA Quadrant style
! R. Z) _* j# X+ `+ q1686873 ALLEGRO_EDITOR     EDIT_SHAPE    Merge static shapes deletes both the shapes selected.
  _# }! g# u8 m: {6 S! \& q1629925 ALLEGRO_EDITOR     GRAPHICS      Errors reported and no layout data drawn in PCB Editor in release 17.2 Hotfix 003 on Ubuntu 14.04
- T5 I- n9 y& B/ Q" R% u) W  D: y, b/ ^1628895 ALLEGRO_EDITOR     INTERACTIV    Shape Edit mode: An error message is required when attempting to edit a Shape with the FIXED property
1666379 ALLEGRO_EDITOR     INTERACTIV    Place replicate is not working on the attached test case
1668282 ALLEGRO_EDITOR     INTERACTIV    Grid display incorrect for repeated grids
& G6 v  B/ A. K0 \* M4 T! j% i1675531 ALLEGRO_EDITOR     INTERACTIV    Design Entry CIS: Cross Probing with PCB Editor and Constraint Manager is not working
* H5 d* [8 B, a( l1694470 ALLEGRO_EDITOR     INTERACTIV    Update description of variable padstack_nowarning_display
$ P& |/ E* |. i! q) i& r: v# {1696855 ALLEGRO_EDITOR     INTERACTIV    Mixed grid setting is not displayed correctly on Define Grid screen.
1698192 ALLEGRO_EDITOR     INTERACTIV    Deleting and replacing a component causing database corruption in Hotfix 009
" d8 i  M( _, G" P4 i9 J/ {% \1703671 ALLEGRO_EDITOR     INTERACTIV    An error occurs when defining grids with zero increment value
1703812 ALLEGRO_EDITOR     INTERACTIV    Crash during move when using the 'snap pick to' option set to symbol origin
1719276 ALLEGRO_EDITOR     INTERACTIV    Setting variable grid for 'All Etch' displays an error in the Define Grid form
1663422 ALLEGRO_EDITOR     INTERFACES    Shape loses group membership after importing through sub-drawing
1637959 ALLEGRO_EDITOR     MANUFACT      Thieving uses different clearance values around the route keepin.
0 o* u9 b# G& B, X3 D1716431 ALLEGRO_EDITOR     MANUFACT      Test points generation stops due to an error
+ K6 Z0 H" s( @2 ~0 n9 n% z1641994 ALLEGRO_EDITOR     OTHER         DB Doctor: Incorrect spelling of 'eliminated' in the log file messages
1660496 ALLEGRO_EDITOR     OTHER         SiP Layout crashes when trying to generate abstract level view by using export chips and connectivity
1685464 ALLEGRO_EDITOR     OTHER         The 'alias ~S save' command is not recognized when set in the local env file
: L5 g2 `* z( p& q: C' s1696486 ALLEGRO_EDITOR     OTHER         STEP export results vary between releases 16.6 and 17.2
1706623 ALLEGRO_EDITOR     OTHER         axlBackdrillGet crashes for invalid argument
" n. K2 q: E% t1586957 ALLEGRO_EDITOR     PAD_EDITOR    In Pad Editor, selecting a pad geometry is not showing up in the Design Layers tab
! a6 I' G+ c; Z$ }( x" F3 Z  Q! V1610984 ALLEGRO_EDITOR     PAD_EDITOR    Geometry set in tabs not read, only initial value set in Start page is used
1614015 ALLEGRO_EDITOR     PAD_EDITOR    Padstack Editor in release 17.2 does not auto fill geometry in design layers
3 b5 W9 v0 Y8 j% M: l+ B1636012 ALLEGRO_EDITOR     PAD_EDITOR    Keepout should not be allowed if antipad is not defined for outer layers
5 B& _+ W* f$ H- A, L6 [2 {) X8 t1641973 ALLEGRO_EDITOR     PAD_EDITOR    Padstack Editor: Path to the previously opened .pad file is not seeded in the File - Open dialog on a fresh launch
1642789 ALLEGRO_EDITOR     PAD_EDITOR    In release 17.2, 'Units' and 'Decimal Places' in Padstack Editor are not updated as per the .pad file
1646914 ALLEGRO_EDITOR     PAD_EDITOR    The 'Save' button is grayed out in Padstack Editor
# J5 O4 g; d8 I7 w  m1657553 ALLEGRO_EDITOR     PAD_EDITOR    No possibility to specify Padstack Editor default library path at invocation
1657609 ALLEGRO_EDITOR     PAD_EDITOR    Changing Tolerance field in Padstack Editor does not activate the Save button
1662225 ALLEGRO_EDITOR     PAD_EDITOR    Padstack editor dialog message doesn't match available options
1667062 ALLEGRO_EDITOR     PAD_EDITOR    Padstack editor does not retain the decimal places from the previous session
1672774 ALLEGRO_EDITOR     PAD_EDITOR    Pad Editor graphics appear to show offset incorrectly
; m0 Z2 \) d! j& F+ x- V1 @- B1674157 ALLEGRO_EDITOR     PAD_EDITOR    Update Symbols does not update Pad Type Information
1675438 ALLEGRO_EDITOR     PAD_EDITOR    Drill hole size warning for the SMD pad
1684376 ALLEGRO_EDITOR     PAD_EDITOR    Pad Editor issues with settings, such as decimal places, layers, and so on
1690376 ALLEGRO_EDITOR     PAD_EDITOR    Variable padstack_nowarning_display fails to suppress warnings
, Q% A) g/ f6 p1694649 ALLEGRO_EDITOR     PAD_EDITOR    Change&nbsp;Cancel button to No in warning generated when&nbsp;updating padstacks in design layout
939242  ALLEGRO_EDITOR     PLACEMENT     Cross probing between Capture and PCB Editor is inconsistent
1103945 ALLEGRO_EDITOR     PLACEMENT     Place Replicate Create does not include the etch connected to pin
1233019 ALLEGRO_EDITOR     PLACEMENT     Allow cross probe object selection apart from highlighting during place replicate
% F2 ?8 x4 A  |) L$ h* M6 i1643078 ALLEGRO_EDITOR     PLACEMENT     PCB Editor flags an error message when a module is placed at a specific angle
, L8 Z5 ]( Y( w" B+ @1696932 ALLEGRO_EDITOR     PLACEMENT     Inconsistency with Snap pick to when selecting Segment Midpoint
1654500 ALLEGRO_EDITOR     REPORTS       In release 17.2 Hotfix 006, display of Netin (back anno.) report fails when variable ads_sdreport is set
1643992 ALLEGRO_EDITOR     SCHEM_FTB     Export Physical fails with the 'netrev.exe has stopped working' error
  ?# ]8 e1 Y# O; g: H& ~* O1653400 ALLEGRO_EDITOR     SHAPE         Dynamic shape does not void a via.
. m7 H9 A' `$ I* c; e- c1668262 ALLEGRO_EDITOR     SHAPE         dynamic shape does not void custom route keepout with arc
- g( c5 g. S# g6 U( o. z' M* w1682569 ALLEGRO_EDITOR     SHAPE         Variable 'dv_squarecorners' not working correctly.
1696240 ALLEGRO_EDITOR     SHAPE         SKILL error when merging polygons
1709968 ALLEGRO_EDITOR     SHAPE         In release 17.2, DB Doctor reports error in shape when no error was reported in release 16.6 for the same shape
1632505 ALLEGRO_EDITOR     SKILL         In release 17.2 Hotfix 004, PCB Editor crashes after SRM update and save
1651701 ALLEGRO_EDITOR     SKILL         Cannot set the etch factor value in the cross-section using the axlXSectionModify() SKILL command
6 C( _4 j- I$ c1658419 ALLEGRO_EDITOR     SKILL         PCB Editor crashes after running SRM
1658948 ALLEGRO_EDITOR     SKILL         axlIsLayerNegative() is not working in release 17.2
1670956 ALLEGRO_EDITOR     SKILL         axlIsLayerNegative() always returns nil
1687239 ALLEGRO_EDITOR     SKILL         Problem with SKILL function axlCNSGetPhysical - incorrect parse string
1692345 ALLEGRO_EDITOR     SKILL         The axlGetParm documentation example for deleting an artwork record is incorrect.
1707878 ALLEGRO_EDITOR     SKILL         Object rat_t does not work with axlDBPinPairLength.
0 h) T9 k  A. R- |7 U0 X" z1598061 ALLEGRO_EDITOR     UI_GENERAL    Adjust menus to allow side by side view
: _; H- Y, _3 I: Z& W6 G5 w1599901 ALLEGRO_EDITOR     UI_GENERAL    Color Dialog box is not updating according to visibility tab.
1602563 ALLEGRO_EDITOR     UI_GENERAL    Shortcuts to menu items not working in release 17.2
6 E  c$ O2 _8 d7 A1603776 ALLEGRO_EDITOR     UI_GENERAL    Alt key not working with menu commands
2 `2 R* R' ?6 ~7 N4 H! r" R: r9 _1611516 ALLEGRO_EDITOR     UI_GENERAL    Keyboard shortcuts have no response
1614763 ALLEGRO_EDITOR     UI_GENERAL    Cannot scroll to the bottom of an undocked command window in PCB Editor
1619873 ALLEGRO_EDITOR     UI_GENERAL    Command Window scrollbar does not reach its end
" a, H4 Y- ~) }, s8 C1 {6 y" Q' E8 p: w8 U1624617 ALLEGRO_EDITOR     UI_GENERAL    Dialog box title under Setup > Outlines > Design Outline... Design is misspelled as "Desgin"
1631646 ALLEGRO_EDITOR     UI_GENERAL    Visibility pane not retaining the correct layer view
1637062 ALLEGRO_EDITOR     UI_GENERAL    The last line of the floating command window in release 17.2 is hidden behind the command window frame
1642645 ALLEGRO_EDITOR     UI_GENERAL    Cannot scroll to the bottom of an undocked command window in PCB Editor
; z( @6 T+ Y& ~& t: ^) ~2 x1645335 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor crashes in Hotfixes 004 and 005 if ODE and Allegro Manufacturing options are installed
* e& W  r  ?  {1 i, R/ c/ x1647520 ALLEGRO_EDITOR     UI_GENERAL    PCB Editor crashes after installing release 17.2 Hotfix 005
1647541 ALLEGRO_EDITOR     UI_GENERAL    Release 17.2 Hotfix 005: PCB Editor crashes immediately after launch
1650044 ALLEGRO_EDITOR     UI_GENERAL    Keyboard shortcuts are not working properly in release 17.2
5 {0 R: n* x$ P: d1651912 ALLEGRO_EDITOR     UI_GENERAL    Inconsistent response when using the Alt key
1652423 ALLEGRO_EDITOR     UI_GENERAL    Using the F1 key does not display the help document
1654600 ALLEGRO_EDITOR     UI_GENERAL    Spelling Mistake in "Design Outline" dialog box, Setup->Outlines->Design Outline, misspelled as "Desgin"
& l; B) ~% L- B. z) Y; V0 j/ ]1654777 ALLEGRO_EDITOR     UI_GENERAL    Reports UI does not work properly when writing a report file.
1655500 ALLEGRO_EDITOR     UI_GENERAL    Visibility selection ignored after color change
1655514 ALLEGRO_EDITOR     UI_GENERAL    Artwork Film is available in the View section only after you restart PCB Editor
$ q( X6 \/ w) @  O' U, G: v1663819 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2, SKILL function, axlOpenDesign(), does not work as expected
7 O2 S  T* X  w! C4 S1671334 ALLEGRO_EDITOR     UI_GENERAL    Design outline is not shown in 'World View' window
( I6 ^  q: R3 W5 h1672148 ALLEGRO_EDITOR     UI_GENERAL    Add option in release 17.2 to change the placement of the Find, Visibility, and Options tabs similar to earlier release
1679418 ALLEGRO_EDITOR     UI_GENERAL    On choosing Edit - Move, the 'Symbol pin #' box is obfuscated
, Y! _; S" j* c- e8 L1679761 ALLEGRO_EDITOR     UI_GENERAL    Choosing Edit - Spin hides 'Symbol pin #' partially
# D2 w$ }& J/ [+ k" ]1686887 ALLEGRO_EDITOR     UI_GENERAL    Hyper Text no longer selects coordinates for easy copy
1687286 ALLEGRO_EDITOR     UI_GENERAL    In 17.2 Hotfix 009, the Static Phase meter shows up in the middle of the screen instead of the lower-right corner
; k8 y) p1 ^# q# x& g1692416 ALLEGRO_EDITOR     UI_GENERAL    Underscores in menu commands denoting shortcuts are missing in release 17.2
& r) f# t( b; T6 h) [9 S1693968 ALLEGRO_EDITOR     UI_GENERAL    Batch process that uses SKILL is taking too long to process files and generate reports
) g9 L* x$ |4 U1702420 ALLEGRO_EDITOR     UI_GENERAL    Unable to maximize&nbsp;reports viewer&nbsp;in 17.2
1703065 ALLEGRO_EDITOR     UI_GENERAL    Menu shortcuts do not work as expected
1703107 ALLEGRO_EDITOR     UI_GENERAL    Scripting using regional settings for decimal separator
8 k/ Z' K; k* O1707547 ALLEGRO_EDITOR     UI_GENERAL    Release 17.2: The Alt key function is not working in PCB Editor
5 p  N4 F& t" ^1709280 ALLEGRO_EDITOR     UI_GENERAL    Alt+Function key not working in release 17.2.
1639896 ALLEGRO_PROD_TOOLB CORE          MFG collector does not move files to subdirectories
( S* d0 j6 {1 Y- r, w1608804 ALTM_TRANSLATOR    DE_HDL        Translation issues in symbols with multiple physical pins mapping to a single logical function
1658525 ALTM_TRANSLATOR    DE_HDL        Invalid characters in pin names
1658536 ALTM_TRANSLATOR    DE_HDL        All cell names should be generated in lowercase letters
1609962 ALTM_TRANSLATOR    PCB_EDITOR    Errors reported during design translation
1661562 APD                DRC_CONSTRAIN The wrong space calculation on finger to trace
1682398 APD                SHAPE         Deleting islands causes out of date shapes
1638112 ASDA               CANVAS_EDIT   Unable to rename multiple selected buses using the 'Assign Name' command
& F  c0 m2 n. N, E. s; ~5 g7 P1645571 ASDA               CANVAS_EDIT   Various routing inconsistencies with synonym bodies on the canvas
0 J, k# \- O+ \1 X% [1 j( G4 p1656336 ASDA               CANVAS_EDIT   Presence of illegal characters in the net name removes the entire net name
, ?% m6 R7 V1 _1 \' ^4 `% f1667176 ASDA               CANVAS_EDIT   Unable to add the port symbol in a specific scenario
+ ^  n6 s9 m8 t2 \( \2 E3 I1641473 ASDA               CONSTRAINT_MA Importing a tech file into SDA makes the tool unresponsive
( G5 w# M3 }+ w- K8 a1661350 ASDA               CONSTRAINT_MA Unable to create physical & spacing class from the docked CM
1645557 ASDA               IMPORT_DEHDL_ Importing a DE-HDL design into SDA adds the COMMENT_BODY attribute to nets
1652753 ASDA               MISCELLANEOUS Tcl command window should display correct casing for autocompleted command
3 r6 @& @  k1 a2 p) C6 c) X% t0 o1654973 ASDA               MISCELLANEOUS If there is a casing mismatch in the Tcl command name, correct command is not picked from the list
1652718 ASDA               PAGE_MANAGEME Page numbering on the page border does not update correctly when pages are moved, added, deleted
$ q3 o* a: e1 k. ]# c1699454 ASDA               TABLE         In the table object, cursor skips a cell on the first use of the TAB key
1702702 ASDA               TABLE         Copy-pasting table objects to a new page fills the headers and rows in black
: F, a8 v9 n6 e. q; k" E) N5 H) j1668877 CAPTURE            ANNOTATE      Using Ctrl+drag does not preserve the reference designator value
1665454 CAPTURE            NETGROUPS     Incremental copy for alias does not work anymore.
( R2 f* G2 h; i1634598 CAPTURE            OTHER         The ‘OrCAD_Capture_CIS_option’ license not released even after selecting another product option
1636090 CAPTURE            OTHER         Capture crashes after switching from release 17.2 Hotfix 003 to 004 due to some Tcl files
: K. d; o! t5 L5 o  z( n  g1650029 CAPTURE            OTHER         Crash while archiving a newly created PSpice project without adding simulation profile
1 _! G) M* c8 t/ F" P) Q: s1 n1659602 CAPTURE            OTHER         Saving CIS BOM via TCL command window
1678715 CAPTURE            OTHER         Capture.ini [WebResourcesMenu] is not working in release 17.2
1619449 CAPTURE            PROJECT_MANAG Search not working in a PSpice project
1670133 CAPTURE            PROJECT_MANAG Start Page showing wrong Software Version
. e/ W: D8 p% u& t! N5 T1670766 CAPTURE            PROJECT_MANAG autoreference does not work properly
1676095 CAPTURE            PROJECT_MANAG (SID:22758) OrCAD Capture Start Page reporting wrong hotfix installed
: g! N( q$ @- i4 y( {1658315 CAPTURE            TCL_INTERFACE Inserting text with double quotes is not working as expected in PDF created from Capture
1642601 CIS                OTHER         Design Entry CIS: SQL server password is required each time the tool is launched
: ~0 o' n6 B/ Z2 {* d1712279 CONCEPT_HDL        CONSTRAINT_MG Differential pairs are dropped from Net Classes when upreved to release 17.2-2016
  X5 z! A  k5 G* S: D. g, A6 w1665449 CONCEPT_HDL        COPY_PROJECT  Copy project fails with error COPYPROJ-77
$ d7 x; T  b0 ^& A. V. V. w# f1661778 CONCEPT_HDL        CORE          Advanced Find will not find pins with the SIG_NAME property attached
1666084 CONCEPT_HDL        CORE          All user-defined properties are not listed in the Customize columns in Variant Editor
: R' Z; r) k7 ^: C- B5 u( P1667043 CONCEPT_HDL        CORE          Incorrect information in cpm.log file
1670659 CONCEPT_HDL        CORE          SIGNAME text off grid when pasting copy using ctrl+v.
1697732 CONCEPT_HDL        CORE          Warning (SPCOCN-922): The object is being placed towards the left edge of the schematic. Ensure that the objects are pla
1697955 CONCEPT_HDL        CORE          Rename Signal places sig_name at an incorrect position for an unnamed net
# \9 N0 a8 H" m# O: F# O1711635 CONCEPT_HDL        CORE          The arrow keys do not work as expected in Windows mode
) u: O) N6 S5 P6 @. k1713091 CONCEPT_HDL        CORE          Difference in the behavior of 'Add Signal Name' in DE-HDL between releases 16.6 and 17.2
1708820 CONCEPT_HDL        OTHER         In a board cache flow, component bodies are missing when importing another board cached flow project.
% ]0 F, d' Z1 e" D1639928 CONSTRAINT_MGR     CONCEPT_HDL   The '-filterFile' argument is not recognized when cmDiffUtility is run as a command line operation
1657048 CONSTRAINT_MGR     CONCEPT_HDL   Unable to navigate through the search results in the CM Reports
2 H' b3 R5 R1 D+ C2 F3 h& {6 K1718073 CONSTRAINT_MGR     CONCEPT_HDL   ECSet mapping errors on an upreved design in release 17.2: Pins in XNet and CSet do not match
$ Q- v$ `3 ^& @4 ^1717336 CONSTRAINT_MGR     DATABASE      Netclass members change during logic import; it's a toggle switch
1718514 CONSTRAINT_MGR     ECS_APPLY     Extracted topology does not use the PINUSE overrides specified on the canvas
) t0 s0 v$ I, v1682885 CONSTRAINT_MGR     INTERACTIV    Constraint Manager worksheet switching does not work correctly in Linux
1669523 CONSTRAINT_MGR     OTHER         Select is disabled in Constraint Manager when a command is active in PCB Editor
: ?6 K6 F% r( _, J% q1670802 CONSTRAINT_MGR     OTHER         Selecting a list of nets using the shift key does not work in Spacing and Physical domain
  z$ Y" e& L5 h, w! k, @1670922 CONSTRAINT_MGR     OTHER         Title of the Layer Remove window is Constraint Manager
0 A# {  ]) H' ~$ z; x7 S3 v9 Q% a1678235 CONSTRAINT_MGR     OTHER         Select option grayed out in Constraint Manager if a command is active in PCB Editor
0 w8 v9 P0 I6 b  \' K6 e1680917 CONSTRAINT_MGR     OTHER         In release 17.2, nets cannot be selected in Constraint Manager when a PCB Editor command is active
; m0 s, L2 W( v1691125 CONSTRAINT_MGR     OTHER         Highlight command no longer selects the net in CM
6 I' ~5 W. C& {* H5 F1 F1703791 CONSTRAINT_MGR     OTHER         Cross highlighting and assigning color to nets between PCB Editor and CM does not work
1649603 CONSTRAINT_MGR     UI_FORMS      Expand and Collapse commands do not work when multiple objects are selected
+ u+ J3 f+ B9 o% d1 `# h1654931 CONSTRAINT_MGR     UI_FORMS      Expand, collapse only works on one of the multiple selected objects.
5 X( O+ Q- p6 _8 ]( Z7 M1668794 CONSTRAINT_MGR     UI_FORMS      Incorrect via name shown when filtering via list
1678305 CONSTRAINT_MGR     UI_FORMS      Unable to use the CM worksheet customization (wcfx) from the CDS_SITE area
; N$ g- {9 h  [# `# u( n1679909 CONSTRAINT_MGR     UI_FORMS      Incorrect layer order getting saved when defining BB vias in Constraint Manager PCSet
1691906 CONSTRAINT_MGR     UI_FORMS      Display Issue: When you use the filters, the horizontal scroll bars are duplicated
1677893 ECW                INTEGRATION   Integrations list update is not working as per scheduled time
1652707 ECW                METRICS       Incorrect date and time displayed in mouseover tooltip on the Metric Trend chart
% i% E2 B7 W3 |$ m1654512 ECW                METRICS       Incorrect date and time displayed in mouseover tooltip on the Metric Trend chart
1668953 ECW                METRICS       IE11 Swedish only: Incorrect date and time displayed in mouseover tooltip on the Metric Trend chart
" ]" W0 h9 _. v1 B) s! L1677443 ECW                METRICS       Queued up metric packets on Pulse server are not processed if there are any packets related to a deleted project
1663676 F2B                PACKAGERXL    Physical net name (PNN) errors in the log file
1669583 GRE                DETAIL        AiDT always fails push when there is a connect shape attached to the cline being tuned
, Y* r7 {+ f. E8 T1686350 INSTALLATION       SPB           InstallDiagnose fails to repair some errors
1672369 PCB_LIBRARIAN      EXPLORER      Cannot create a New library build in Library Explorer.
1631034 PSPICE             ENVIRONMENT   When simulating the design in release 17.2, Capture crashes but works with release 16.6
, a) l* K3 H& x& }1648284 PSPICE             ENVIRONMENT   PSpice project crashes when a design is opened in release 17.2
& f. Z$ h! k' \0 P9 _1663336 PSPICE             MODELEDITOR   Ibis translation not supporting paths with spaces
! Z9 G& a6 w' l6 i1 C4 E1679376 SIG_EXPLORER       OTHER         Topology created in OrCAD PCB SI license cannot be reopened with the same license
4 M3 ]: b. s1 i7 k+ F. ~/ }1666484 SIP_LAYOUT         CROSS_SECTION On converting a design from release 16.6 to release 17.2, a Dielectric thickness of ‘0.2032’ is added to another layer.
1 E; X# I$ [  B$ K1687988 SIP_LAYOUT         DIE_GENERATOR 'compose die from geometry' does not retain the user-defined padstack name
) V3 H; }' V7 F7 K, u9 L1715016 SIP_LAYOUT         DIE_GENERATOR Using Die Text-In wizard to replace a die reconnects wire bonds to the wrong die in stack-up
1620601 SIP_LAYOUT         MANUFACTURING Need the ability to create LINES with round end caps in the same way as the LINES appear in the database
1705963 SIP_LAYOUT         PADSTACK_EDIT Pad Designer: "None" changing spontaneously into "Circle 0.000" in a pad stack definition and unable to save
1713767 SIP_LAYOUT         REPORTS       Reports in release 17.2 for the Verilog Port Name are adding incorrect data that was not found in release 16.6
( d) O5 ]0 n% t) ], c1696218 SIP_LAYOUT         SKILL         SiP Layout crashes on reassigning nets
1695885 SIP_LAYOUT         UI_GENERAL    Visibility Tab check box: unchecked "All" disables access to "Shp" check box
1639838 SIP_RF             DIEEXPORT     Enhance the error message, SIP-1507, to include that overlapping pins within tolerance are included during die export
1653894 SIP_RF             DIEEXPORT     Redundant error message for die export, when view name is other than "layout"
1681332 SIP_RF             OTHER         Running die export causes Virtuoso to crash
! C& m% R# ]+ _) L1679336 SPECCTRA           LICENSING     Min/Max Propagation Delay cannot be routed by PCB Router using OrCAD PCB Designer Professional
; Q; u% a. t# E7 a/ S
# W$ b: [9 z0 _4 Y' r' z, S
Fixed CCRs: SPB 17.2 HF015
03-16-2017
3 w9 V1 p7 O+ b0 J========================================================================================================================================================
3 q. J: t* C; n: Z6 WCCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1653366 ALLEGRO_EDITOR     INTERFACES    Unable to attach step model to symbol
1671760 ALLEGRO_EDITOR     INTERFACES    Step package mapping window unable to display step model
1706879 ALLEGRO_EDITOR     MANUFACT      Trace gets moved to dielectric layer after using the Gloss function
1708685 ALLEGRO_EDITOR     MANUFACT      Incomplete ncdrill holes data in drl file
7 I2 p: a5 ~+ y6 v4 X/ V) L! f1712057 ALLEGRO_EDITOR     PAD_EDITOR    Changing text size and restarting Padstack Editor results in incorrectly scaled forms
9 y- j6 ]6 |, u  {% v2 K1709335 ALLEGRO_EDITOR     SCHEM_FTB     Cannot import netlist from attached design
% G# A7 O' H: c9 _1687329 ALLEGRO_EDITOR     SHAPE         Shape is not voiding uniformly when component is rotated in 30 degrees
1698539 ALLEGRO_EDITOR     SHAPE         A thin shape is left when dv_fixfullcontact is enabled.
1620210 ALLEGRO_EDITOR     UI_GENERAL    Need to run PCB Editor from both 17.2-2016 and 16.6 releases simultaneously
1687819 ALLEGRO_EDITOR     UI_GENERAL    Change in Region and Language settings of Windows impacts decimal character in Padstack Editor
5 o2 o  C' O, o/ L1699326 ALLEGRO_EDITOR     UI_GENERAL    Padstack Editor follows the geographical area rules set in the Control Panel while PCB Editor does not
6 \+ V$ B, B1 j1 C$ Y; t1711341 ALLEGRO_EDITOR     UI_GENERAL    Incorrect pad size in Padstack Editor when the German regional settings are used
6 Z% a3 j/ r8 g4 P1712496 ALLEGRO_EDITOR     UI_GENERAL    Padstack Editor shows incorrect values when using comma and 3 decimal places
1714744 ALLEGRO_EDITOR     UI_GENERAL    Using comma instead of dot as integer separator results in incorrect diameter value
1715714 ALLEGRO_EDITOR     UI_GENERAL    If the 'Decimal places' field is set to 3, values in PAD Designer change automatically
% `2 h) D; k" G1713292 APD                WIREBOND      Allegro Package Designer crashes when adding wire to a die pad
1710973 ASDA               PACKAGER      Unable to export Allegro SDA project to PCB Layout
1698697 CONCEPT_HDL        COPY_PROJECT  Copy project corrupts the .dcf file
1705401 CONCEPT_HDL        CORE          Alignment issues while pasting signal names in 16.6 Hotfix 084
8 F0 d" Z- {  S1 n1707116 CONCEPT_HDL        CORE          SIG_NAME is placed on non-grid position
1710486 CONCEPT_HDL        CORE          Rename Signal places sig_name at an incorrect position for an unnamed net
$ ?) k9 r3 B$ N' q0 V1667786 CONSTRAINT_MGR     XNET_DIFFPAIR Parts with NO_XNET_CONNECTION getting extracted into SigXplorer
1709508 SIG_INTEGRITY      REPORTS       Allegro Sigrity SI crashes when running a reflection simulation
1710097 SIP_LAYOUT         DIE_STACK_EDI The IY option of the 'move and stretch wire' command moves the die to incorrect coordinates
1712964 SIP_LAYOUT         SYMBOL        SiP Layout crashes when using Renumber Pins in Symbol Edit application mode


, k) K% Q4 k1 B; ZFixed CCRs: SPB 17.2 HF014
03-4-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1691828 ADW                COMPONENT_BRO Part Information Manager displays incorrect data related to attributes on relationships
, j% {$ d) q' h" e1700963 ALLEGRO_EDITOR     DATABASE      Running the 'slide' command results in the cline segment losing connectivity
1685502 ALLEGRO_EDITOR     INTERFACES    The Export - PDF command fails to export the TOP etch subclass with error code SPMHGE-268
8 `& Z+ ?+ Z$ m. J0 c- f2 @( z1644643 ALLEGRO_EDITOR     MANUFACT      The NC drill legend does not match the drill customization data
- U- u- O* @# K  F) Z) ^$ r  ?! o1700557 ALLEGRO_EDITOR     MANUFACT      DXF output does not contain drill figure data
1660252 ALLEGRO_EDITOR     NC            NC Drill file generated with errors
3 O( C1 n; ]# Z1 X) g1677775 ALLEGRO_EDITOR     NC            Merging of drills not retained in database.
& P5 K$ K2 U  z) |1701554 ALLEGRO_EDITOR     SHAPE         Shape spacing clearance is not updated unless the shape vertex is deleted
& ]6 K6 v% U! l1704669 ALLEGRO_EDITOR     SHAPE         Route Keepin is not getting created at a specific location
: a3 d" l0 D9 L1 V1685995 ALLEGRO_EDITOR     SKILL         All film sequence numbers are returned as 0 when using the SKILL function axlGetParam
7 O) W5 \$ X5 K4 L* q4 t1621336 ALLEGRO_EDITOR     UI_GENERAL    Changing the color visibility does not refresh the screen color immediately
1668817 ALLEGRO_EDITOR     UI_GENERAL    Changing the visibility or the color on the canvas in release 17.2-2016 takes longer than release 16.6
3 R$ Y: K  q4 i, b9 T1671268 ALLEGRO_EDITOR     UI_GENERAL    Visibility Window: There is a noticeable lag when enabling etch, via, and pin on a specific layer one by one
1690691 ALLEGRO_EDITOR     UI_GENERAL    Reports not generating if the 'allegro_html_qt' environment variable is disabled
0 y+ u; M" ?1 ~1709903 ALLEGRO_EDITOR     UI_GENERAL    Toggling layer visibility does not change the display until the mouse pointer is moved
1647596 APD                EXPORT_DATA   Allegro Package Designer crashes when trying to export board-level components
8 i+ M8 m! |! s9 e( ?1688035 APD                OTHER         Significant difference seen in the percentage of metal between the Metal Usage reports of positive and negative layers
8 N5 T: E8 q% X4 b2 e4 [3 {1690777 CONCEPT_HDL        CHECKPLUS     Rules Checker returns an error when the value of the PACK_TYPE property is in lowercase
1695987 CONCEPT_HDL        CORE          $PN placement in DE-HDL during part development is not following mouse placement
- R( Z, X5 c: s5 J6 g1700873 CONCEPT_HDL        CORE          With duplicate part table files, running the Assign Power Pins command crashes DE-HDL without any message
1702703 CONCEPT_HDL        CORE          Location of $PN in DE-HDL Symbol Editor is not as precise as it was in 17.2 Hotfix 011
- W. B) u2 T# T1 d/ h1705999 CONCEPT_HDL        CORE          Signal naming is not working correctly in SPB 17.2
: w8 g8 u5 p7 H4 J8 t1677489 CONCEPT_HDL        CREFER        CRefer points to incorrect page numbers when there are page mismatches in the logical and physical page numbers
1698259 CONSTRAINT_MGR     CONCEPT_HDL   Unstable $LOCATION property in release 17.2-2016
1702537 CONSTRAINT_MGR     CONCEPT_HDL   ECSet mapping errors reported after removing the signal models on an upreved design
# Y" S  h4 v9 a! {7 `1703981 CONSTRAINT_MGR     TECHFILE      Importing a technology file (.tcf) results in packaging errors
( \; z  R$ |* b7 q5 j+ s1673115 ECW                INTEGRATION   Import from external data sources (Integrations) truncates input values to 128 characters
1699395 FSP                FPGA_SUPPORT  Selecting a QSF part name in the FPGA Properties window crashes FSP
1704353 INSTALLATION       DOWNLOAD_MGR  Selecting 'View' in Download Manager results in error, 'Object Reference not set to an instance of an object'
1705265 INSTALLATION       DOWNLOAD_MGR  Problem installing OrCAD Library Builder from Download Manager
4 [! n. F$ _/ K5 U1 f( N1646635 PDN_ANALYSIS       PCB_PI        PCB Editor uses 'powerdc.exe' to launch PowerDC instead of the 'powerdc' script
8 _# c3 u8 D  r
* H  {! w4 C/ R2 z/ O
Fixed CCRs: SPB 17.2 HF013
8 l. w1 }  R( U1 e02-17-2017
========================================================================================================================================================
# D1 `! ?0 ^- T, JCCRID   Product            ProductLevel2 Title
. S( l4 ]0 f' q( Z+ n9 u========================================================================================================================================================
9 u' [  K& [, ?" J1567741 ADW                COMPONENT_BRO The PPL_list never gets read when using a saveconf.ctr located in the global site.cpm
1697109 ALLEGRO_EDITOR     ARTWORK       Artwork not showing padstacks for the soldermask layer
1682297 ALLEGRO_EDITOR     DATABASE      Derived padstack and associated padshapes not updated when design is upreved for compatibility with the current version
1697309 ALLEGRO_EDITOR     DATABASE      PCB Editor 17.2 uprev changes NC pins from non-plated to plated
( y( M# L2 D  x, `' H1698624 ALLEGRO_EDITOR     DATABASE      Opening 16.6 board in 17.2 converts non-plated holes to plated
1697092 ALLEGRO_EDITOR     OTHER         axlDBViaStack crashes PCB Editor session and corrupts the board
1687819 ALLEGRO_EDITOR     UI_GENERAL    Change in Region and Language settings of Windows impacts decimal character in Padstack Editor
1696637 ALLEGRO_EDITOR     UI_GENERAL    Padstack Editor uses Region and Language settings for the decimal symbol
" h0 Y5 }" Q" G  M& r1699326 ALLEGRO_EDITOR     UI_GENERAL    Padstack Editor follows the geographical area rules set in the Control Panel while PCB Editor does not
1616138 ALTM_TRANSLATOR    PCB_EDITOR    Board file imported from third-party tool to PCB Editor has the shapes but not the components
7 f8 {4 s4 ~! u2 }& A% p3 V1666020 ALTM_TRANSLATOR    PCB_EDITOR    Board converted from a third-party tool to PCB Editor has missing components
& X  G* D* P/ E1690448 CAPTURE            CORRUPT_DESIG Corrupt design: nets in this design are not displayed when running Edit - Browse - Nets
1690455 CAPTURE            CORRUPT_DESIG Corrupt design: all the nets in this design are not displayed when running Edit - Browse - Nets
/ y6 m6 j6 ^) P0 {1684180 CONCEPT_HDL        CORE          Message should indicate that the user needs to reload the design after setting SET STICKY_OFF
3 |% j2 r4 M" g" e3 P- W8 l, F1695987 CONCEPT_HDL        CORE          $PN placement in DE-HDL during part development is not following mouse placement
1688287 CONSTRAINT_MGR     DATABASE      PCB Editor crashing while adding a net to a net group.
1675013 ORBITIO            ALLEGRO_SIP_I Failed to import brd file
1698968 SIP_LAYOUT         3D_VIEWER     3D viewer shows keepin and not design outline.
# o; K/ l: p. s- C: [# q1699884 SIP_LAYOUT         ASSY_RULE_CHE SiP Layout crashes on using Assembly Rules Checker
: s- C4 A/ J( O1689969 SIP_LAYOUT         DIE_EDITOR    SiP Layout crashes when moving dies using relative coordinates
* S( B( C( j1 `5 z0 z1696239 SIP_LAYOUT         DIE_EDITOR    When using the Die-stack Editor to move and stretch wires, SiP Layout crashes
3 e) M1 g: v. F( R3 ?( P0 R1695372 SIP_LAYOUT         REPORTS       Running the Metal Usage reports fails on the Primary side.
( r6 F; M' V3 ?
  H- B; D$ O, g9 @0 l9 F" M
Fixed CCRs: SPB 17.2 HF012
. g% q  F2 ^9 d, {6 g! j( {; P02-3-2017
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
1659641 ADW            FLOW_MGR         Documentation Editor does not invoke when a .brd file is opened from EDM Flow Manager
1661632 CONCEPT_HDL    OTHER            Page skipped in DE-HDL when navigating using the Page Up and Page Down keys
$ s; ~* `' f8 {  L1 q" i1668325 ALLEGRO_EDITOR SHAPE            Updating shapes to smooth creates erratic voids.
1670082 CONSTRAINT_MGR ANALYSIS         Inconsistency in Constraint Analysis Modes - Electrical in OrCAD PCB Designer Professional 17.2
1674231 ECW            METRICS          Re-upload for local metric packets that failed on first attempt is not working when Pulse server name contains dots
1674338 APD            SHAPE            Shape is not clearing slivers that are smaller than the 'Minimum aperture for gap width' of '18 um'
4 f4 X7 r3 p: N1 ^& U1675677 ADW            DBEDITOR         DBeditor Issue-Searching by using the Properties method
! k' B% }: T3 U% }+ J1 E) O8 P1677489 CONCEPT_HDL    CREFER           CRefer points to incorrect page numbers when there are page mismatches in the logical and physical page numbers
0 B1 t3 A' b" o. _1679351 ALLEGRO_EDITOR REPORTS          Missing Fillets Report is not showing missing fillets on the bottom layer
+ ?( ~( ?" g8 w  J( X' q( |4 t1681002 ALLEGRO_EDITOR OTHER            17.2 STEP output fails to produce an output similar to 16.6
1682287 ALLEGRO_EDITOR EDIT_ETCH        Auto-interactive Delay tune (AiDT) rips lines that have been routed
, M5 x% F, S: [, O1682900 ALLEGRO_EDITOR PLACEMENT        Moving a symbol by snapping to segment vertex with 17.2 Hotfix 009 crashes PCB Editor
1684117 CONCEPT_HDL    CONSTRAINT_MGR   Property deleted from Constraint Manager is not getting updated in the DE-HDL canvas
1686803 ALLEGRO_EDITOR INTERFACES       PCB Editor crashes if the 'ipc2581_group_drills' variable is set.
" V- T! Z2 t* w, ~4 M* h1687816 ALLEGRO_EDITOR PLOTTING         Export PDF Vector text option does not work
1688287 CONSTRAINT_MGR DATABASE         PCB Editor crashing while adding a net to a net group.
3 y0 w8 Z1 n2 H1 t  r6 l1689881 ALLEGRO_EDITOR DFA              Record and replay script for loading DFA spreadsheet not working
% A3 r1 A8 |' ]1690958 ALLEGRO_EDITOR SKILL            SKILL command axlDBDelLock is not working as explained in the documentation
1692166 APD            DATABASE         DB Doctor returns 'ERROR(SPMHDB-252): A corrupt database pointer was detected' for a specific design
1693431 ALLEGRO_EDITOR SKILL            Running axlXSectionModify and axlXSectionSet results in warnings and corrupts multi-zone cross-section
1693719 ALLEGRO_EDITOR MANUFACT         Incorrect suppressed holes information in the drill file created
, R5 F4 g: x6 Y. M+ J3 r% G" S& f1693846 ALLEGRO_EDITOR MANUFACT         PCB Editor crashes when running the gloss command
1694151 CONCEPT_HDL    CORE             Rename Signal for unnamed net added the sig_name at the incorrect position with small text size.
1694867 ALLEGRO_EDITOR SHAPE            Void is deleted by the shape merge command
1695131 ALLEGRO_EDITOR SKILL            PCB Editor crashes when using the axlSpreadsheetDefineCell SKILL function

7 U+ T+ b* k4 h3 h3 t; R9 F9 W3 H# _
; h" y3 ~6 J2 H% \( U6 PFixed CCRs: SPB 17.2 HF011
" u8 ~- E1 Q7 X/ E" O01-20-2017
3 R5 n/ [( S6 n0 G===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
- A! g. {3 U7 [* }7 x2 I6 q$ A===================================================================================================================================
1618986 CONCEPT_HDL    CORE             Information required about the DONT_FORCE_ORIGIN_ONGRID directive
: J3 ]$ d1 C0 e9 V+ ]( {1629696 PSPICE         PROBE            After successfully exporting traces to csv, PSpice crashes on a subsequent attempt to export traces
7 W- @# T$ h: v0 s  {5 k1667213 CAPTURE        NETLIST_ALLEGRO  Tools - Create Netlist stops responding on Windows10
1667599 APD            OTHER            Wire Bond operations taking longer than expected to complete
1667678 MODEL_EDITOR   PARSE            Signal model assignment creates ESpice models that do not pass Model Integrity checks
1670120 ALLEGRO_EDITOR UI_GENERAL       In 17.2, the Static Phase meter shows up in the middle of the screen instead of the lower right corner
' U+ Y3 s! m  F4 w5 l1670927 ALLEGRO_EDITOR DRAFTING         Using zcopy to create a Route Keepin results in database errors
1675359 ALLEGRO_EDITOR ARTWORK          Subclass ETCH/WIRE is added to artwork definition though the visibility of 'ALL Layers' is turned off
0 g+ c4 R8 M& \0 |9 J1675619 ALLEGRO_EDITOR MANUFACT         Differences observed in IPC-D-356A between releases 16.6 and 17.2
1676161 ADW            FLOW_MGR         Opening a project in SPB 17.2 flags the 'Operation load JNI code failed' error
1677405 CONCEPT_HDL    OTHER            When moving a wire with a dot, the dot is not removed directly
) T, X- n. V. G6 ?1678061 PSPICE         SLPS             Simulating an SLPS co-simulation with a Fixed-step solver with a value smaller than 1E-4 results in a crash
1679347 PSPICE         SLPS             SLPS crashes when co-simulating without opening OrCAD Capture or PSpice
1680113 ALLEGRO_EDITOR SHAPE            Irregular void created on dynamic shapes
1680802 ALLEGRO_EDITOR DATABASE         A 16.3 database locked with disabled export of design data should be view only in 16.6
1681129 ALLEGRO_EDITOR DATABASE         Match Groups in the DE-HDL design are not getting transferred to the board file
1681514 ALLEGRO_EDITOR UI_GENERAL       Opening the Dynamic Shapes State report hangs PCB Editor in 17.2 Hotfix 009
8 V& ^! C; x$ @1681727 CAPTURE        NETGROUPS        In 17.2, Capture crashes when closing a design that has assigned Netgroups
1682297 ALLEGRO_EDITOR DATABASE         Derived padstack and associated padshapes not updated when design is upreved for compatibility with the current version
! u+ k5 e# R7 p+ ~+ P! x' D1 |1682447 CONSTRAINT_MGR CONCEPT_HDL      Extraction issue on differential pairs in the given design
2 @- @3 I* t3 ~6 a( j6 o6 f1682454 CONSTRAINT_MGR CONCEPT_HDL      Design with NO_XNET_CONNECTION property on parts is exported to PCB Editor; many other components get the property
+ M5 F6 v* l9 l) f9 e. C1682469 CONSTRAINT_MGR CONCEPT_HDL      Creating a CSet from an existing CSet leads to invalid CSet names in Constraint Manager connected to DE-HDL
& X- t7 l* c) e1 A1683919 ECW            TDO-SHAREPOINT   Site Minder integration for login from TDA not working after SSL certificate update
1684111 ALLEGRO_EDITOR SHAPE            Dynamic Shape not voiding overlapped static shape
' ]/ a7 i, r6 r$ d) L& H1684508 ALLEGRO_EDITOR AUTOVOID         Allegro PCB Editor stops responding when deleting a via
1685540 ALLEGRO_EDITOR OTHER            If text is attached to an object, the object is also printed in the PDF
1685810 ALLEGRO_EDITOR PAD_EDITOR       In 17.2, Padstack Editor does not save adjacent layer information for BOTTOM pads
1685986 ALLEGRO_EDITOR PADS_IN          PADS Translator-generated output shows incorrect unit for the soldermask oversize option
% B# [6 h5 u" o5 b7 ^) [, E# V1686127 ALLEGRO_EDITOR SHAPE            The void of shape missed in artwork.
1686791 ALLEGRO_EDITOR OTHER            Searchable property unavailable on bottom layer pins in the generated PDF

0 Y/ e' d3 N2 I; U4 H% G/ Z
$ Y/ T7 P( ^" W% l/ uFixed CCRs: SPB 17.2 HF010
01-6-2017
$ p) G9 S8 ^* l/ A8 n( I1 ?# h===================================================================================================================================
( s/ {3 q- ~. E( \CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
- H2 `5 J/ L( j' [% J1 C  t* ~) D1524700 F2B            DESIGNVARI       Variant file cannot be loaded
1597787 CONCEPT_HDL    MARKERS          Save As in Marker dialog causes DE-HDL to crash
1599843 CONCEPT_HDL    INTERFACE_DESIGN Moving NG causes extra elements added to it to move
/ O2 ]) F$ H6 }: u" ~" t9 F1620017 F2B            PACKAGERXL       Packager Fails with ERROR(SPCOPK-1053) when $PART_NUMBER property for components has a value
1632977 CONCEPT_HDL    INTERFACE_DESIGN Connectivity error when moving NG members
# `0 o: e& V) S! n9 c% }3 U! n+ X& I, P1635941 ALLEGRO_EDITOR INTERFACES       Shape created by IPC 2581 for negative film is not same as the shape on board
1656357 CONCEPT_HDL    CORE             Pasting a signal name across pages causes the name to overlap with the wire segment
" U* J' Q/ i+ w, O  l' ?3 _1657346 CONCEPT_HDL    PDF              Wire Pattern set to two-dot chain line in a schematic appears as a solid line in the PDF output
0 K: d1 d4 U) m6 o1 W' {/ P1658048 ALLEGRO_EDITOR COLOR            color_lastgroup is not working in SPB 17.2
/ n2 e( U, y- \0 j1658874 CONCEPT_HDL    CORE             'Insert (n) Pages' command does not work when the CONFIRM_WRITE directive is ON
$ Z: \5 i% G! r! [0 V0 Y, ^1659030 RF_PCB         LIBRARY          Offset is not calculated from the center if using negative values for input pins when placing MSOP symbols
1659097 CONCEPT_HDL    CORE             Mouse stroke fails to be enabled on startup with left mouse button (LMB)
1659532 CONCEPT_HDL    CORE             About Import Design command with the CONFIRM_WRITE directive
1659929 CONSTRAINT_MGR UI_FORMS         Using wildcards in filename for Import Constraints does not work in 17.2
' h; B7 ], J& P# x/ C& R5 l0 t1660200 ALLEGRO_EDITOR UI_GENERAL       Move by Sym Pin # edit box is obfuscated
1662821 ALLEGRO_EDITOR OTHER            Cross section chart does not show stack vias in 17.2
1663641 CONCEPT_HDL    COPY_PROJECT     File - Copy Project in Project Manager creates two designs if there are dashes in the design name
1665652 ALLEGRO_EDITOR SHAPE            Critical fillet and shape issues in 17.2
1 C; w) L7 H7 m; d- J/ s" j! t1665918 CONCEPT_HDL    CHECKPLUS        Error (100) Program Internal Error 'Create_flat_node' with checkplus run
- F# x1 w& S9 v1667056 ASI_PI         GUI              Power Feasibility Editor does not list capacitors connected to selected nets/parts
1668137 ALLEGRO_EDITOR SCRIPTS          PCB Editor crashing when running Script Replay
1669651 CONCEPT_HDL    CREFER           CreferHDL values are invisible
2 v5 o, A. U2 w3 y/ Q5 N1669707 CONCEPT_HDL    CORE             Pin numbers not visible on the canvas after replacing a part with the same symbol but a different part property
1670339 ALLEGRO_EDITOR OTHER            Small shapes defined on the mechanical symbol Board Geometry - Outline are not converted to the Cutout subclass.
" s0 l* E' r6 P1670564 ALLEGRO_EDITOR MANUFACT         Exported Gerber file cannot be imported in brd
1 j1 r; A+ o7 ~+ G- ?1670687 ALLEGRO_EDITOR NC               nclegend.log reports missing columns which are present in the NC Legend
( N& @: Q0 d* ]: e' r: O1670811 PSPICE         AA_MC            AA MC Plot settings options
1671428 ALLEGRO_EDITOR UI_FORMS         Display origin checkbox position changes in Step Mapping dialog
1671728 CONCEPT_HDL    CORE             Option requested to reload preferred_projects.txt without re-opening DE-HDL
4 `# S3 L6 r# v1671901 ALLEGRO_EDITOR UI_GENERAL       Toolbar and menus are locked or greyed out
1672477 ALLEGRO_EDITOR DRC_CONSTR       DRC generated by Dynamic fillets
; m5 w! f" L* u1673499 ALLEGRO_EDITOR DATABASE         Drill table title issues of backdrill designs in 17.2
1673681 ALLEGRO_EDITOR UI_GENERAL       F1 for Help not working in PCB Editor 17.2
0 i$ m0 z, d! X4 V1675499 ALLEGRO_EDITOR DATABASE         Running the Gloss command causes PCB Editor to crash...
1676480 ALLEGRO_EDITOR MANUFACT         Creating Variant Assy_Bot Drawing showing Variant Assy Top Drawing
& r" A+ }4 f. B& Q# c/ h! M1677431 ALLEGRO_EDITOR DATABASE         Get ERROR(SPMHA1-141): Invalid sector row. Contact cadence customer support when opening DRA File
* N% b$ \$ v) |2 R& M6 N# V1677651 CONSTRAINT_MGR CONCEPT_HDL      DE-HDL crash on design after successful packaging
1677672 CONCEPT_HDL    CORE             Whitespaces in URL links are not resolved correctly on Linux with Firefox
1680837 ALLEGRO_EDITOR SHAPE            Updating the shape makes the shape disconnect from Thru pins of same net
1681059 ALLEGRO_EDITOR SHAPE            Shape Voiding using DV_SQUARECORNERS environmental variable does not always produce voids with square corners.
; F  k+ @0 s2 b: P1682312 SIG_INTEGRITY  LICENSING        Allegro Sigrity SI/PI Product Choices window is blank after installing 17.2-s009 hotfix
( H1 C. ?: s2 }0 H0 M
: |* P8 \' I( @) _& w
8 ]$ P9 C+ g( ?1 H, ]( j) rFixed CCRs: SPB 17.2 HF009
12-8-2016
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
0 |/ P7 ~5 M  ^. i- @2 l& L1212577 PSPICE         MODELEDITOR      IBIS translation fails without any information in log file
1311687 PSPICE         MODELEDITOR      Timeout error while translating IBIS model
1327174 PSPICE         MODELEDITOR      Log file should list error details during IBIS Translation
# J5 f# z) f& n; I0 }1 a* a1499665 ALLEGRO_EDITOR INTERACTIV       Offset Move depends on move setting.
/ @% q; o7 T5 r1516093 ALLEGRO_EDITOR PADS_IN          Pads library translator does not translate slot orientation
1565795 ALLEGRO_EDITOR UI_GENERAL       Search does not work in the Defined Variables window
/ ?6 N  }: i6 {1 v$ l6 I" C/ B1568817 ALLEGRO_EDITOR UI_GENERAL       Padstack editor not accepting comma as decimal separator with system locale set as LANG ru_RU.UTF-8
1569272 ALLEGRO_EDITOR PLACEMENT        Get the error message 'E- (SPMHDB-394): Placement cannot be completed ... 'after creating Place Replicate circuit
1577379 CONCEPT_HDL    CORE             Packager-XL gives different results when run from DE-HDL and ADW Flow Manager
1578523 ALLEGRO_EDITOR PAD_EDITOR       Library Padstack Browser does not refresh preview
4 I" \) {4 q; k9 B1578533 ALLEGRO_EDITOR PAD_EDITOR       New Padstack Editor does not automatically update the geometry
1581129 CONSTRAINT_MGR UI_FORMS         Unable to dock the Electrical worksheet in Constraint Manager
1582103 ALLEGRO_EDITOR PADS_IN          PADS Library Import creates additional filled shape not present in source data
1591027 ADW            LIBDISTRIBUTION  Library Distribution redistributes previously distributed models
. b0 e2 G' D3 I6 b; i1 Y2 g& l1592026 CIS            VIEW_DATABASE_PA View database part does not work from schematic pages of an externally referenced design
3 X8 w4 d& [' z1593389 CAPTURE        GEN_BOM          Include files in Tools - BOM not working
6 P" N& E/ Z! m0 h1593404 SIP_LAYOUT     EDIT_ETCH        Slide command moves via toward the object
, f; h  I8 h; I1 y1595872 CIS            PART_MANAGER     Capture CIS Part Manager PCB Footprint update case-sensitivity issue
1596955 ALLEGRO_EDITOR EDIT_ETCH        Scribble mode is not working as per expectation.
1600936 ALLEGRO_EDITOR INTERACTIV       Pin DataTips differ between 16.6 and 17.2
4 b4 B9 |8 c( l* Z6 @- j1605961 ALLEGRO_EDITOR COLOR            Wildcards not working in the Filter Nets field of the Color Dialog window
1606392 ALLEGRO_EDITOR PLACEMENT        Filmmask not shown when component is attached to cursor
5 N4 M3 v2 r1 y& p$ B1607016 ADW            TDA              TDO crashes after LRM update during check-in hierarchy
( {) W: U2 @! p6 V1608059 CONCEPT_HDL    CREFER           Removing crefs from top-level design also removes .csb files from lower-level blocks
1608278 CAPTURE        OTHER            Crystal Reports: User is prompted for ODBC password to create a BOM report
1 [: l8 c/ ?! T- G7 z+ G+ J; [1610377 CAPTURE        PROPERTY_EDITOR  Discrepancies between the NET_SPACING_TYPE property (or any other property) text and the actual property
0 v. ]0 c/ [0 D* W# u1610456 ALLEGRO_EDITOR DATABASE         Strip design and selecting user defined subclasses results in database corruption.
/ \8 K7 a1 B- g7 ^' g1612793 CONCEPT_HDL    OTHER            Pattern-based auto-distribution of split symbols not working if there are spaces before commas
& n- U9 S) F+ `5 ^1613442 CONCEPT_HDL    CORE             Signal names are not horizontally centered when the wires are added using different methods
1613559 ASDA           IMPORT_DEHDL_SHE custom variables from the BOM Tables are not getting imported
7 f0 z. Q" {! ^- z6 z* P+ [, i1614093 CONCEPT_HDL    CORE             Import Design window has artificial 64 char limit for path - prevents access to some locations
1614372 CONCEPT_HDL    EDIF300          OFFPAGE symbol is exported as PageBorder in EDIF300 schematic
9 {' W  x7 R0 i1 w- w! e( p8 l1615075 APD            LOGIC            Netlist-In wizard fails to import the net names, but gives a successful completion Info message
% k. Y5 {4 H7 N4 I- G6 q1 u1616131 ALLEGRO_EDITOR PLACEMENT        While placing a module, the Mirror command in the right-click pop-up menu is not working
2 f( `* m( Q4 y. s6 z/ r/ n1617377 ALLEGRO_EDITOR UI_GENERAL       Visibility pane does not retain the correct layer view
- t* ]8 A: i7 A: F5 p6 h1617404 ALLEGRO_EDITOR UI_GENERAL       axlUIMenuChange does not work as expected in 17.2
5 j6 f6 _, w7 Y  z* a- X2 H$ s, r1619412 ALLEGRO_EDITOR INTERACTIV       Script to create new padstacks from existing padstack is putting in wrong values for a regular pad
1621842 ALLEGRO_EDITOR PLACEMENT        mechanical symbol without placebound will not place in QuickPlace
/ j& e- D5 y3 ~  V4 x& o1 J1621874 ASDA           PRINT            Print - Save as PDF uses the default printer options only
6 F4 T: E9 t" R  h/ u/ i, ?1621887 ALLEGRO_EDITOR INTERACTIV       Getting a 'Could not satisfy the snap condition' message when using the Snap pick to option
1622680 ALLEGRO_EDITOR PADS_IN          Import PADS fails with the 'ERROR: *NET* section found. Translation of netlist is not allowed.' message
1623832 ADW            COMPONENT_BROWSE Incorrect part placement on schematic in Design Entry HDL 16.6-S073
1624813 CAPTURE        GENERAL          The Value property is always left aligned when placing a symbol on the schematic
9 [" o- y% w! a  V1624953 ALLEGRO_EDITOR UI_GENERAL       Custom views in 17.2 do not return to original
1625000 ASDA           CANVAS_EDIT      File - Save Project does not provide any indication of saving or progress bar
1625163 CONSTRAINT_MGR OTHER            There is no status for the analyze command in the Constraint Manager in 17.2
6 `# E& F" o! ]# }7 ^1626647 PSPICE         ENVIRONMENT      Capture crashes when loading a design with two hyphens in sim profile name
1628357 CONSTRAINT_MGR OTHER            Constraint Manager shows differences if exporting and importing constraints on the same board.
) J, [# f5 Q/ g# L1628409 ALLEGRO_EDITOR PAD_EDITOR       Pad Stack Editor does not remember last used directory
, `9 t4 p6 j) `1631443 CONCEPT_HDL    ERCDX            ERC reports warning due to lower-case value of some properties in chips.prt
1632195 SCM            OTHER            'No known page border found' error in cref.log
1632365 CONSTRAINT_MGR OTHER            Select command is disabled in the right-click pop-up menu from Constraint Manager in SPB 17.2
1632462 ALLEGRO_EDITOR 3D_CANVAS        3D View (new) and PCB Editor crash when checking collisions
1632590 ALLEGRO_EDITOR 3D_CANVAS        PCB Editor crashes when 3D View is open and more 16.6 boards are opened
1633433 CONSTRAINT_MGR UI_FORMS         Expand - Collapse feature for multiple objects not working correctly
1633454 ADW            TDA              TDO crashes if DAO throws an exception
1633526 PSPICE         AA_PPLOT         Spaces in Simulation Profile cause error in Parametric Plotter
1633608 ALLEGRO_EDITOR COLOR            'Retain objects custom color' should not enabled as default.
1636216 ALLEGRO_EDITOR 3D_CANVAS        Interactive 3D canvas (Unsupported prototype) is not mapping step model when assigned to device
' ]. V$ s* Y* |# U6 H  n0 j1636899 ALLEGRO_EDITOR 3D_CANVAS        The new 3D Viewer is not taking the Package Height set on the PLACE_BOUND layer into account when displaying it.
& Y. y) s3 q5 G1638185 CAPTURE        DATABASE         Opening CIS database locks all part libraries none of which are open
; ]' [1 N% d+ }7 q3 t1639409 ASDA           CANVAS_EDIT      Handling of MAKE_BASE property from DE-HDL designs imported into SDA
1639541 CONSTRAINT_MGR OTHER            PCB Editor 17.2 crashes when making changes in Constraint Manager
$ o7 Z- Z( Z9 M  H1639613 APD            STREAM_IF        The stream out command has created sharp angles in the GDSII output file
( ]4 E3 X' _3 B5 E7 f1640061 ASDA           HIERARCHY        Incorrect message received when invalid characters are specified for subdesign suffix
1641118 F2B            DESIGNVARI       Some DNI parts are not identified in the variant view due to the BLOCK
0 Z. T- P8 K' s; J$ [1641410 ASDA           CONSTRAINT_MANAG No errors or issues reported when incorrect topology is applied to a net or an Xnet
- q, W) Z4 ~9 W* `+ r9 q1642891 CONSTRAINT_MGR CONCEPT_HDL      DE-HDL crashes randomly while working on Constraint Manager
2 g7 y8 k$ ]+ f1643003 CAPTURE        PROJECT_MANAGER  Start page shows latest as S004 after installing S005
1643532 ALLEGRO_EDITOR OTHER            Strip design command fails to delete symbol text in the attached design
1645529 ASDA           CONSTRAINT_MANAG Unable to delete the diff pair from the nets
8 k% n* q. O2 B9 n/ t+ d9 {1645639 CONSTRAINT_MGR CONCEPT_HDL      DE-HDL crashes when the XNET_PINS property value has a trailing comma character
* p$ P! I% C1 B* v3 {; R8 c9 b+ A1646354 CONSTRAINT_MGR CONCEPT_HDL      Cannot select Design Instance/Block Filter from the View menu in Constraint Manager
1646612 PCB_LIBRARIAN  CORE             Generate Symbol option crashes Part Developer
8 g1 g+ Z, X& O; ?' t1646932 ALLEGRO_EDITOR MANUFACT         Manufacture - Auto Rename Refdes keeps defaulting to Use Default Grid even if another is chosen
  B4 s* n0 t& g/ [7 B! J& P( w* o" F1647190 APD            REPORTS          'Sorted by Bond Finger' report shows incorrect wire bond connection
5 t/ |7 ^: L  t' V8 g# @6 y8 d1647673 ASDA           EXPORT_PCB       Two Physical folders are seen after installation of QIR
# i! W" a* k# q) d6 }4 ^& h& C1647729 ALLEGRO_EDITOR SKILL            axlFillet returns t when fillet is not added.
1647779 CONSTRAINT_MGR OTHER            'Software Version' in the cmDiffUtility viewer does not show the correct version
1647843 ALLEGRO_EDITOR ARTWORK          Misleading information in command window when artwork import fails
% |3 F* }; B0 w& r3 O% l: U1648575 CAPTURE        OTHER            Suppress warning setting must be written in capture.ini file
1649060 CONSTRAINT_MGR CONCEPT_HDL      Rename dcfx to dcf process results in error in log file and dcf not updated
1650106 ALLEGRO_EDITOR 3D_CANVAS        3D canvas rotates mirrored components in unmirrored angle
& j. N( n* |( J2 w- q$ C1650238 SIP_LAYOUT     WIREBOND         When performing 'Adjust Min DRC', the reference bond finger should not move.
1650734 APD            SHAPE            Shape on L1 does not flood properly
9 n: ^- k( k- [; v8 z" P1650793 CONSTRAINT_MGR CONCEPT_HDL      Conflict of XNET_PINS definition between the chips and the SIGNAL_MODEL is not handled correctly
1650801 ALLEGRO_EDITOR SCHEM_FTB        Running Export Physical with Update PCB enabled in Project Manager crashes netrev.exe
1651011 ALLEGRO_EDITOR 3D_CANVAS        Interactive 3D viewer shows mechanical symbol mirrored
4 R4 J/ J7 \# U: P1651063 ALLEGRO_EDITOR CROSS_SECTION    Cross-section preview is incorrect
1651066 ALLEGRO_EDITOR DATABASE         Pins not connecting even after running the Tools - Derive Connectivity command
1651700 ALLEGRO_EDITOR SKILL            Running axlXSectionModify() on a layer removes the value of the material
1651925 ALLEGRO_EDITOR ARTWORK          Searching for a macro in the artwork data file: Count for the macro does not match the actual count in the output
1 j  D% i  c: |7 I- a8 {1652230 CONCEPT_HDL    CORE             The master.tag and vlog004u.sir files are not created in the entity directory on saving symbols
# z( u1 ]( N/ S1653080 CONCEPT_HDL    ERCDX            Difference in results from SPB16.6 in 'erc.rpt' when logic_data is renamed as worklib in SPB17.2 on RHEL6.5
1653422 ADW            LIBIMPORT        Classifications not linked to a Part Number or Cell Model are removed during Library Import
  s- g0 e. ~% G2 Z1653526 ALLEGRO_EDITOR DATABASE         Via padstack keepout is not displayed on the canvas when pads suppression is enabled.
( w# j- K! S, [1653951 ALLEGRO_EDITOR CROSS_SECTION    Cross Section Editor changes lost despite selecting No to the 'All changes will be lost ...' message
1656224 ADW            FLOW_MGR         Copy Project wizard no longer allows dashes in the 'Name of new project folder' field
1656581 ALLEGRO_EDITOR OTHER            PDF generated for layer with shape shows undesired voids if film is mirrored and Filled Shape is not selected
! E- s) a) t5 s1 J& s3 Y- ?3 s! X1656608 APD            REPORTS          Incorrect calculation in the metal usage report
! z' P5 i8 Z4 @  v" {1656726 CONCEPT_HDL    CORE             Interface command always disabled in the Wire menu
1656841 CONSTRAINT_MGR UI_FORMS         Incorrect layer information is displayed in the Edit Via List dialog when a filter is applied
) u8 j$ f6 F5 |& ~# r' ]- L1657220 ALLEGRO_EDITOR SKILL            axlXSectionGet() returns Primary list of layers and not All stackups
1657257 SIP_LAYOUT     EXTRACT          When using extracta, custom layer names not getting retained
% K; g3 L, V* d7 n. ^, ^: D# }  p1658440 ALLEGRO_EDITOR PAD_EDITOR       The location of a drill in the .pad file is different from the .dra file
1658445 CONSTRAINT_MGR CONCEPT_HDL      When DCF file is converted to ASCII, no further updates are allowed.
1659473 SIP_LAYOUT     WIREBOND         When moving wirebonds they are jumping instead of sliding
$ `* f. A5 C  O+ S1659498 ALLEGRO_EDITOR INTERACTIV       Unable to turn off line on Etch Wire for Jumpers
+ `! Q" D' O1 y! C. y2 I1659644 CONCEPT_HDL    OTHER            Predefined nets are not listed if 16.6 design is being opened in 17.2
4 N  z8 k) V. o* U$ r8 M1660475 CONSTRAINT_MGR UI_FORMS         The CTRL+V shortcut is not working in the Export Constraints window in Constraint Manager 17.2
1660492 ALLEGRO_EDITOR UI_GENERAL       PCB Editor crashes when using multiple desktops on Windows 10
( R; l) C- |  i$ b5 k# h1661133 CONSTRAINT_MGR ANALYSIS         PCB Editor crashes if comma is used in the Value field for Analysis Mode
& k  I5 W3 u4 m# m7 l' S. x! }1661307 CONSTRAINT_MGR CONCEPT_HDL      Prevent creation of diff pairs on VOLTAGE nets
1661357 ALLEGRO_EDITOR EDIT_ETCH        PCB Editor crashes when using Route - Connect
1661874 ASDA           DESIGN_CORRUPTIO Unable to delete the ZERO part from the schematic page
1662799 ADW            SRM              Mechanical symbols are not being displayed in the Mechanical tab of Symbol Rollback Manager
+ _/ g0 ?! z- |: A, A1664797 SIG_INTEGRITY  GUI              Unnecessary coupled interconnect models were generated during View Waveform.
1664858 ALLEGRO_EDITOR EDIT_ETCH        PCB Editor crashes during Auto Interactive trunk route.
1664911 ALLEGRO_EDITOR OTHER            PCB Editor freezes after DRC Update is performed
1666329 CONSTRAINT_MGR OTHER            SCM Import Physical process crashes cmfeedback
1666551 ALLEGRO_EDITOR ARTWORK          Import Artwork, Mirror option separates imported artwork to different XY locations
1666723 ECW            TDO-SHAREPOINT   TDO login is not working with Site Minder because of incorrect characters in the Site Minder login form HTML
. |/ ^0 N. D$ u" o7 T7 R1 q3 X! Q& i1667068 ALLEGRO_EDITOR SHAPE            Update shape removing the shape voiding
1669828 F2B            DESIGNVARI       Variant Editor crashes on Windows 10 T540 P laptops but works fine on Windows 10 desktops
1670221 ALLEGRO_EDITOR DATABASE         Non-recoverable corruption error is reported when saving the board after adding a layer
1672134 ALLEGRO_EDITOR ZONES            TDP needs FIXED component override
' f# L& D1 d( T" g* \% }

Fixed CCRs: SPB 17.2 HF008
10-29-2016
+ n: e* S* }5 g3 S9 O$ e5 D===================================================================================================================================
: k( h% A; I8 |: V) FCCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
) R- @# a+ Z# k* l* c. u( x1644406 ALLEGRO_EDITOR SHAPE            Alternate symbol placement results in illegal parent identifier error
1647098 SIP_LAYOUT     OTHER            SiP crashes on symbol copy and rotate
3 \* j1 ]# V) i, b1647154 APD            OTHER            Disconnected Clines not working
2 l  i. f/ H- T! _4 [) o1648817 GRE            IFP_INTERACTIVE  Allegro PCB Editor stops responding on adding netgroups to a nested netgroup
1649829 CONCEPT_HDL    CORE              A delay is observed before the sub menus of the File and Tools menus appear
1652930 ALLEGRO_EDITOR OTHER            Command-line version of switchversion not working
1653109 ASDA           DESIGN_CORRUPTIO SDA not pulling latest library information for part
, X4 ]" P  p3 r3 [1655377 FLOWS          PROJMGR          Project Manager crashes on Windows 10
9 P- `: l' r' C

Fixed CCRs: SPB 17.2 HF007
/ W' d* m3 e$ h" @+ R! ?10-20-2016
===================================================================================================================================
& N/ N- X# m  GCCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
$ x0 |6 H$ G- J( c5 S2 j7 R1582276 CONCEPT_HDL    CORE             Need the ability to delete an image placed on the DE-HDL canvas
1594101 CONCEPT_HDL    CORE             No error or warning issued on specifying an incorrect unit for voltage
1611293 ALLEGRO_EDITOR UI_GENERAL       If the Command window is floating, it cuts off text from the bottom half of the last line.
1611652 ALLEGRO_EDITOR UI_GENERAL       New artwork film not appearing in the drop-down list for Visibility Tab
1618205 ALLEGRO_EDITOR UI_GENERAL       New Artwork film added is not updated in Visibility - View
* M3 r8 F* ~3 R9 D8 z% c1631114 CONSTRAINT_MGR OTHER            SKILL functions axlCnsPurgeAll and axlCNSDelete delete spacing constraint sets but not deleting names
% Z3 d0 r6 H; e6 z9 K1633726 ALLEGRO_EDITOR UI_GENERAL       Visibility tab not dynamically updating the view list when artwork film changes
' z! B+ H) {3 e9 D. q! Z; j1636404 CONSTRAINT_MGR CONCEPT_HDL      In 17.2 QIR1, DE-HDL Constraint Manager allows users to enter invalid voltage units
' R, D* F, [/ T) y1636864 ALLEGRO_EDITOR UI_GENERAL       Domain Selection for Visibility does not work with Hotfix 004 unless you save and reopen the board file
1638251 ALLEGRO_EDITOR DATABASE         Unplated hole changed to plated hole after uprev from 16.6 to 17.2 version
1639483 ALLEGRO_EDITOR EDIT_ETCH        Manually routing discrete components with incorrect constraints causes PCB Editor to crash
; s% d: N, h4 B+ b0 z1641435 SIP_LAYOUT     IMPORT_DATA      Need SiP Stream mapping layer count to match Virtuoso stream layer mapping count
3 \4 B, l, k# a9 ~8 m6 H0 u1641483 SIP_LAYOUT     WIREBOND         SiP Layout - Modify the wirebond report generation for Start and End height when using a DISCRETE class footprint
1644131 F2B            PACKAGERXL       Option needed to package a DE-HDL design with ptf errors into a board file
1644807 CONSTRAINT_MGR ANALYSIS         Unable to set electrical constraints modes with the OrCAD PCB Designer Professional licenses
1646228 ALLEGRO_EDITOR UI_GENERAL       Running the axlUIMenuInsert command to add a submenu after running the axlUIMenuFind command crashes the tool
1647402 PSPICE         PROBE            Unable to print on Windows 10 as no plots are displayed in the Probe window
; H7 T- `: A1 F6 s; N1648183 ALLEGRO_EDITOR INTERFACES       Allegro STEP Export: Using the 'step_3D_copper' variable, pads not exported in the same plane as traces and shapes
1649222 APD            ASSY_RULE_CHECK  Allegro Package Designer stops responding on running the Acute Angle Metal DRC
" U) u2 h/ U$ ?" M
! k9 e6 b, R) t4 Y! w* R4 Q
/ b( r5 X, {) r* uFixed CCRs: SPB 17.2 HF006
10-7-2016
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
% U. I0 P0 d; g( \) T7 s===================================================================================================================================
: B1 s3 J% a" |7 `5 N# W3 R1585203 ADW            DBEDITOR         Optimize check-in of footprints with multiple padstacks
1607954 ALLEGRO_EDITOR SHAPE            Dynamic Shape not updating correctly
1618173 ADW            SRM              SRM does not automatically run when a .brd file is opened from EDM Flow Manager in 17.2 Hotfix 003
1618832 ADW            SRM              SRM marks parts as updated even when they are not updated
! ]- i& w: a: G) [1 p5 Z1623823 SIP_LAYOUT     WIREBOND         NO_WIREBOND property is ignored by Add/Edit Non-Standard
5 M$ \6 K  z  U- Q0 t. |1626001 ALLEGRO_EDITOR SHAPE            Shape to route keepout DRCs reported for dynamic shapes in the attached design
( X- f) v  A  H) \, t1626546 SIG_INTEGRITY  FIELD_SOLVERS    Extra RL elements in via spice circuit model generated by Via Model Generator
% ]8 m) e5 ^% S% B3 w# Q1631792 SCM            OTHER            The NC net has re-attached itself to another net, RIGHT_LEFT_N, in the design
% E5 L' Q6 |* N4 u, V1 w' ~1632223 ADW            LRM              Checking in a hierarchy causes a crash
$ W% U0 `& I) ~. }" O! x7 K7 }1632844 F2B            DESIGNVARI       Part is simultaneously defined as Pref and DNI in Variant Editor with no error
1 w( [# p5 D: }7 ~( S) K1 \1633647 ALLEGRO_EDITOR MANUFACT         Variant issue: Create Assembly Drawing command not creating filled shapes for keying pegs in attached design
1633707 ALLEGRO_EDITOR DATABASE         Cannot remove Route_Keepout associated with a pin
1634392 PCB_LIBRARIAN  OTHER            Launching Library Explorer without -proj option crashes the tool
" E, z' B, w- E' t" ]5 s$ k1635049 CONSTRAINT_MGR CONCEPT_HDL      DE-HDL crashes when trying to create layer set from Constraint Manager
1635593 ORBITIO        ALLEGRO_SIP_IF   Importing  .sip file reports undefined argument error while processing shapes
1635858 ALLEGRO_EDITOR ARTWORK          Get 'WARNING: Null REGULAR-PAD specified for padstack' messages in log file when generating artwork for all layers
1636097 ALLEGRO_EDITOR ZONES            Technology Dependent Packaging footprints not updating in the design
1636185 ALLEGRO_EDITOR ZONES            Import Placement not placing TDP footprints in zone
" J) [0 g5 S6 }8 I+ W; M1636867 CONSTRAINT_MGR OTHER            Millimeters shown as mils in the Analysis Modes dialog box
/ C% l9 W7 ~- Z3 G0 i' y7 A1638094 SIP_LAYOUT     OTHER            Cross Section Editor not seeing updated information
1639845 ALLEGRO_EDITOR INTERFACES       Step file not generated when board is exported to a folder with special characters in name
8 X% M. W! t/ `4 U$ R, ~1640611 APD            SKILL            Launching XtractIM from SiP Layout with the attached design crashes both SiP Layout and XtractIM
1641339 ALLEGRO_EDITOR INTERFACES       DXF_IN does not show all the subclasses available in the design
* m) z) v7 O# j/ T1641879 XTRACTIM       GUI              XtractIM crashes on extracting a SiP design if 'SI Ignore' is selected for a die stack layer in Cross Section Editor
% P2 X# q9 {+ B2 X# K8 @. H8 D* T) d1642012 CONCEPT_HDL    CONSTRAINT_MGR   Schematic-defined net groups without any members cannot be deleted in Constraint Manager
4 i3 G" C* w% A: G; s+ C1642015 CONCEPT_HDL    CORE             Pin exists on block but no corresponding port exists in the underlying schematic
- G. ^( g' U) y) \# u& R1642597 ALLEGRO_EDITOR OTHER            Importing .tdp file: Footprints not included in the .tdp file are updated in the design
4 |# X' G$ R; \- J+ I1643557 SIP_LAYOUT     DIE_GENERATOR    Die Text files will not update the design
1646086 ASDA           IMPORT_BLOCK     Importing a DE-HDL design into SDA results in error 'IMPSHT-42 Alias cannot be created'
1647580 ASDA           IMPORT_PCB       SDA-File Import from PCB Editor has duplicated RefDes on schematic.
) X1 i, @2 J! U( `" k- P

Fixed CCRs: SPB 17.2 HF005
09-10-2016
# A8 H! }0 l+ z$ b- l! G===================================================================================================================================
% Z" h0 y1 v1 t* |4 l+ `) DCCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
- U2 g& d. t, X  w1496199 ALLEGRO_EDITOR SHAPE            Overlapping route keepouts result in a broken shape
2 m3 n. S  s& j2 @1519972 ALLEGRO_EDITOR DRC_CONSTR       Dynamic phase DRC at incorrect location
1521940 ALLEGRO_EDITOR DRC_CONSTR       PCB Editor not recognizing the correct pin pairs of the differential pair
1536713 ALLEGRO_EDITOR INTERFACES       File - Viewlog still checks for brd2odb.log file
$ E/ t3 J* Y) K7 h1568912 RF_PCB         BE_IFF_IMPORT    Route keepouts can only be imported once
" v3 V8 O: P  y5 v! j# X  `1586846 RF_PCB         PLACEMENT        Get an error while manually placing RFCOMPIB part
1588769 ALLEGRO_EDITOR UI_GENERAL       ALT+key shortcuts are not available in 17.2
1589396 ALLEGRO_EDITOR UI_GENERAL       Need option in 17.2 to change the placement of the Find, Visibility, and Options tabs
: ^# k* m* Z, l1593258 ALLEGRO_EDITOR OTHER            Adding German letters to database diary deletes all the entries
  G: y# d6 m. t1597413 SIG_EXPLORER   SIMULATION       SigXplorer crashes when simulating with a via that was added to the canvas
1599680 ALLEGRO_MFG_OP ALLEGRO_INTEG    Documentation Editor crashes on opening a specific database
: p# z5 w3 Y) \1606682 ECW            ADMINISTRATION   ECWBackup and ECWRestore fail when data is 1GB or more
1607250 ALLEGRO_EDITOR DATABASE         A board file created in release 16.5 crashes when opened in 16.6 Hotfix 69
! [0 d' \4 U# W/ K$ D! A/ X1607565 ALLEGRO_EDITOR SYMBOL           Default values are not consistently converted when adding pins after changing units.
1607956 ALLEGRO_EDITOR OTHER            Unable to generate the model index file from the command line using mkdeviceindex
! Y7 ?6 p2 r: n, @+ y1609794 ALLEGRO_EDITOR UI_GENERAL       PCB Editor: Shortcut keys to menus are not available in 17.2
& r  G$ f0 |% p( y1609817 CONSTRAINT_MGR CONCEPT_HDL      DE-HDL crashes on opening project
% M; `4 P: W* l, h8 i+ ?" w; Y' b+ C1611446 ALLEGRO_EDITOR SHAPE            Inconsistent break in shape when creating voids in a design in  16.6 Hotfix 69
3 H' x, ]" R- |$ c* e1613512 ORBITIO        ALLEGRO_SIP_IF   Unable to read the OrbitIO database file (.oio) in SiP Layout
7 b7 u2 r, i& S1619610 ORBITIO        ALLEGRO_SIP_IF   Some mechanical pins appear rotated by 90 degrees when imported
& i. l1 n3 s3 a( L4 M  O8 t1620814 ALLEGRO_EDITOR PARTITION        Etch and Via are not imported with the partition
1621390 GRE            CORE             Design Crashes during the Spatial Planning phase
1623112 ALLEGRO_EDITOR OTHER            SPB17.2 switch release is unable to identify 16.6 release when 16.6 is installed in All-Users mode
# d" ]* R2 v8 H! W" m; b1623113 ASI_SI         GUI              Aggressor waveforms are not displayed in waveform viewer after crosstalk simulation
4 T) C! m8 F( M0 S4 y+ H! g1623231 CONCEPT_HDL    CORE             Unable to make the Attributes form part of the standard display in DE-HDL
1623666 APD            OTHER            Incorrect vector pin syntax appears in the chips file written using 'RF Module - Export chips & connectivity'
4 C/ p( E; O/ @$ v- n1623888 CONSTRAINT_MGR CONCEPT_HDL      Ambiguous and inaccurate mapping errors reported when an ECSet is applied to a differential pair object
1623904 ALLEGRO_EDITOR SCHEM_FTB        Logic import fails, but no error mentioned in the netrev.lst file
! e( L9 J- u# r2 w( z! U9 m1623935 ALLEGRO_EDITOR SKILL            On running the SKILL function, axlSectionModify, Shield and Etch Factor are not updated
& D9 {- E4 b0 o" f/ X3 g1625610 ALLEGRO_EDITOR SHAPE            Modifying a shape boundary leads to other shapes losing their voids
: k  o- y! c8 f1 m/ w) y1 B1626716 ALLEGRO_EDITOR UI_FORMS         Z-Copy menu is not available with OrCAD PCB designer Professional license
+ d4 E6 i  d( I  H  ~1628403 ADW            TDO-SHAREPOINT   Objects remain checked out after multiple failed 'check-in hierarchy' attempts
1630458 ORBITIO        ALLEGRO_SIP_IF   Import OrbitIO Database file (.oio) in SiP: Bill of Materials report does not include standard dies
1632504 CONCEPT_HDL    CORE             DE-HDL core dumps during Save Hierarchy on Linux
1633581 ALLEGRO_EDITOR PLACEMENT        On mirroring a part, the cursor moves to the origin of the board
1633601 ALLEGRO_EDITOR PLACEMENT        Place - Via Arrays - Boundary command: Via arrangement pattern deteriorated in Hotfix 004
/ E1 @) T: g. y9 f2 `
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Fixed CCRs: SPB 17.2 HF004
08-14-2016
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
7 e4 ]1 i. K1 l3 R6 }; ^===================================================================================================================================
2 G/ [3 O+ a' ~908816  CAPTURE        SCHEMATIC_EDITOR Few graphical operations are active even when a page has been locked
5 l4 X5 h' O/ D; v& g! S% ?2 m1213923 ADW            LIBIMPORT        Cannot delete parts in the Library Import project (XML)
5 Y3 H+ `  g1 Z; s5 O: B1250476 PCB_LIBRARIAN  LIBUTIL          con2con does not check for PACK_TYPE value set to question mark
1306441 APD            OTHER            The Minimum Shape Area option in Layer Compare uses an unspecified value
6 _7 Z- e6 ?, b+ }5 ]5 H1322242 ALLEGRO_EDITOR INTERFACE_DESIGN Using Add Connect with the Replace Etch option causes PCB Editor to slow down for certain constraint nets
- z. X) B7 m3 P- z9 F' ]1326716 ADW            DOCUMENTATION    Dataexchange documentation correction needed
1356948 APD            DEGASSING        When using the Degassing tool on shapes the size of the file becomes very large
0 X" @8 L1 \( ~1376510 ADW            DBEDITOR         DX output ERROR after Property Display Ordering of Part Classification.
" q4 G% L1 }* t& c6 x1408218 ALLEGRO_EDITOR MANUFACT         Specifying the Offset value results in unexpected value of the NC Route coordinates in the .rou file
1410485 CAPTURE        SCHEMATIC_EDITOR The 'Autowire - Connect to Bus' menu command and the 'W' keyboard shortcut are enabled on a locked design
) o( K) G# g8 o) t9 F+ z1413248 CONCEPT_HDL    CORE             Import from another TDO project makes the block read-only
1413287 ADW            LIBIMPORT        Library Import converts all Attributes to uppercase when reading CSV
3 O# O! C+ }/ ~# q/ ~  ^1417429 ALLEGRO_EDITOR INTERACTIV       Pick box only accepts 1 set of values. You need to close the box and reopen it to draw a rectangle
4 C$ z9 d* f( k/ ~1417442 ALLEGRO_EDITOR INTERACTIV       Spin via stack and only part of the stack spins
1430251 ALLEGRO_EDITOR PLACEMENT        Quickplace placing symbols outside of a polygon shaped room
1440509 ALLEGRO_EDITOR PLOTTING         Ratsnest does not follow the RefDes position when plotting the BOTTOM layer with the Mirror option
: u. n) ^* E5 y  {4 O1441086 PCB_LIBRARIAN  OTHER            Changes made to a package with sizable pins generated from the 'sym1' view are not saved
1443339 PCB_LIBRARIAN  PTF_EDITOR       ALT_SYMBOLS syntax in PTF file not checked
( ^1 \5 ~- W& a6 H  ]& b' P2 S1444144 ALLEGRO_EDITOR DRC_CONSTR       The 'add taper' command generates line to line spacing DRC
4 x. @: U. F( T2 H1451766 CONCEPT_HDL    COMP_BROWSER     License error message should indicate which license is required
- G$ T# t  F( H6 l7 N* Y( |1451977 CONCEPT_HDL    PDF              Origin of PDF mediabox not starting at (0,0) when PDF page_height and page_width are set
1457138 CONCEPT_HDL    CONSTRAINT_MGR   devices.dml: difference in content generated by _automodel add command and Constraint Manager launch
1458439 F2B            PACKAGERXL       The Packager pstprop.dat file reports false conflicts in net properties
% l7 S* W) s" L1464865 CONSTRAINT_MGR ANALYSIS         For identical nets, topology in DE-HDL CM is different from the topology in PCB Editor CM
+ o3 A" G6 k; @* X. m; Q1464948 PCB_LIBRARIAN  VERIFICATION     The errors/warnings do not match between the various tools
1467826 CONCEPT_HDL    PDF              PublishPDF from console window creates a long PDF filename
1470106 ALLEGRO_EDITOR MANUFACT         silkscreen program cuts auto-silkscreen lines excessively
1471287 CONCEPT_HDL    CONSTRAINT_MGR   Pages imported from other designs with different units should inherit the source constraint units
0 G, G$ @% w7 X" `3 d1472046 ALLEGRO_EDITOR OTHER            Gloss routine, 'Via Eliminate' - 'Eliminate Unused Stacked Vias' is not removing unused microvias from the stack
7 I$ l$ K  s" `3 k. o1472414 ALLEGRO_EDITOR SCHEM_FTB        netrev changes pin-shape spacing rule in constraint region
+ Z( M& b, i/ P" M4 [1472444 ADW            ADWSERVER        Multiple errors in adwserver.out after SPB054/ADW47
5 S4 j, t' p: p' p1 r1473056 ALLEGRO_EDITOR ARTWORK          Gerber export has additional phantom data not on design
1473900 CONCEPT_HDL    CORE             DE-HDL stops responding when a hierarchical block with variants defined inside the reuse block is enabled
1474020 ADW            DBEDITOR         Unable to modify schematic classification when a part is checked out previously by another librarian
8 A7 x9 b1 q$ T3 S; t1474066 ADW            DBEDITOR         Bulk edit performance lags when parts included have a large number of properties
1474764 ALLEGRO_EDITOR PLACEMENT        In Hotfix 56, the 'place replicate create' command does not produce desired results if a fanout is marked
1474894 ALLEGRO_EDITOR PLACEMENT        Place replicate fails to include vias when the module is applied to other circuits.
1475650 ALLEGRO_EDITOR OTHER            Using Outlines - Room Outline gives WARNING (axlRemoveNet): No match for subclass name - 'BOARD GEOMETRY/__EPB_SCRATCH_'
1476528 ORBITIO        ALLEGRO_SIP_IF   While translating a .mcm to OrbitIO, the error 'allegro2orbit.exe has stopped working' is thrown
1476920 CONCEPT_HDL    OTHER            Genview consistently fails in some indeterminant manner.
, B; K. b5 a1 F; L! c1 F1477369 CONCEPT_HDL    INTERFACE_DESIGN A significant number of problems are reported when running genview with port groups
" O9 b% d4 [% x8 ]- O4 ?1478111 F2B            DESIGNVARI       Hierarchical block variant not shown in testcase with S57 although it was working with 2015 release
1478200 GRE            IFP_INTERACTIVE  PCB Editor displays the 'Low on Available Memory' error when updating shapes and then crashes
5 }6 ?3 g- w9 U$ F6 a, x% A; T1478680 CONCEPT_HDL    CORE             Unable to move components in a schematic using the arrow keys
1479135 F2B            PACKAGERXL       Hierarchical design reports conflicts when signal names change through the hierarchy
  `2 s9 i& M" U" F1479153 CONCEPT_HDL    CORE             File - Save Hierarchy flags an error and does not update subdesign xcon
1479227 CONCEPT_HDL    CHECKPLUS        Custom DE-HDL Rules Checker rule flagging invalid voltage in hierarchy
5 R; u9 V# [$ L6 `# Z# k3 S1479454 CONCEPT_HDL    OTHER            DE-HDL issue: locked DIFF_PAIR property is editable
1479569 PCB_LIBRARIAN  OTHER            hlibftb fails with error SPCOPK-1053
6 w* n7 n3 b& ^0 Z- t3 ?$ l1479785 ORBITIO        ALLEGRO_SIP_IF   BRD file is not loaded in OrbitIO
1480005 ADW            DBEDITOR         The DBEditor or DBAdmin GUIs do not allow the same characters in Property as LibImport CSV Files
: B' P2 s( |: D* |, J7 W- I0 w& c1480367 SIG_INTEGRITY  OTHER            Differential pair extraction SKILL error
+ q$ J0 W2 S- @# Y" v" q1480499 ALLEGRO_EDITOR PARTITION        Cannot delete partition
1482544 ADW            DBADMIN          Hierarchical Preferred Parts List (PPL) is not functioning correctly
& W- @; |  `, A: `2 Y3 q4 [1483136 ADW            COMPONENT_BROWSE Error flagged when searching a property value with parenthesis or comma in Component Browser in the ADW mode
& D8 F' R* [4 |3 K1483617 ALLEGRO_EDITOR DATABASE         Delete islands command crashes database with filled rectangles
1484100 SIP_LAYOUT     INTERACTIVE      SiP crashes when copying and rotating a symbol
1484781 CONCEPT_HDL    CORE             Three different Hierarchical Viewer issues
* S# G7 i2 m8 I) C9 F  R" ]# i( w, w1485059 PCB_LIBRARIAN  CORE             Part Developer pin attributes are randomly marked as read-only
3 t) }; p5 U' {: L1485931 ALLEGRO_EDITOR INTERFACES       Errors generated when importing IDF in an existing board file
1485960 CONCEPT_HDL    CHECKPLUS        Custom DE-HDL Rules Checker rule is crashing the project
1486086 ALLEGRO_EDITOR ARTWORK          Cannot generate artwork.
* ^0 u7 w+ O5 l- b3 o1486378 ALLEGRO_EDITOR PARTITION        Unable to delete orphan partition as it is not listed in workflow manager.
9 N( s8 b0 Q8 d( B+ b% L* ^1487085 CONCEPT_HDL    CONSTRAINT_MGR   Import Physical with the Constraints only option reports problems
1487125 ADW            COMPONENT_BROWSE Results not displayed in Component Browser for parts with no associated manufacturer parts
. N8 K: t5 [& i9 H7 x0 H1487265 CONCEPT_HDL    CORE             Replace command in Windows mode shows incorrect behavior
1487496 ADW            DATAEXCHANGE     DX changes checkout ownership when override action is set to remove existing relationships
3 x5 f* G* K' h7 K, u1487656 ADW            LIBIMPORT        Pre-analyzing a project reports false warnings
% p# U4 f# I4 G) x# ^5 V1487733 CONSTRAINT_MGR OTHER            Export Physical takes more than two hours to update PCB Editor board
1488753 CONCEPT_HDL    CORE             Import sheets in a design with no change in models: CM_VALIDATION_ON_SAVE variable is triggered
1488758 CONCEPT_HDL    CONSTRAINT_MGR   Disable Constraint Manager launch if CM_VALIDATION_ON_SAVE is set and the database goes out of sync
1 f7 v4 z8 h/ x. j+ `2 Q1 ]1490299 SCM            OTHER            Allegro System Architect does not update revision properly
1490744 ALLEGRO_EDITOR SKILL            axlChangeLine2Cline changes line to cline and places it on the TOP layer
' ^8 Q' J1 t1 ?& u/ X7 R/ O1490924 F2B            PACKAGERXL       Save Design/Export Physical is resetting Via constraints
1491351 ALLEGRO_EDITOR OTHER            Create Detail for bond fingers on a custom layer not working
4 T8 N% v6 C% S0 K# A0 N  R' f0 R3 p1492013 CONCEPT_HDL    CORE             Stale PNN properties not cleared from schematic on packaging design (backannotation)
6 j7 @6 N% f& k2 a. T1 E2 Y1492595 ALLEGRO_EDITOR MANUFACT         Dimension character substitution help is wrong
1492703 CONCEPT_HDL    OTHER            'Global Property Display' not working for symbol edit
" h% [% c, q8 @5 a" b' }8 e* @3 L1492777 ORBITIO        ALLEGRO_SIP_IF   OrbitIO crashes on importing MCM
6 x3 _% k* |6 u$ B5 ^1492901 CONCEPT_HDL    CORE             Cannot instantiate a multi-sections symbol (> 10 versions) in Design Entry HDL
3 [3 q, I; z0 @4 w7 \8 @7 V1494194 CONCEPT_HDL    CORE             Random display of the 'PHYS_NET_NAME' property in hierarchical designs
. t1 F# j* O4 D* ~" n# o1497597 ALLEGRO_EDITOR DATABASE         Show Element on pin shows wrong drill size
1497956 CONCEPT_HDL    CORE             ADW Library Flow test schematic generation crashes DE-HDL while saving the design when using customer adw_conf_root
+ U8 g6 L5 b* s5 l1498234 ALLEGRO_EDITOR ARTWORK          PCB Editor fails to create artwork and no error is listed in the log file
1499363 CONCEPT_HDL    CORE             Custom attributes under variant management stopped working in Hotfix60
1500422 ALLEGRO_EDITOR SKILL            SKILL function, axlTriggerSet, results in PCB Editor crashing at launch
1500725 CONSTRAINT_MGR CONCEPT_HDL      Unable to clear pstprop.dat file conflicts
1501093 SIP_LAYOUT     OTHER            Package design variant shows wirebonds connected to a die which is not part of the variant
1501165 F2B            DESIGNVARI       TDO does not manage overlay files and variant_roz1040660_1.ba cannot be created unless variant_merged.dat is checked out
1501294 ADW            COMPONENT_BROWSE Some tabs missing after the migration to ADW ISR 053 with SPB ISR 060
2 }! {5 ?; U. u) j0 w3 j1501974 F2B            PACKAGERXL       'Feedback has found Illegal pin swap(s)' error although the pin was already swapped and fed back (B2F) to DE-HDL
# \/ \( q: W" k0 x# i' v  u! j1502282 ADW            CONF             Configuration Manager: Clicking 'Set up or Manage Company & Site' gives an unclear message
1 C9 ?7 r. ^. c: h- N0 t0 y' @5 b1502782 ALLEGRO_EDITOR SCHEM_FTB        Allegro System Architect (SCM) - Export Physical stops unexpectedly without any errors or warnings
1504093 ASI_SI         GUI              View Topology and Waveform buttons overlap when Signal Analysis window is resized
- g/ F- B: x6 P9 d) J$ k, u8 u1504767 CONSTRAINT_MGR SCHEM_FTB        Constraint Manager generates errors if the 'sNoF2BFlow' property is added to the Constraint Manager Dictionary
; J. G+ f2 ~: w/ W$ y1506110 ALLEGRO_EDITOR DRC_CONSTR       No DRC shown when a text on etch layer is overlapped on mechanical pin
1506654 CONCEPT_HDL    INTERFACE_DESIGN On moving, Netgroups break
8 k/ H$ Q6 s  U. p7 n, l! w1507497 ADW            COMPONENT_BROWSE Switching rows in Component Browser does not change the graphics of the symbol
1509184 ALLEGRO_EDITOR DATABASE         BB vias in mirror have terminal pads suppressed by artwork
1510387 FSP            EXTERNAL_PORTS   Break in extending a net as a deep connection when it is targeted to multiple FPGAs connected in a daisy chain
1510570 ADW            DATABASE         ERROR: Cannot check in block model because the part with instance id used in the model is not available in the database
! C; K6 ~3 w2 o5 }! P& ?( Y1 ~% B1511180 ADW            DBEDITOR         Database Editor: Incorrect message about a schematic mode displays when associating a footprint to a part number
1511397 SIP_LAYOUT     TECHFILE         Tech file exported from release 16.5 cannot be reused in SiP Layout in 16.5 or 16.6
1511744 ALLEGRO_EDITOR OTHER            Allegro PCB Editor removes property from component instance
1511761 SIG_INTEGRITY  OTHER            Allegro PCB Editor crashes on running the cns_show command.
. d# p5 g4 j3 p. B; C1511947 ADW            DSN_MIGRATION    Command line arguments of the 'designmigration' command are not working
1513085 CONCEPT_HDL    CORE             NC symbols in the schematic are being renamed to NC_1 in pstxnet.dat and are routed as one net in Allegro PCB Editor
1513092 ADW            DBEDITOR         Create Footprint Model name is not working properly if it already exists in the local flatlib
1513737 ADW            CONF             DesignerServer from a different network domain does not show distribution data
1514469 CONCEPT_HDL    CORE             Unable to get rid of an underscore from the PHYS_NET_NAME property
1514942 SIP_LAYOUT     CROSS_SECTION    AIR no longer permitted in stackup in 17.0
. C$ }0 f1 i9 C$ J* ]) A8 U2 g1515318 PCB_LIBRARIAN  IMPORT_EXPORT    Import Pin Table: 'CTRL + C' and 'CTRL + V' not working correctly
9 V$ Z" A* ^3 \/ \+ n; S1517351 CONCEPT_HDL    CORE             Genview does not update an existing split symbol
4 t. O- H# m! K- o  \5 ], ], E( q1517388 ALLEGRO_EDITOR SHAPE            DRC error reported as PCB Editor fails to read the void for a via
1518032 CONCEPT_HDL    SECTION          Error SPCOCN-2009 displayed even when the user has not manually sectioned the design
1518724 PCB_LIBRARIAN  PTF_EDITOR       PTF Editor is not saving changes
# [2 V+ p0 {  z  Y5 g1519040 ALLEGRO_EDITOR DATABASE         Match groups are lost when a board created in SCM is saved in Allegro PCB Designer.
1519518 CONCEPT_HDL    OTHER            Genview does not generate split symbols
. x7 D9 s7 s9 A1519623 CONCEPT_HDL    CORE             Differential pair added to a NetClass does not display 'NET_PHYSICAL_TYPE' on the canvas
5 _7 n# p) b: m! C1519910 CONCEPT_HDL    INTERFACE_DESIGN Hotfix 62: Information on manually-remapped port groups is not saved, but reset to default
; r  G! L9 n, f. s% V: |1519946 CONCEPT_HDL    CORE             Renaming a net leads to loss of constraints associated with the net
2 Y1 B: V( x1 w& s1519987 ALLEGRO_EDITOR SCHEM_FTB        In Hotfix 61, constraints are lost on importing a netlist
% e/ m: H, C. b- R5 R1520207 CONCEPT_HDL    CORE             Genview crashes after renaming ports
7 g5 W" }+ B" u) a  l1520727 CONCEPT_HDL    CORE             In Project Manager, the 'Design Sync - Export Physical' command does not automatically update the schematic
, q3 d4 _2 T- I1521174 SIP_LAYOUT     DIE_STACK_EDITOR Padstack shapes not converted correctly to die-stack layer using Die-stack Editor
3 q( n" M# y$ G8 q+ a  |1521871 CONSTRAINT_MGR CONCEPT_HDL      Constraint Manager launched from DE-HDL allows space in the name of layer sets
, H+ R) S/ Q6 ~: k0 j# ?6 t! V1522831 APD            OTHER            axlSpreadsheetSetColumnProp with 'AUTO_WIDTH' propName does not autofit the contents.
; i/ R! l" z" H1522900 ORBITIO        ALLEGRO_SIP_IF   Padstack shape distortion after translation to OrbitIO from SiP Layout design
, t0 Z( `0 m4 J0 ~5 u: ~1 N7 H1 l, E1523237 ALLEGRO_EDITOR SKILL            SKILL function axlDBGetExtents() causing PCB Editor to crash
1523426 ALLEGRO_EDITOR DRC_CONSTR       Dynamic shape not adjusted based on keepout; DRC generated
$ J9 Y3 N" r" n0 x+ P$ i/ f1524875 F2B            PACKAGERXL       Packaging using csnetlister fails, while manual packaging of individual blocks works fine
1525432 CONSTRAINT_MGR OTHER            User-defined property not being transferred from DE-HDL to PCB Editor
0 w8 R  s/ r3 w6 k1525883 ADW            DATABASE         Invoking libimport on an existing DB should verify that the 'libimp_su' variable is set correctly
1525948 F2B            PACKAGERXL       Reference designators assigned by the Packager tool are not correct
1526914 ADW            LIBIMPORT        Cannot import to new library database
1527321 ALLEGRO_EDITOR SCHEM_FTB        Unable to create netlist with the 'Open Board in OrCAD PCB Editor' option in Hotfix 63
8 v1 }1 \- f1 m) J, f3 U' `1528075 CONCEPT_HDL    OTHER            Auto Generate: DML model assignment fails with error 'There is PHYS_DES_PREFIX property in PTF file.'
1528235 ADW            DBEDITOR         Running rule 'Validate Classification Property and Property Values' results in property mismatch error
7 i$ U+ X& B7 A1528254 CONSTRAINT_MGR CONCEPT_HDL      Import Logic with the 'Overwrite current constraints' option is deleting some attributes
- Y+ G3 c. O0 W6 Y) C- v* d% ^7 E1528398 ALLEGRO_EDITOR SCHEM_FTB        Netlisting of pins with NC property results in error
1528479 ADW            LRM              LRM crashes when opened on a lower-level block in a hierarchical design
1528894 ADW            DBEDITOR         Lack of PTF_SUBTYPE in the classification prevents the release of the part
1529178 SIG_EXPLORER   OTHER            When an ECSet is created from a net, values are not transferred correctly for PinPairs
1529209 CONCEPT_HDL    CORE             When adding a component symbol version, the More option does not show all the versions
4 M; \( X0 B/ M5 }1529720 CONCEPT_HDL    COPY_PROJECT     Running ADW copy project does not update the 'master.tag' file
1530445 ALLEGRO_EDITOR EDIT_ETCH        PCB Editor crashes when 'Add Connect' is used
7 L0 ?3 w" ^( P1 r1530707 CONCEPT_HDL    CORE             Request to recover a 16.6 design after DE-HDL crashes
1531425 CONCEPT_HDL    CORE             DE-HDL crashing while trying to add a NetGroup
1532865 CONCEPT_HDL    CHECKPLUS        Provide the ability for Rules Checker to report a GND symbol from the standard, and not our local library, in .mkr
1 [" K4 \" F" N0 \6 R2 p; @1533543 ADW            DBEDITOR         Component Browser free text search returns 2 parts when only 1 exists
% i: H, x1 W0 o5 R1536273 CONSTRAINT_MGR CONCEPT_HDL      Model-defined differential pair is removed, and Constraint Manager Design Differences does not report an issue
1537055 CONCEPT_HDL    CHECKPLUS        Rules Checker - POWER_PINS value not obtained when schematic instance has the POWER_PINS and POWER_GROUP properties
1537339 CONCEPT_HDL    INTERFACE_DESIGN No warning is flagged when moving a Net Group over a net
1537521 FLOWS          PROJMGR          Do not allow project creation if there are spaces in directory or file names on the Linux platform
1539077 ALLEGRO_EDITOR SYMBOL           PCB Editor crashes when choosing 'Layout - Renumber Pins'
1539227 CONCEPT_HDL    CORE             Renaming a page from the hierarchy browser crashes the schematic editor.
1539997 ALLEGRO_EDITOR SKILL            PCB Editor crashes when the axlStringRemoveSpaces() command is run
1541532 SCM            SCHGEN           Generate Schematics crashes with 'Out of Memory' error
1541680 CONCEPT_HDL    DOC              A dot (.) or period in design name created 2 separate design folders in worklib
1542817 ALLEGRO_EDITOR DATABASE         Import Netlist not getting completed on specific board
1542949 ASDA           EXPORT_PCB       The Export to PCB Layout form: The file name specified in the 'Output Layout File' field is not accepted
& M1 _6 ]4 K, J1543537 ASDA           NEW_PROJECT      While creating new projects, the new folder name is not visible clearly in the explorer
1544060 SCM            SCHGEN           Generate Schematics causes Allegro System Architect to crash
1544633 APD            STREAM_IF        The 'stream out' command causes Allegro Package Designer to crash
, Y* x: Q0 y$ k/ s0 @. ?# \; ^( _1544698 ALLEGRO_EDITOR PLACEMENT        'place replicate' does not add clines and vias to fanouts if fanouts are marked
1544856 ASDA           CANVAS_EDIT      Edit > Find places the process (UI) behind the SDA tool.
" X1 ?, Z2 [( {% g+ _# E1545136 ALLEGRO_EDITOR PLACEMENT        All fanouts are marked as part of one symbol instead of the symbols they attached with
& G5 E, d2 T( ^% c5 m1546062 ADW            TDO-SHAREPOINT   Failure to launch TDO Dashboard, need to update error message with more useful information
1549105 APD            OTHER            'Stream out' fails with message: 'Request to terminate detected. Program aborted'
1549658 ADW            TDA              An unmapped network folder in the Team Design Authoring option results in an error
1550052 ALLEGRO_EDITOR PLACEMENT        PCB Editor crashes when copying symbols
8 S, E; b1 P+ E1551635 CAPTURE        TCL_INTERFACE    GetSelectedPMItems returns error for design cache objects
1553027 ALLEGRO_EDITOR UI_GENERAL       PCB Editor canvas stops responding for tasks such as resize and workspace switch
# \0 Y+ A5 M; Y9 f1555246 ADW            DBEDITOR         Part Copy As does not copy AML and reliability model relations.
0 {6 S! o" X2 `2 _& d! F3 L: u1555254 ADW            DBEDITOR         Text in Free Text search box is removed if it loses focus
1557542 ALLEGRO_EDITOR OTHER            DXF export creates strange result for donut-shaped polygon
. i! [* k9 P9 }" _4 S4 \: ^1573039 ALLEGRO_EDITOR INTERFACES       IDX returns control to the general interface prematurely during an incremental IDX export
2 u! ?; N9 b! B' K; b- b4 V6 d. L& u1580571 ADW            DBEDITOR         XML files continue to appear in flatlib even after the padstack/footprint models were released
1580580 ADW            LIBDISTRIBUTION  The .lis file contains references to old models even after they were purged.
9 p+ N' ]# @' F7 c; H1582064 ALLEGRO_EDITOR UI_GENERAL       User-defined menus not working in PCB Editor 17.2
1582628 ADW            TDA              When one user takes an update of physical object while the other user is still checking in the object, TDO crashes
4 p" i7 D% @  [- A) e0 m5 n. z1582856 PSPICE         MODELEDITOR      Getting 'ERROR: [S2C3471] Base part library does not exist when Export to Part Library', though olb is created
1584719 TDA            CORE             Caching errors are flagged for a board-ref project during block update
5 n% P0 Y# q, M7 e1587045 CAPTURE        IMPORT/EXPORT    Unable to import PDF file
4 V* i) _( K- f; _1 e5 N! r1587259 ALLEGRO_EDITOR UI_GENERAL       axlUIMenuFind not working correctly for the 'bottom' option
# |  `( c! ^5 V. M& _$ M  Q1588736 PSPICE         MODELEDITOR      The Model Import wizard displays 'Invalid configuration' message when a .lib file is opened in Model Editor
/ B/ C* q" z3 q; C6 J& }8 W3 h2 X1588742 PSPICE         PROBE            Browse icon is missing from PSpice File - Export - text
1590006 ALLEGRO_EDITOR UI_GENERAL       PCB Editor 17.2 crashes when multiple browse windows are opened
0 \, X8 w4 V# u$ a1590597 PSPICE         PROBE            Problem with the adaption in the Probe Window icons
1591264 ALLEGRO_EDITOR UI_GENERAL       Film order in Visibility View is sorted alphabetically and does not match the manufacturing artwork
1592089 PSPICE         MODELEDITOR      Cannot get the PSpice DMI Model DLL while using PSpice DMI Template Code Generator
/ Z2 U' L( T( ~, ?9 _1593436 ADW            DBEDITOR         Cursor does not automatically move to the model name cell when creating a new model
1594076 TDA            CORE             TDO crashes on concurrent check-ins when one of the blocks was not modified.
- e4 x1 G1 H+ R2 w0 h4 F& M1595987 ALLEGRO_EDITOR PLACEMENT        Subclasses not getting updated in Placement Edit mode
1596162 ASDA           IMPORT_DEHDL_SHE Importing sheets from DE-HDL imports the block as well
1597000 CONCEPT_HDL    INTERFACE_DESIGN Renaming a NetGroup does not work if several segments of the NetGroup trace have the same netnames assigned.
1597406 ALLEGRO_EDITOR SHAPE            Dynamic Shape does not void the traces and voids open areas
8 i2 y: ]6 f8 ~  g; r1597957 ALLEGRO_EDITOR PLACEMENT        Quickplace: placed and unplaced counts not getting updated
* W& L2 u) |, K% s! x6 e  D1600194 ALLEGRO_EDITOR DRC_CONSTR       'drc update' gives a different DRC count each time the command is given in a multiple-cpu system
1600800 ALLEGRO_EDITOR GRAPHICS         LINUX 17.2 operation of Update DRC is not the same as Windows – graphics not updating
* ?: ?: Y3 M* E1602605 CONSTRAINT_MGR OTHER            OrCAD: constraints not getting saved
! |4 o* F# {6 C# S) C$ V1602801 SIG_INTEGRITY  OTHER            Dielectric Warning message when opening SiP tool.
0 N) m3 B" q* r0 h+ I% {, R) ?1603377 PSPICE         ENVIRONMENT      Running simulation with the 'At Markers Only' option does not generate the .dat file
# ]/ }% q5 u- a3 }5 `6 e" g1604166 CONSTRAINT_MGR CONCEPT_HDL      Audit ECSets does not work from 'Referenced Electrical CSet' column header
$ J7 T1 U& P5 J5 H4 V4 u- N: f; A1604741 ASDA           CANVAS_EDIT      Tcl console changes the present working directory when you open Project Preferences and close it.
1605310 TDA            CORE             Join Project wizard: Random crashes in the Team Design Authoring option
1606861 CONCEPT_HDL    CORE             DE-HDL crashes on Linux during the Generate View operation
1606917 CONSTRAINT_MGR CONCEPT_HDL      Importing tech file in DE-HDL Constraint Manager is creating a duplicate 'DEFAULT' cset
% V0 }' [- L9 K0 b; }1607157 ALLEGRO_EDITOR INTERACTIV       Edit - Change allows lines to be copied to Cutout subclass, but that subclass requires closed polygons
1607330 CONCEPT_HDL    CORE             Variant view schematic PDF corrupted with attach_props set
1607568 ALLEGRO_EDITOR NC               PCB Editor shows wrong drill legend for Top-to-Top drill
2 c  j7 L7 F; [  l5 N7 A1607986 CONCEPT_HDL    SKILL            cnGetSetupProjFilePath: The SKILL routine does not deliver the full qualified path and name of the project in 17.2
5 J7 u& E( G, ]* t2 s1608524 SIP_LAYOUT     MANUFACTURING    The Display Pin Text tool fails in the 16.6.073 version with a parseString error.
1609400 ASDA           CANVAS_EDIT      The 'Assign Differential Pair' right-click pop-up menu command should be grayed out when a single net is selected
1609809 ALLEGRO_EDITOR UI_GENERAL       Crash in Allegro PCB Designer version 17.2-2016 on Linux
1609856 ALLEGRO_EDITOR ARTWORK          Embedded paste and soldermask showing up in both top and bottom gerber files.
6 z$ g+ W" a/ s8 S# ?1609922 CONCEPT_HDL    INFRA            Launching Model Assignment crashes DE-HDL when the temp/edbDump.txt is read-only
' r8 g. H3 ]) i" z! @6 q! @1611226 ALLEGRO_EDITOR SYMBOL           PCB Editor gives a crash message while saving a flash symbol
1612108 ALLEGRO_EDITOR OTHER            Netlist Import is crashing with the .SAV message.
6 w+ r2 l2 V1 |+ |1613123 ALLEGRO_EDITOR SKILL            DrillType for Oval Slot should be 'OVAL_SLOT' not 'OVAL SLOT'
1 S, S! t# W4 S0 \& C# u* ]# z0 j1614000 ADW            LIBDISTRIBUTION  Library distribution (lib_dist) does not complete; lib_dist.lck cannot be deleted when Configuration Manager is running
( `% ~; P' L) `8 D, a5 B) c1614667 SIG_INTEGRITY  SIMULATION       Different results from Probe in Allegro Sigrity SI and SigXplorer
/ o: \. R5 w2 R; ]) _1615601 GRE            IFP_INTERACTIVE  Delete Bundle then try to delete plan lines results in fatal error
1616235 ORBITIO        ALLEGRO_SIP_IF   oio2sip import does not map layers correctly
5 z6 d+ S, Z  b# v1616540 SIP_LAYOUT     DRC_CONSTRAINTS  Same net DRC Line-to-Line reappearing after dyn shape update
1616733 ALLEGRO_EDITOR INTERFACES       'genrad output' no longer working in 17.2. Gives the Error 'extracta process failed. Command terminated'
- ^6 y; w8 F5 Q+ N. R* |, O( `( b1618751 ASDA           DRC              Zero Node Net errors flagged when DRC checks are run, though RETAIN_ZERONODE_NET is set to 'NO' in Site CPM file
1618797 ADW            FLOW_MGR         Flow Manager cannot execute a specific command in 17.2.
: ~6 K" ~+ o) Y9 F9 j9 T6 Q1618930 CONSTRAINT_MGR INTERACTIV       Hovering over row column cell causes the application to go into a not responding state.
  S+ ]: }9 [% G% E9 `8 l; y1620350 ASDA           EDIT_OPERATIONS  Pin number is lost on updating the version of a connector pin
( d& ~/ ]6 N) r4 l1621963 ASDA           SELECTION_FILTER Selection filter: Pins in the symbol used in connectors are not selected
1622715 CONCEPT_HDL    CONSTRAINT_MGR   Extracting an XNet crashes DE-HDL
; v  y+ M+ l' a' \5 _/ p! S  q1625209 ASDA           IMPORT_PCB       File Import from PCB Editor shows board differences


: x4 m8 P+ |: CFixed CCRs: SPB 17.2 HF003
7 [5 O9 x; M: p, v& g07-28-2016
===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
. d+ A- v% X, p1 l1423889 ALLEGRO_EDITOR EDIT_ETCH        AiDT gets poor routing result
1461626 CONCEPT_HDL    CREFER           Cross-references shown to the same pin on different block instances though the signal names differ
* w8 R) I  f# M  n. q6 z5 N1472456 CONCEPT_HDL    CORE             The design connectivity (XCON) file and design data are not in sync
1546151 CONCEPT_HDL    CORE             Add port, Genview, move pin on block - the pin name disappears
- O) w" S; p+ d, V5 ^5 B1547356 ALLEGRO_EDITOR EDIT_ETCH        AiDT gives different results in ISR S034 and S066
1560102 ADW            FLOW_MGR         Flow Manager: None of the eval commands working
3 V1 ~' r# D' c: h: w# j* T. {1570032 ALLEGRO_EDITOR GRAPHICS         3D Viewer shows flat LED for a specific design
+ l8 R2 m& W% A2 F6 j1574676 ORBITIO        ALLEGRO_SIP_IF   Updating the OrbitIO database with a modified .sip file gives errors
& N$ n8 A. `' I1578876 ADW            ADWSERVER        Component Browser crashes when trying to show details of a part number
4 t6 C2 k; r9 X) a1580744 F2B            PACKAGERXL       Running Export Physical results in error SPCODD-114
1582863 CONCEPT_HDL    CORE             Generate View creates non-existent ports
6 }! {, C) O. {5 h- a( l8 D6 k1584317 CONCEPT_HDL    CORE             Provide an option to open pxl.log from the Design Sync window when packaging does not complete successfully
1587018 ADW            FLOW_MGR         User is prompted to specify the flow name each time the project is updated
. X5 d' {+ Q' \% y& K6 q4 E& i1587157 CONCEPT_HDL    CONSTRAINT_MGR   pstprop.net reports conflicts on nets with VOLTAGE properties
1587498 CONCEPT_HDL    INTERFACE_DESIGN Need the ability to tap individual bus bits
1587718 ADW            LIBIMPORT        Library Import - The Pre-analyze tool does not report errors
* i) c* S$ b" c) a  W/ W( {! e1588197 ALLEGRO_EDITOR INTERFACES       STEP export fails when External copper is selected on Windows 10
1588786 ALLEGRO_EDITOR OTHER            strip_design reports 'Design has been corrupted'
# G  d0 y  X; W9 S" {! s, p1589252 CONCEPT_HDL    CORE             Search results zoom into the page origin instead of the selected components
1589318 ALLEGRO_EDITOR DRC_CONSTR       Via to SMD Fit DRC reported between embedded pin and via which do not share layers
1589979 ADW            FLOW_MGR         Design Name change does not reflect in Flow Manager in the same session of a project
1590538 CONCEPT_HDL    DOC              Open Archive: Some observations on the random behavior
. h! K  Z, m0 l1590639 CONCEPT_HDL    OTHER            Importing a design in DE-HDL results in a crash
* u/ U, z; C$ ]! t# U1590651 CONCEPT_HDL    INTERFACE_DESIGN DE-HDL: Duplicate NetGroups created in Interface Browser and Constraint Manager
1590720 ALLEGRO_EDITOR INTERFACES       Exported Text Size Parameter file does not load names into the text table
1591070 PSPICE         PROBE            PSpice crashes when using the Trace - Measurements - Evaluate command
0 r8 l# e# U" @; g6 w. A1591223 CONCEPT_HDL    CORE             Variant information for lower-level schematic not displayed
1594240 CONCEPT_HDL    ARCHIVER         Archiver is not able to change the permissions of the cells archived
1594416 ALLEGRO_EDITOR PAD_EDITOR       Padstack Editor crashes when you create a new pad
1596615 ADW            DBEDITOR         Unable to search parts: Component Browser did not launch; Database Editor did not return search results
1596780 ALLEGRO_EDITOR SKILL            PCB Editor crashes after doing SRM update and save
  L3 P2 v1 f9 H# y' P9 U8 J1597153 F2B            DESIGNVARI       ERROR SPCODD-53 in Variant Editor
: j1 V' A5 v( D8 G1597385 F2B            DESIGNVARI       Some 16.5 variant DNI parts appear in 16.6 as X-OUT and some without X-OUT or DNI
1598629 F2B            PACKAGERXL       Export Physical crashes after flagging error SPCOPK-1458
1599452 ALLEGRO_EDITOR ARTWORK          Import Artwork with Mirror option does not import pins or shapes
% t8 X( t1 L, A5 e1 e/ s6 ^* c1599744 ADW            FLOW_MGR         Flow Manager: Commands associated with some of the buttons not working
1599950 SCM            OTHER            Adding the GND net to parts/pins takes a long time.
& R4 f9 h" M) O: _2 ~, R; S/ U" J$ }1600226 RF_PCB         AUTO_PLACE       Fail to auto-place RF group
9 S5 R% |8 S2 ~1600618 ALLEGRO_EDITOR DRC_CONSTR       Casing of property names is affecting results when working with Physical Constraint Set
1600914 ALLEGRO_EDITOR INTERFACES       Exported PDF has unfilled shapes despite enabling the 'Filled Shapes' option
1601165 ALLEGRO_EDITOR DATABASE         Thermal Relief is not added for Rounded Rectangle pad
: b# b, o4 t- }5 `$ R  Q& r1601281 ALLEGRO_EDITOR OTHER            STEP model link gets corrupted with SKILL axlLoadSymbol
1601282 ALLEGRO_EDITOR OTHER            Export Libraries will not export device files when there is a space in the folder name.
1602514 PCB_LIBRARIAN  METADATA         References to some primitives missing in block metadata;TDA errors reported for missing parts after joining a project
* n9 q5 x3 S+ {1602823 SIP_LAYOUT     WIREBOND         SiP crashes when using the Add Wire command
" D2 R- z9 c8 J) a1602955 ALLEGRO_EDITOR SHAPE            Shape to Route Keepout DRC not reported for attached database
1604223 CONCEPT_HDL    CORE             Tool stops responding after error SPCOCD-553: Connectivity Server Error
1604746 ALLEGRO_EDITOR OTHER            In 17.2, layer data is getting changed when importing extracta files into other thirty-party extraction tools
% O& q  O6 g5 y, l1605322 ALLEGRO_EDITOR TECHFILE         Generating tech file in 17.2 takes much longer as compared to 16.6
! o* x. L* m& F6 I
: u3 e* ?' d3 H( ~1 B; }  G
Fixed CCRs: SPB 17.2 HF002
06-31-2016
4 M# j+ E6 N, W- X) k7 h- E===================================================================================================================================
4 \/ W3 w/ _* K9 @, S2 ^6 _CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
( T" V. F# X* \0 Q# ^5 |) W===================================================================================================================================
1452838 CONCEPT_HDL    CORE             Apparent discrepancy between Bus names and other nets
1469146 ADW            LRM              Packaging error reported after updating the design using LRM
1481802 ORBITIO        ALLEGRO_SIP_IF   Import of an OrbitIO file to an existing SiP file offsets the results incorrectly
5 P% y. l, H- [; Y# g* e1 [. V1518957 APD            SHAPE            Shape void result incorrect
: X) V$ D  Y0 {' L0 Y; E1519155 ALLEGRO_EDITOR OTHER            IPC-2581-B Negative Plane Error
1524947 SIG_INTEGRITY  SIGNOISE         Custom Stimulus is not recognized correctly in Allegro Sigrity SI or PCB SI.
1 g. M" e( I1 T$ y( W2 U1532162 CONCEPT_HDL    CORE             The Rename Signal command does not update split symbols.
1543997 CONSTRAINT_MGR OTHER            Import Logic is overwriting the constraints in the attached design.
0 v* O6 T, k6 [4 |4 X, s' f1544675 ALLEGRO_EDITOR OTHER            Export Libraries corrupts symbols if paths do not include the current directory (.)
$ g- ~# E+ T% ?9 o1549097 CONSTRAINT_MGR XNET_DIFFPAIR    Show warning message if differential pairs are created for nets with voltage properties
1551934 ALLEGRO_EDITOR SKILL            axlBackDrill command is not analyzing new layer set when application mode is set to 'None'
1554919 ADW            LRM              LRM does not find PTF data for cell 'res' in the reference library
1555009 CONCEPT_HDL    INTERFACE_DESIGN Unable to rename a NetGroup.
1559136 ALLEGRO_EDITOR EDIT_ETCH        Cannot connect floating clines to vias with nets
1559552 SIP_LAYOUT     ORBITIO_IF       device offset in oio2sip translation
* Z8 K$ K4 v0 C* O6 c* |+ a* @5 F1560301 CONCEPT_HDL    CORE             DE-HDL hangs when Edit menu commands are called on Linux if xclip is open
; M. \: y1 R3 K1560804 ALLEGRO_EDITOR OTHER            Film records order gets reversed when using File - Import - Parameters after File - Export - Parameters
1561501 ORBITIO        OTHER            OrbitIO stops responding when refreshing a design in SiP Layout
! f. _' D/ ?" f+ |1564036 CONCEPT_HDL    CORE             User-defined custom variables are not getting populated in the TOC
6 Q7 \) [% d5 v# t! M1564545 CONCEPT_HDL    OTHER            Signal model property deleted from an instance is not deleted from the instance pins
1564552 CONCEPT_HDL    CORE             Find Net should zoom to the nets on schematic canvas
7 u% j+ u8 v' I1566119 CONCEPT_HDL    CORE             Right-clicking the schematic to add a component does not show all the schematic symbol versions
1566848 ALLEGRO_EDITOR ARTWORK          Board Outline artwork is incomplete
  U4 [6 P$ O) \$ ?/ `1566942 ASDA           MISCELLANEOUS    Several extra files in the /tmp/ folder on Linux
1567290 ALLEGRO_EDITOR MANUFACT         Import Artwork fails to import a shape.
1567587 ALLEGRO_EDITOR MANUFACT         Extended tool name in header of drill file is not correct
1569056 CONCEPT_HDL    CORE             Opening the same drawing in multiple cascading windows view displays non-existent artifacts
1569087 ALLEGRO_EDITOR DRC_CONSTR       Running DRC Update gives the message 'Figure outside of drawing extents. Cannot continue.'
( F! D$ R  Z1 L0 W) l* m1569147 CONCEPT_HDL    CORE             The signal name auto-complete drop-down list is not displayed correctly
6 ~. O) v0 _5 P7 i! D. P1569394 ALLEGRO_EDITOR SKILL            axlPadSuppressSet( 'on 1 '(via)) not working on SPB17.2
9 U+ \  C2 `0 q& C; Z1569924 CONCEPT_HDL    CHECKPLUS        Checking in a large BGA into ADW results in an error related to negative signals
) ?' _1 h, |( Y" L9 |; y, t* {1570398 SIP_LAYOUT     DATABASE         Diestack layers cannot be deleted if there are unplaced symbols in the design
1570419 CONSTRAINT_MGR CONCEPT_HDL      Need to add a customized worksheet custom property weblink in Constraint Manager
/ t3 t0 ?% O( g' h5 S7 R7 E+ O* @1570624 APD            ARTWORK          Artwork file has missing voids on a layer and is causing a short
2 n( ]) `# G: q  i3 z0 N1570678 F2B            DESIGNVARI       Variant Editor: Error when adding an RSTATE property
3 _" B* M2 v7 N1571113 CONSTRAINT_MGR DATABASE         Reports generated from cmDiffUtility show the differences in mm units only
1572593 ALLEGRO_EDITOR ARTWORK          ARTWORK: 'Draw holes only' option does not match display
9 H3 S* d  o# i$ ~# S2 D4 {+ ?* W1573127 CONCEPT_HDL    COPY_PROJECT     The CopyProject functionality creates an incorrect 'view_pcb' directive value
  P4 a$ ]7 M. Y. D( y% w1573205 CONCEPT_HDL    CORE             dsreportgen is unable to resolve the physical net names (PHYSNET)
. t. j( o- W: S" U& _1573625 CAPTURE        PROJECT_MANAGER  Toolbar customization is reset when Capture is re-invoked in SPB 17.2
: _, i( R6 S' e: }/ x6 P1573755 ALLEGRO_EDITOR CROSS_SECTION    Changing a layer's type is also changing its material in Cross Section Editor
1573970 CONCEPT_HDL    ARCHIVER         archcore fails to archive the project CPM.arch file
" `/ D: Y+ B, ~- H) ~1574381 CONCEPT_HDL    OTHER            Packager crashes on repackaging a design with RefDes related advanced settings
9 C- n" q2 I/ l2 p5 W1576100 ALLEGRO_EDITOR SYMBOL           Update symbol crashes, creates '.sav' file, but shows update was successful in 'refresh.log'
% X1 C; a& M$ @% m1577381 CONCEPT_HDL    CORE             ERROR(SPCOCN-2128): The NetGroup structure does not match the PortGroup structure
1580103 ALLEGRO_EDITOR DATABASE         dbstat of 16.6 does not recognize 17.X files
0 w# Q) C% D4 }7 A& p! K8 C* a1580891 SCM            REPORTS          Dsreportgen crashes in different scenarios
) X' |6 U  N* q; N, q% t; t1 ?1581254 SIP_LAYOUT     CROSS_SECTION    Cross Section Editor crashes when adding a layer
1584957 ADW            FLOW_MGR         17.2 Flow Manager, JavaScript - Tool Launch Error
- B) x9 M2 @, o, A1588823 ADW            FLOW_MGR         Flow Manager: In 17.2, using back slashes in the UNC path results in problems in working with the tool
* Q4 u- s% c" E1590064 ADW            LRM              Allegro EDM Flow Manager - An empty LRM dialog opens on design load in 17.2

3 Y/ [! U  o' k, y  @
Fixed CCRs: SPB 17.2 HF001
05-06-2016
* C' p& v4 L- |===================================================================================================================================
" e5 w+ {% }9 K) ?) XCCRID   PRODUCT        PRODUCTLEVEL2   TITLE
2 V. H1 D& K; E6 N3 M===================================================================================================================================
1272355 F2B            DESIGNVARI       Property changes on replaced component shows incorrect result in BOM output
1482953 ALLEGRO_EDITOR DATABASE         Part change disassociates parts from Group
1484075 ALLEGRO_EDITOR PADS_IN          'pads_in' imports ASSEMBLY_TOP  and PLACE_BOUND_TOP outlines that are defined as shapes as lines
1488909 ALLEGRO_EDITOR DRC_CONSTR       Test Via causes net scheduling verification to fail
# r7 Q% c) ]+ y8 x) q! Y% o1498389 SIP_LAYOUT     DIE_GENERATOR    Provide the ability in the 'die in' command to specify flip chip as a DIE symbol
1 P. r8 i0 Z/ \- L4 v; Y3 u3 ]. @1499515 ADW            COMPONENT_BROWSE The Search Criteria property value is automatically being set in the ADW Component Browser
1506672 ALLEGRO_EDITOR INTERACTIV       In the attached board file, when using Replicate Place, some shapes are missing from some layers
1522411 FLOWS          PROJMGR          License selection should persist on invoking Layout from Project Manager
1523532 F2B            PACKAGERXL       Adding subdesign names in the 'Use subdesign' or 'Force subdesign' sections hangs for more than a minute
( z( p3 P9 U) i, ]/ D$ D1525783 CONCEPT_HDL    CORE             '\BASE' scope does not work for SYNONYMed global signals
1526729 SPIF           OTHER            Exporting a dsn file causes PCB Editor to crash in the interactive and batch modes
1529846 ALLEGRO_EDITOR SHAPE            Some shapes are not generated in the artwork
1537499 CONCEPT_HDL    CORE             Adding the same version (already placed) with the same split block name should not be allowed
! Y5 O/ x7 t4 `1541589 ALLEGRO_EDITOR INTERFACES       STEP model incorrectly shown in 3D viewer. Shows pins as angled.
1542334 CONCEPT_HDL    CREFER           creferhdl leaving lock files in sch_1 folder
1542722 ALLEGRO_EDITOR INTERFACES       IDX export: RefDes and PART_NUMBER missing for mechanical symbols
1543410 ADW            LRM              LRM shows confusing part status; reports that update is needed but clicking update does not work
1544614 ALLEGRO_EDITOR SKILL            Associative dimension data reaches the 'psm' file despite deleting the layer on which it was set in the 'dra' file
1545370 APD            OTHER            Pads in .mdd file getting placed on different layers as compared to the design
: }5 z$ _( J7 g% }* ^1545909 ALLEGRO_EDITOR UI_FORMS         Show 'microvia' checkbox in 'Blind/Buried Vias' form only with the 'Allegro_PCB_Mini' license
1546141 ALLEGRO_EDITOR SHAPE            Shapes missing from Artwork
' d- u' b5 K# ?* f1546877 CONCEPT_HDL    CORE             Align Left on wires fails with incorrect error message
1547224 CONCEPT_HDL    CORE             Lock the 'PATH' property once it is assigned by system
# j0 O6 I: T, T$ O6 d1547584 SIP_LAYOUT     OTHER            SiP - Design Variant: Delete embedded layer if not selected
1548116 CONCEPT_HDL    CORE             Some versions of Technology Independent Library do not appear when adding a symbol
" h; B) H/ B/ Q5 E1548151 ALLEGRO_EDITOR INTERFACES       Exporting a step file gives a component rotation mismatch in the *.stp file
! x$ E" J/ N" c% Q+ h1548421 F2B            BOM              Parts with same 'BOM_IGNORE' set do not behave the same way in the BOM report
1 l- I) d' E5 D' A2 s: U8 N1548978 ALLEGRO_EDITOR MANUFACT         Shape not voiding clines
, N% W; p! m5 }5 y! R1549662 ALLEGRO_EDITOR OTHER            Import Parameters Path fails if parampath does not have the current directory (.) set
1 Z1 h( j! B- f1549836 CONCEPT_HDL    CORE             Tools - Customize - Keys - Reset does not reset keyboard shortcuts
8 A2 `" l# t4 I/ R1550941 PCB_LIBRARIAN  PTF_EDITOR       PDV Part Table Editor new column sorting causing problems
1551713 ALLEGRO_EDITOR DRC_CONSTR       Hole to Hole DRC between via and pin not shown
1553950 ALLEGRO_EDITOR SKILL            Executing axlUIControl(pixel2UserUnits) crashes PCB Editor
$ k2 n! a  h# n! F4 ]' s1 Z# B  _1554333 CONCEPT_HDL    CORE             Changed connectivity error when aligning ports attached to NetGroups
1555092 SIP_LAYOUT     DEGASSING        Degas offset is not working with hexagons
4 z! }/ H( G# |' Y1556261 ALLEGRO_EDITOR DATABASE         DBDoctor crashes with the error 'Illegal database pointer encountered, Exiting DBDOCTOR.'
1557716 APD            OTHER            Stream out fails with request to terminate detected - Program aborted
7 [- s. X! Z2 f5 t0 B' }  D% q1559951 SIP_LAYOUT     SYMB_EDIT_APPMOD Wrong bump locations after Symbol Editor - Refresh co-design die
$ S, g$ q  }3 w. W' i1560197 CONCEPT_HDL    CORE             BOM-HDL adds extra characters to subdesign_suffix when generating hierarchical BOM
$ O, O1 |, ?: e) ^  U1561077 ALLEGRO_EDITOR INTERFACES       Beta - IDX User Layer export fails on Linux
0 s( m. Q! H3 \# H( t: s4 z% u- g' }1562537 ALLEGRO_EDITOR MENTOR           Using mbs2brd in 16.6 gives a fatal error
& G( U& n1 `5 D8 V* T1564203 ALLEGRO_EDITOR ARTWORK          Cannot generate negative artwork
# }- q: h/ D" C3 ^$ G  l

th2010-gc01

lilacbear 发表于 2019-11-5 14:06
6 n+ A3 {% [, p! I$ G# _Readme for SPB Release version 17.2

+ X! [  H. z8 Y" R; ]" D& HCopyright (c) 2019 Cadence Design Systems, Inc.

# {8 K& Q2 r' L牛！不是一般的牛！
$ r- I- d. Z, t, {6 ^

鲫鱼3525

终于翻到头了

leilei4908

lilacbear 发表于 2019-11-5 14:06
- x# C  N/ l- c: x- j4 lReadme for SPB Release version 17.2

+ h) ]- K: f- _) I& p# G0 }: }Copyright (c) 2019 Cadence Design Systems, Inc.

2 X5 T) ?, g5 D! \4 \1 S哇塞，大佬都整理过了啊。。。牛牛牛！！！