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summmmmm 发表于 2011-5-4 14:46 ![]()
! |/ X4 u& f% b8 b* g1 P7 A- {回复 summmmmm 的帖子
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. G* n6 m3 l6 u6 c2 M& l今天终于找到问题出现的原因了,郁闷,是因为我的brd文件没有和网表文件放在一个文件 ... . L8 J0 e( }+ G
大哥,为什么我把.bad放到了allgero文件夹里面还是不行,虽然没有报错,但是并没有倒入任何资料到PCB中;(---------------------------------------------------------------------)! S4 ~. H3 b3 s. @9 A% S5 k& I' J
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( Allegro Netrev Import Logic )) u- i. s( e, W1 C$ I2 a
( )
3 m6 r0 _( k; X5 N) g( Drawing : yuboshilianxi.brd )6 G1 B1 c) R# f/ T7 O! m2 U
( Software Version : 16.5P002 )
5 Q6 J* M/ @( I7 g( Date/Time : Mon Jul 22 20:21:57 2013 )
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) [! e* c u) P4 J+ E4 D(---------------------------------------------------------------------)+ j3 B* K& q/ ?6 Q5 b Z
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$ K; t9 o4 C5 c, G! r------ Directives ------
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5 U3 q5 a T: {RIPUP_ETCH FALSE; Y2 J3 C- ]9 J0 s, o0 q* Z
RIPUP_DELETE_FIRST_SEGMENT FALSE;2 F& U/ w/ d% c# |6 k" h
RIPUP_RETAIN_BONDWIRE FALSE;3 l# o2 E6 ]6 E' T5 K
RIPUP_SYMBOLS ALWAYS;; e' z; e/ r1 Q5 \# P. g
Missing symbol has error FALSE;; g3 {4 U6 j8 L+ {
SCHEMATIC_DIRECTORY 'C:/SPB_Data/BRDword/yuboshi/allegro';
8 x! t5 c) I& I, I# E2 W- _+ V) ^BOARD_DIRECTORY '';
4 F- T& Q) r, W* iOLD_BOARD_NAME 'C:/SPB_Data/BRDword/yuboshi/PCB_LIB/SYMBOL/yuboshilianxi.brd';
7 g1 R" Z% y5 \. i: INEW_BOARD_NAME 'C:/SPB_Data/BRDword/yuboshi/PCB_LIB/SYMBOL/yuboshilianxi.brd';
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CmdLine: netrev -$ -i C:/SPB_Data/BRDword/yuboshi/allegro -y 1 -z C:/SPB_Data/BRDword/yuboshi/PCB_LIB/SYMBOL/#Taaaaaa02336.tmp
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8 |6 C. D t* l5 I( n; N------ Preparing to read pst files ------
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. `: R& n$ S# @! IStarting to read C:/SPB_Data/BRDword/yuboshi/allegro/pstchip.dat p" v* W+ Y2 p3 |+ Y5 F
Finished reading C:/SPB_Data/BRDword/yuboshi/allegro/pstchip.dat (00:00:00.17)3 c& ^9 b0 k: p/ K: F( H0 `
Starting to read C:/SPB_Data/BRDword/yuboshi/allegro/pstxprt.dat ) q( |5 C u! m" j3 ~: O
Finished reading C:/SPB_Data/BRDword/yuboshi/allegro/pstxprt.dat (00:00:00.07)
) x# b4 Y# l6 b/ [3 p. v0 d8 JStarting to read C:/SPB_Data/BRDword/yuboshi/allegro/pstxnet.dat
/ u' h9 O' e8 w% f g* B! F5 P Finished reading C:/SPB_Data/BRDword/yuboshi/allegro/pstxnet.dat (00:00:00.07)
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0 i! t( D8 h. }# E------ Oversights/Warnings/Errors ------2 {2 ]" n+ q5 }
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------ Library Paths ------
% r6 g* q$ A [MODULEPATH = . " g+ Y8 t" B4 o$ A/ k( O
C:/Cadence/SPB_16.5/share/local/pcb/modules
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PSMPATH = .
% n! a) J0 D, r0 Y$ w6 [6 U9 F# Y symbols - [/ Z& O6 ~, p. A T2 c2 V
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../symbols {, ?$ \ T+ X
C:/Cadence/SPB_16.5/share/local/pcb/symbols
, y+ e+ O) A$ N. L8 ` C:/Cadence/SPB_16.5/share/pcb/pcb_lib/symbols
, }7 c4 H2 o4 E8 x C:/Cadence/SPB_16.5/share/pcb/allegrolib/symbols
! Y5 ]: O) [! i* C1 [# F @ C:\SPB_Data\pad\
# ^2 r$ i$ { c! Q1 P9 C h/ ~ C:\SPB_Data\dra\ & T: U" O6 i4 A& S
C:\SPB_DATA\S301\dianchikaban\ : a$ r5 @$ p8 D* z$ M( e
C:\SPB_Data\BRDword\yuboshi\PCB_LIB\SYMBOL\
, O; r: B" S1 k8 M3 k C:\SPB_Data\BRDword\yuboshi\PCB_LIB\DEVICE\
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PADPATH = .
5 {/ [- g- l; g# y% |9 P" ]% B symbols ) r# q+ i% f- `: F5 H1 ^
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../symbols & S1 ~$ G) f+ F# r
C:/Cadence/SPB_16.5/share/local/pcb/padstacks
# a' @) O) k: i! x C:/Cadence/SPB_16.5/share/pcb/pcb_lib/symbols
; i0 J7 b/ d% \9 x# Q6 o/ m8 ]6 R C:/Cadence/SPB_16.5/share/pcb/allegrolib/symbols 5 h$ C9 N: W2 r
C:\SPB_Data\dra\
- F z- ]; m9 Q- Z, z5 B3 S+ t C:\SPB_Data\pad\
5 j9 W/ d, N1 Z8 Q C:\SPB_Data\S301\dianchikaban\
- c/ t7 D" G" O# ^/ a C:\SPB_DATA\BRDWORD\YUBOSHI\PCB_LIB\SYMBOL\ " r2 f/ `0 S! C7 H
C:\SPB_Data\BRDword\yuboshi\PCB_LIB\DEVICE\
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5 ^; x: x8 \8 V. V------ Summary Statistics ------
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1 x. K8 c" u. p; vnetrev run on Jul 22 20:21:57 2013( h0 ]; B5 [4 m4 |" h( P1 {2 p3 r
DESIGN NAME : 'MYPROJ'
5 D# b6 P7 W! w8 t5 k PACKAGING ON Apr 21 2011 10:02:30
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& X7 T7 d4 J0 X- \: U | COMPILE 'logic'
; ?. F, }. i' V/ r CHECK_PIN_NAMES OFF# A' w. _* D+ W/ O! E
CROSS_REFERENCE OFF& A5 @5 g9 e& d8 f$ q7 T/ ]
FEEDBACK OFF
5 e- I! n# }, ^, Y0 Z& F4 G INCREMENTAL OFF% J2 A3 X4 d8 L" t( k
INTERFACE_TYPE PHYSICAL' L0 S9 E( n( K+ z5 r/ O
MAX_ERRORS 500) n+ M: ]( f9 t' u7 u" n
MERGE_MINIMUM 5, d" a) m1 k) M& {: ~$ H
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'2 Z/ c* V& P" ?5 d6 G# V. E
NET_NAME_LENGTH 24. ]! J. a& k q
OVERSIGHTS ON
7 S( h( y4 Z5 K0 N' G4 w1 a. m' A REPLACE_CHECK OFF( d$ C) W- G" ]
SINGLE_NODE_NETS ON0 v. x7 W) i6 w6 r3 o) u* H+ K- K* b. x
SPLIT_MINIMUM 0
' Q# Y1 |) q( Y1 X1 j: Z; j SUPPRESS 20
: l$ l+ R+ n$ \9 n, P8 C# A WARNINGS ON0 h3 A! c, M6 w" o4 ]
: r! w! C- Y" J No error detected" E% W; w: o1 b1 r( N- P1 w3 B
No oversight detected
v; u6 [7 s; G' U No warning detected
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. z# }: }. e8 A. `5 } D/ Scpu time 0:04:337 C- b/ U# ^" n! O' ]
elapsed time 0:00:02+ j8 p) g, g @0 V2 ?7 r% W
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