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偶也跟一贴！
" U- e& ~' {5 [以下内容来自《high speed digital system design》。
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- ]2 m/ x- R1 |0 EA via is a small hole drilled through a PCB that is used to make connections between various0 k2 t! T% [6 g' G
layers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
. z! i9 V8 b7 p0 ^. G) Q! Wthe antipad. The barrel is a conductive material that fills the hole to allow an electrical
% G, n J J* }5 m# c/ d" vconnection between layers, the pad is used to connect the barrel to the component or trace,
( R5 T u& i; l( E* f! C$ \and the antipad is a clearance hole between the pad and the metal on a layer to which no2 }, j' N+ K4 |, G5 x
connection is required. The most common type of via is called a through-hole via because it
. f4 `: B: e0 W9 z2 @6 Ris made by drilling a hole through the board, filling it with solder, and making connections on& H4 r& B% R8 X/ ]0 H; ^, [4 x
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip# ^/ a8 C) I, o. j) @5 I3 Z, K1 p
modules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts& L- Y! Q D% M# V+ H- Q7 a
a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the$ p. {4 F* F, m8 f, q9 b
traces on layers 1 and 2 make contact with the barrel and that there is no connection on
9 S/ k/ ~) |0 n6 Z7 K, O" _layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias/ k: C+ F; ~* R x7 T! i3 x) o
are by far the most common used in industry, they are the focus of this discussion.1 ]' D: M$ O& r4 c
2 u8 Z0 H1 H. Z4 b) x
Notice that the via model is simply a pi network. The capacitors represent the via pad: e! v* a5 L) l3 e# _5 [
capacitance on layers 1 and 2. The series inductance represents the barrel. Since the via& C4 k! X7 L4 x6 ^! o& x
structures are so small, they can be modeled as lumped elements. This assumption, of
: w Z- {- k8 ]3 P, Acourse, will break down when the delay of the via is larger than one-tenth of the edge rate.
6 y2 P! U! {4 z1 J( _/ v4 CThe main effect that via capacitance has on a signal is that it will slow down the signal edge8 N4 e4 H4 Y( M: p$ K
rate, especially after several transitions. The amount that the signal edge rate will be slowed- N% @- P& R. I% b0 v( M
can be estimated by examining the degradation of a signal transmitted through a capacitive6 [, X- M8 O+ R: D9 p" K
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive$ o" b. ~; ?' F: X
vias are placed in close proximity to one another, it will lower the effective characteristic
$ E: x% y: i5 M, Nimpedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
, C% p/ ~( t7 I8 W4 X. p[Johnson and Graham, 1993]
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[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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支持！
反对！
发表于 2008-1-17 21:53
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!