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偶也跟一贴！
. Q$ k2 u& X0 ~3 _7 \, I! {; ~3 ^以下内容来自《high speed digital system design》。& h& O6 ~" @/ K q$ u8 Z$ v
* e' N) X G5 a) ~& ]
A via is a small hole drilled through a PCB that is used to make connections between various
( ^# N5 |$ r$ m- c# U0 blayers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
, f7 Z0 g. F8 b8 t2 a, F0 g% w& Othe antipad. The barrel is a conductive material that fills the hole to allow an electrical8 M% v1 q( K5 F0 }; O6 v* C
connection between layers, the pad is used to connect the barrel to the component or trace,
+ t- C; \2 O: L+ N j7 \and the antipad is a clearance hole between the pad and the metal on a layer to which no
8 Y& c; ]% _0 ?connection is required. The most common type of via is called a through-hole via because it- d M. c& b- _ M- M2 }
is made by drilling a hole through the board, filling it with solder, and making connections on2 e. ], f/ x% ]: I& h8 T
appropriate layers via the pad. Other, less common types of vias, used primarily in multichip
- L# b- V5 f& U, E( P1 L. P* nmodules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts
: D) `" i; B9 a% O8 A( [" ^/ v' {a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the& x M( i+ f: z6 ~" Y G7 T- a
traces on layers 1 and 2 make contact with the barrel and that there is no connection on
2 d6 ~) v% U1 dlayer 3. Blind and buried vias have a slightly different construction. Since through-hole vias+ L0 C( b1 W# I8 Y/ ~' I/ [
are by far the most common used in industry, they are the focus of this discussion.
: s4 H- Z1 u$ ?+ ~+ U# c
, B7 ^9 Z3 |3 k: y4 V4 Y( A+ U2 eNotice that the via model is simply a pi network. The capacitors represent the via pad
P' K% U) J- [4 k2 k5 c& I, Bcapacitance on layers 1 and 2. The series inductance represents the barrel. Since the via4 U P. S+ O% a' G) a
structures are so small, they can be modeled as lumped elements. This assumption, of
4 f* X1 k8 w( ?. d* e& ?$ D# ncourse, will break down when the delay of the via is larger than one-tenth of the edge rate.. h6 Y" i0 r( N4 ^ T1 N
The main effect that via capacitance has on a signal is that it will slow down the signal edge) {; T" y, t' C/ Y1 Y
rate, especially after several transitions. The amount that the signal edge rate will be slowed5 T4 W9 q1 ~! G
can be estimated by examining the degradation of a signal transmitted through a capacitive2 ]2 o1 ~ J5 g, T' ^2 }
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive6 @- B0 m2 |" F, K# ~0 I
vias are placed in close proximity to one another, it will lower the effective characteristic
5 k" X' N s3 R+ l8 o& qimpedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is! R0 I+ l% B+ h
[Johnson and Graham, 1993]
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" h$ Q4 T" p9 S5 |* E' z. J[ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
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发表于 2007-9-11 14:20
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支持！
反对！
发表于 2008-1-17 21:53
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!