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cadence16.5 Hotfix_SPB16.50.048_wint_1of1 6 t- M) x+ h$ \& X2 a a+ C* _$ Q$ I; b
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) J* I2 J5 I( e% Q( ^, whttp://115.238.233.103/file/MDAw ... k&mode=download
- T4 u2 y. h( ~( WHotfix中只需要安装最新的版本即可。" X$ o0 n2 A! I; m
DATE: 10-4-2013 HOTFIX VERSION: 048
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CCRID PRODUCT PRODUCTLEVEL2 TITLE. I& U! L7 J7 R" m
===================================================================================================================================
6 @* w7 L) O7 n2 A% [% f1143902 allegro_EDITOR DATABASE when the shape is rotated 45 degreesthe void is moved.
( @' W) r# f: @! \; ]1145286 concept_HDL CORE Directiverequired for switching off the console# S' ^; \+ I& \! f2 N |" m
1175307 CONSTRAINT_MGR ANALYSIS CMGR fails to report RPD DRC foraccuracy 4 - mm" {; @) V8 Q5 _6 z
1177714 CONCEPT_HDL RF_LAYOUT_DRIVEN RF component's LOCATION property can not be set toinvisible
8 C! M, M1 b) k1178180 CONCEPT_HDL CONSTRAINT_MGR The"hier_write -forceset" deletes all existing constraints in CM) ?* g5 u: I2 ?. P
1184178 CONCEPT_HDL CONSTRAINT_MGR Ecset xnetmembers lost from electrical class when restore from definition of subblocks- O- h2 F) i1 U K$ i* r
1184682 CONCEPT_HDL CONSTRAINT_MGR Net Constraintnot transferring to layout from schematic
* D7 T% T' y- J$ L" m0 a1186152 ADW LRM Part Status forDeleted Part in LRM is distinguished with other part status! V$ `# r5 {* r- g( y v" O
1187196 CONCEPT_HDL CORE TOC notpopulating (page 1)
' [. K0 l3 {7 F1187667 F2B PACKAGERXL Existing hardLOCATION property in drawing was left unchanged
* o2 \; [( Q0 T5 w. K" `, ]1190144 ALLEGRO_EDITOR OTHER Fillet shape is not genrated aroundcline
) s/ c# _3 N h1190618 ALLEGRO_EDITOR GRAPHICS Enhancement for Visible grid
/ R1 n5 @7 J& m1 l! p! J8 M( C1190927 CONCEPT_HDL CORE Check sheet doesnot report shorted signal/power nets if power symbol is connected to a pin
! u3 ]7 ?9 `' x1191008 CONCEPT_HDL CORE Remove BinaryFile feature doesn't work |
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发表于 2013-10-29 17:15
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