|
EDA365欢迎您登录!
您需要 登录 才可以下载或查看,没有帐号?注册
x
http://pan.baidu.com/s/1kToiYV1
. q4 v& j; u+ n7 q; b5 \# q) C6 X( C/ O
3 e3 M7 d; Y. o( F Z) ~0 \1 K
DATE: 08-22-2014 HOTFIX VERSION: 034( M5 I9 ?# q2 O, o: W0 j
===================================================================================================================================
6 [6 d+ y7 X5 c& ~; CCCRID PRODUCT PRODUCTLEVEL2 TITLE e9 Z: e+ h9 z. O" O
===================================================================================================================================) y7 P- D) f. P3 d
932528 concept_HDL OTHER Ability to handle reusemodule in soft reuse blocks.5 h5 v: M& V7 w ~6 {# A* J
1137838 FSP GUI Ability to add notes to the canvas# q9 r# C( X& {8 |# J- Q: m) [8 |
1274382 allegro_EDITOR OTHER Retaining rats at the end of the clines or vias0 |* _6 f9 `! \4 U4 ^
1283575 FSP DE-HDL_SCHEMATIC Force Schegen to use symbols from released library
, H5 Q9 B/ w5 G5 \ _1296331 CONCEPT_HDL COMP_BROWSER CSV export no longer works properly from Component Browser6 e; d. A: T& b
1297855 F2B DESIGNSYNC ds -automode error
- J0 T' p+ f# \* } x1298028 CONCEPT_HDL CREFER CreferHDL crashes
+ h2 A$ v0 g. r' D1299607 SIG_INTEGRITY OTHER AutoModel should generate ESpice models for illegal values8 O+ A4 y9 \9 U. U F2 c* ]
1299609 CONCEPT_HDL OTHER AutoModel should make an ESpice model for a 3 pin Capacitor7 w- _( v- c% C7 N% v
1302013 ALLEGRO_EDITOR EDIT_ETCH AiBT Crashes Allegro for nets having T points4 @4 _# } K; o ]6 R
1302209 SPIF OTHER Can't Export to Router and create a Specctra file.
/ L; w4 ^6 T6 m: _. `1 a/ l1302242 F2B PACKAGERXL Packaging a hierarchical project does not create a full pstdmodeldat file3 ~$ O) A' _4 n( U6 |
1302285 SCM CONN_SERVER DSCS-120: Failed to open file <filename.xcon> in write mode
( u# z+ e2 J: Q. e h3 X2 i1302310 ALLEGRO_EDITOR INTERFACES Need way to have user defined license packages win over cadence products.
/ P8 m7 k$ ^0 a- n4 G4 `3 N3 s1302638 F2B PACKAGERXL Function swaps are not backannotated into the schematic8 O' a$ S$ m$ q* ?' T5 r- ^5 x: s% u4 u
1303170 SIP_LAYOUT DIE_STACK_EDITOR Using Die Properties to move a die to the bottom side causes some entities to disacociate from the part7 n+ S) C2 o/ Z% k; o( Y
1303214 CONCEPT_HDL CORE DEHDL crashes% k8 r' ?( n8 J5 y
1303219 ALLEGRO_EDITOR COLOR The user preference variable color_dlg_auto_apply changes the colors in the Display category8 p9 H* o' E# _0 _3 }' V% m
1303685 CONCEPT_HDL CORE DEHDL crashes when I save page 3. N. r+ N: l* P. {) ~
1303897 CONCEPT_HDL CORE Tool crashes intermittently when editing top-level schematic' _6 @( q: o( B9 }" Q, f7 Z3 ^
1304656 APD PLATING_BAR Add Plating Bar command convert the Clines having Arcs to 45 Degree segments, L0 S+ U2 q6 i
1306467 CONCEPT_HDL CORE Concepthdl crashes during model assignmnt
/ ~" f5 Y5 Z; p0 _( D0 L4 K& X2 J' U8 u6 F6 D
/ S- C- {- A! N. K. |1 ~. N% Z功能上的更新了 color_dlg_auto_apply 应用;勾选了此项后;设置颜色时不需要点击应用按钮了;显示很直观哦
7 m _7 y$ o9 m( D大家来试试吧1 q% i' |* Q% L% X- v+ G A1 U
不足之处就是出钻孔文件导入cam350时单位精度还是有问题的;特别是勾选了CAM350后比例更加有问题。1 w1 U/ H" J& U) f' p, f. ]- ]
|
|