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更新内容：6 k* ]- R# ^- o: e; v V9 \
DATE: 03-27-2015 HOTFIX VERSION: 046, j* f2 j8 X8 U: L: L
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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% [# g7 K4 \- y' ~: P' _1259541 SCM UI Cross probing function required between SCM and PCB Editor in 16.6
; G$ b' Q- s& [( {% O1281975 ADW LRM LRM reports numerous incorrect errors5 |+ G% L+ q E/ s
1317937 CONSTRAINT_MGR OTHER cmDiffUtility shows incorrect results, if the order of gate information does not match
# |) j. M7 e! I3 ^6 f: a4 M" S0 }" l1327533 SIP_LAYOUT REPORTS Metal Usage Report fails for a layer that has cavities in SiP Layout6 d S1 F/ w0 X. z
1338084 PSPICE SLPS Use as default option grayed out in SLPS product choices window
7 M+ v, m3 J& E: T, |! I& x1353369 SCM OTHER Required support for semicolon in a key property value in ASA5 a/ q! [; j- a# ?" X" L
1360269 SIP_LAYOUT REPORTS Getting incorrect results in the Metal Usage report of SiP Layout when the variable METAL_USAGE_REPORT_NOARCS is set
1 x$ Z$ D; J! P; m# t8 t1365435 CONSTRAINT_MGR OTHER The cmDiffUtility is not working with 16.6-s0414 E# a5 U: N: Y
1366012 CONSTRAINT_MGR CONCEPT_HDL Constraint Difference report shows NO_SHAPE_CONNECT property being deleted for all listed pins# A# L' k8 _# o5 [; @# `
1371959 ALLEGRO_EDITOR DATABASE Running dbdoctor generates the error "Illegal database pointer encountered, Exiting DBDOCTOR"& x8 Y) d d6 A& `
1373478 PSPICE SIMULATOR PSpice Schedule command does not work correctly
7 f9 q; o% B. Q" c- w* Z* a! K1373564 ASI_PI GUI Impedance results are incorrect in Power Feasibility Editor - Allegro Sigrity PI( I f- }6 @9 I% P2 Q
1379240 APD PLACEMENT Symbol placement generates a false error about unit differences between the database and the symbol! u: W3 a! L& g: B6 F2 }# h
1379577 SCM UI Cross probing not working between SCM and CDNSIP
% X V5 K$ j; W# ^+ @% V1394297 PCB_LIBRARIAN CORE Text height on a symbol pin is retained only when Part Developer is launched with the PCB_LIBRARIAN_EXPERT license; N4 n% X6 H n+ V) V7 L" W
1394908 ALLEGRO_EDITOR DATABASE Database crashes on choosing "Show Element" on selected nets in PCB Editor
3 P1 V1 W! Y2 H5 P' I1395234 SIP_LAYOUT DXF_IF DXF file exported from SiP is not recognized by AutoCAD
, ~9 k" `+ q& e+ T+ |% c1395541 ALLEGRO_EDITOR PLOTTING The Allegro PDF export function is not exporting phantom line type figures as they appear on the board
. O" s: H6 K& p2 V" G/ i( _1395747 CONSTRAINT_MGR INTERACTIV With Constraint Manager open, rename refdes causes PCB Editor to crash.
$ `/ F! N( M5 [% p; o: s K* |$ C1396138 FSP FPGA_SUPPORT Support required for FPGA device XCVU190-2FLGB2104E
' Y% g3 H/ l+ P5 ~1396915 APD STREAM_IF The stream out command with mirror geometry option does not include mirrored results in the generated output./ k: w* j0 I0 z6 v: V
1396990 FSP FPGA_SUPPORT Support required for FPGA device XC7A50T-L2CSG325E
8 {% Y* h; e7 }2 x) M1398184 ALLEGRO_EDITOR MANUFACT Mismatch in backdrill data with IPC-2581 export% p3 V/ Q7 `, B. @
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发表于 2015-3-29 20:20