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# d& T, \& D" ~+ u! QDATE: 03-27-2015 HOTFIX VERSION: 046
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CCRID PRODUCT PRODUCTLEVEL2 TITLE* E, N; q0 v: t
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- V# p: E5 \/ N6 q S. ^1259541 SCM UI Cross probing function required between SCM and PCB Editor in 16.6
, y7 u" X" x# i8 J1281975 ADW LRM LRM reports numerous incorrect errors" n) L, q" w% l& ^
1317937 CONSTRAINT_MGR OTHER cmDiffUtility shows incorrect results, if the order of gate information does not match
) Y2 y4 U1 u3 ^0 f0 P9 F1327533 SIP_LAYOUT REPORTS Metal Usage Report fails for a layer that has cavities in SiP Layout
$ ?$ J4 I& g0 \1338084 PSPICE SLPS Use as default option grayed out in SLPS product choices window
, M* S1 g' \6 Y4 a: H) E- ]2 s1353369 SCM OTHER Required support for semicolon in a key property value in ASA; K5 S: x/ ]3 d' Y2 j
1360269 SIP_LAYOUT REPORTS Getting incorrect results in the Metal Usage report of SiP Layout when the variable METAL_USAGE_REPORT_NOARCS is set
9 {4 N6 S6 W1 N; h1365435 CONSTRAINT_MGR OTHER The cmDiffUtility is not working with 16.6-s041
" Y1 V. x8 y. ^. z g# t1366012 CONSTRAINT_MGR CONCEPT_HDL Constraint Difference report shows NO_SHAPE_CONNECT property being deleted for all listed pins: C% s1 G9 d6 l8 F
1371959 ALLEGRO_EDITOR DATABASE Running dbdoctor generates the error "Illegal database pointer encountered, Exiting DBDOCTOR"
+ I/ ], s; n6 J" b0 e1373478 PSPICE SIMULATOR PSpice Schedule command does not work correctly9 x; |( T& s, l/ {0 ?
1373564 ASI_PI GUI Impedance results are incorrect in Power Feasibility Editor - Allegro Sigrity PI3 K( r3 f) p4 z9 \/ j: A0 F% v
1379240 APD PLACEMENT Symbol placement generates a false error about unit differences between the database and the symbol& N9 `) M% Y' Z9 b7 q
1379577 SCM UI Cross probing not working between SCM and CDNSIP
9 p/ ~( v! v6 L; i( _5 d" @% @' a! d1394297 PCB_LIBRARIAN CORE Text height on a symbol pin is retained only when Part Developer is launched with the PCB_LIBRARIAN_EXPERT license
: q K: y+ e% r( X) [2 `8 K1394908 ALLEGRO_EDITOR DATABASE Database crashes on choosing "Show Element" on selected nets in PCB Editor$ B) K( x5 K+ }9 B+ V
1395234 SIP_LAYOUT DXF_IF DXF file exported from SiP is not recognized by AutoCAD
; L8 G# m$ }! I& d; X6 o0 y1395541 ALLEGRO_EDITOR PLOTTING The Allegro PDF export function is not exporting phantom line type figures as they appear on the board
" z6 D) y0 Y% F/ |" d- Z+ ?1395747 CONSTRAINT_MGR INTERACTIV With Constraint Manager open, rename refdes causes PCB Editor to crash.* Z# p8 i& N' M- ?- ?# P/ D& R
1396138 FSP FPGA_SUPPORT Support required for FPGA device XCVU190-2FLGB2104E
7 |! `3 X8 e H' y( p1396915 APD STREAM_IF The stream out command with mirror geometry option does not include mirrored results in the generated output.
: \' }, R; ]+ u1 }9 ?1396990 FSP FPGA_SUPPORT Support required for FPGA device XC7A50T-L2CSG325E" I/ P8 \7 k& `
1398184 ALLEGRO_EDITOR MANUFACT Mismatch in backdrill data with IPC-2581 export
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发表于 2015-3-28 23:54
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发表于 2015-3-29 20:20