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本帖最后由 pzt648485640 于 2015-10-18 11:10 编辑 2 k8 Q9 i. z, M/ t
/ ?9 d% q! ^. Q7 V# }& F由于17.0作为过度版；固未做太多更新；应坛友需求所发
0 ^1 Z% D& C2 I$ y+ Y) m5 h0 L( BDATE: 09-04-2015 HOTFIX VERSION: 006
- m: {, h3 w5 J" R ^% G===================================================================================================================================
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. K3 S( k% E: P S( a1458272 SIP_LAYOUT ASSY_RULE_CHECK File size increases by factor 4 after ADRC check on a specific customer design
. Z# p: X% _, H" W z2 a: m/ q1460178 allegro_EDITOR INTERFACE_DESIGN PCB Editor crashes on deleting vias or nets
+ Z5 T; G& ?- o" A8 I. }9 ^5 w1461387 SIP_LAYOUT skill axlDBRefreshID(nil) removes ID from assigned variable6 }8 w7 V" k* B* B7 x4 ]
1461625 SIP_LAYOUT ASSY_RULE_CHECK Core polygon routines are not creating proper polygons; ADRCs reported: "acute angle", "exposed metal to exposed metal", R7 R5 n. {6 I1 I# Z) p, w
1464771 SIG_INTEGRITY OTHER Application crashes when extracting Diff Pair topology from Constraint Manager; X7 l5 l: k; \; f
8 r1 o f# K! ]8 }/ t7 k5 Ihttp://pan.baidu.com/s/1gdhBNzl) M' r, q8 {+ L0 `1 E
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直连SPB17.0; ]+ f, B1 p0 C( J: H$ D8 g
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发表于 2015-10-18 11:07
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淘帖
支持！
反对！
楼主
/ e9 ^& `5 a7 I G0 M
，果然来了
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