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本帖最后由 zgyzgy 于 2015-10-26 09:30 编辑
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DATE: 10-23-2015 HOTFIX VERSION: 060===================================================================================================================================CCRID PRODUCT PRODUCTLEVEL2 TITLE===================================================================================================================================1362349 allegro_EDITOR skill axlDBCopypadstack does not trim the padstack.1431971 F2B DESIGNVARI LRM should look at the alternate parts used in the Variant Editor1448734 CAPTURE NETLIST_ALLEGRO Netlister ignores the character limit specified in the PCB Editor Netlist setup1449554 SIP_LAYOUT WIREBOND Need the ability to spread only the wires/profiles that are visible on the Bond finger1469194 concept_HDL CORE Add SUBDESIGN_SUFFIX property value to block name in hierarchy viewer1470106 ALLEGRO_EDITOR MANUFACT silkscreen program cuts auto-silkscreen lines excessively1471287 CONCEPT_HDL CONSTRAINT_MGR Importing pages from other designs with different units should inherit the source constraint units1472220 ALLEGRO_EDITOR EXTRACT DXF Out adds extra arcs in 16.6 version1473900 CONCEPT_HDL CORE DE-HDL stops responding when a hierarchical block with variants defined inside the reuse block is enabled1475650 ALLEGRO_EDITOR OTHER Using Outlines - Room Outline gives WARNING (axlRemoveNet): No match for subclass name - 'BOARD GEOMETRY/__EPB_SCRATCH_'1477369 CONCEPT_HDL INTERFACE_DESIGN A significant number of problems are reported when running genview with port groups1478680 CONCEPT_HDL CORE Unable to move components in a schematic using the arrow keys1479135 F2B PACKAGERXL Hierarchical design reports conflicts when signal names change through the hierarchy1479153 CONCEPT_HDL CORE File - Save Hierarchy flags an error and does not update subdesign xcon1479569 PCB_LIBRARIAN OTHER hlibftb fails with error SPCOPK-10531479875 ALLEGRO_EDITOR OTHER Difference seen in the board and its PDF when design contains padstack without copper1480499 ALLEGRO_EDITOR PARTITION Cannot delete partition1481740 CONSTRAINT_MGR ECS_APPLY ECSet is not mapping correctly in the layout tool, but works fine in DE-HDL1482187 CONSTRAINT_MGR OTHER cmDiffUtility - comparison results are neither accurate nor consistent1483617 ALLEGRO_EDITOR DATABASE Delete islands command crashes database with filled rectangles1484066 ALLEGRO_EDITOR OTHER Lines with a width of 0.1 mils not printing, though present in the PDF1484100 SIP_LAYOUT INTERACTIVE Tool crashes when copying and rotating a symbol1485268 SIP_LAYOUT OTHER Shape->Create Bounding Shape enhancement request1485773 SIP_LAYOUT WIREBOND Wirebond report has wrong values in case of non-standard wirebonds1486378 ALLEGRO_EDITOR PARTITION Unable to delete orphan partition as it is not listed in workflow manager.1486528 APD SYMBOL Unable to delete a large Die symbol in SPB 16.60.0581488753 CONCEPT_HDL CORE Import sheets in a design with no change in models: CM_VALIDATION_ON_SAVE variable is triggered
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发表于 2015-10-26 08:34
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