找回密码
 注册
关于网站域名变更的通知
查看: 1874|回复: 2
打印 上一主题 下一主题

PDS

[复制链接]

该用户从未签到

跳转到指定楼层
1#
发表于 2007-12-28 17:23 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

EDA365欢迎您登录!

您需要 登录 才可以下载或查看,没有帐号?注册

x
PCB Stackup and Layer Order中:' V4 o# g4 c: X* j/ A/ j
Power supplies with high transient current should have their associated VCC planes close to the
! U$ V+ S* @  N0 {( a: itop suRFace (FPGA side) of the PCB stackup to decrease the distance in the vertical direction
$ p  x# v* n1 A. s4 Y2 R6 Vthat currents travel through VCC and GND vias before reaching the associated VCC and GND! c/ Z: l. Q8 Y# C/ d5 o0 f" j2 @
planes. As mentioned in the previous section, every VCC plane should have a GND plane
5 `6 u! a4 Y6 t. F9 L" o7 Cadjacent to it in the stackup to reduce spreading inductance. Since high-frequency currents
" N& [8 Z  r& V" u+ J* pcouple tightly due to skin effect, the GND plane adjacent to a given VCC plane tends to carry the0 r/ l3 R2 Y! H
majority of the current complementary to that in the VCC plane. For this reason, adjacent VCC
7 H1 M! K1 T( Qand GND planes are considered as a pair.

& H! ~7 x+ k$ Q; g這裡面,說的VCC,GND層到底所何放置?8 g2 [& `+ i  k3 G. e& I0 x% R
謝謝!
alooha 该用户已被删除
2#
发表于 2007-12-29 09:55 | 只看该作者
提示: 作者被禁止或删除 内容自动屏蔽
liujie123 该用户已被删除
3#
发表于 2007-12-29 11:28 | 只看该作者
提示: 作者被禁止或删除 内容自动屏蔽
您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

推荐内容上一条 /1 下一条

EDA365公众号

关于我们|手机版|EDA365电子论坛网 ( 粤ICP备18020198号-1 )

GMT+8, 2025-10-27 10:02 , Processed in 0.156250 second(s), 25 queries , Gzip On.

深圳市墨知创新科技有限公司

地址:深圳市南山区科技生态园2栋A座805 电话:19926409050

快速回复 返回顶部 返回列表