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本帖最后由 i4dm99 于 2018-10-24 10:05 编辑
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: N9 C- y! p0 k3 F% |1 ?7 i感谢分享，能共享一下都更新了哪些内容吗# s7 t4 G* j. i" c0 z
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8 {( M% ~4 [3 q0 d**************************************************************
) {# E$ M- W3 D4 `6 T" `. ~Fixed CCRs: SPB 17.2 HF0482 t; }1 c8 v6 K; j$ @
10-13-2018
3 ~8 W9 z; [( f v3 S, r========================================================================================================================================================
# K$ l" v! V: X. lCCRID Product ProductLevel2 Title6 {1 x; F: a k7 W1 e; k& u7 b0 R% h
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1913039 ADW ADWSERVER EDM Library Server exits with error message on starting library server service
8 v) o" c$ E7 C4 c1709155 ADW COMPONENT_BRO Search query does not search for all the parts in the library
$ g: ^( Z* } n% t5 p7 u1827231 ADW COMPONENT_BRO Clicking the 'a' key in Part Manager launched from DE-HDL crashes DE-HDL7 N$ ]$ M! i9 A- N- k8 [9 g* F
1903818 ADW COMPONENT_BRO Parts that have comment_body do not display version" {9 f* }! Q6 R; c3 o
1917961 ADW COMPONENT_BRO Component Browser PPL column values are truncated when selecting the top '*' filter
1 {4 l" X' e1 a1 l1938172 ADW COMPONENT_BRO Symbol version with COMMENT_BODY set to TRUE cannot be instantiated
; I: { X7 E/ p+ w# b; L9 V- @% p1914103 ADW CONF conf creates incorrect path in fetch_dump.ini when MLR is enabled.
, [( W& P5 p& y: I% m1911422 ADW DBADMIN RuleP101 - PACK_TYPE check against schematic model not working
, b( K9 b9 P: C5 ]4 y$ E2 ]1926691 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors* t! z% w+ @6 Y, O
1926694 ADW DBEDITOR Renaming a classification and then renaming it back to the original results in error$ F. D5 c- S$ @, Q, e2 T
1934870 ADW DBEDITOR Adding a new classification and immediately trying to delete it results in errors0 k" W/ m2 y$ J6 ]: d1 |4 s6 u; r; k
1872387 ADW DSN_MIGRATION Design Migration does not cache all used parts into flatlib/part_table.ptf
/ Q3 w7 K8 R* \- r: ?1254292 ADW FLOW_MGR Flow Manager Open Last Project should open last project closed, ?3 |9 \6 H' x# J0 K' n$ r+ c
1281817 ADW FLOW_MGR '-proj' switch in 'pcbdw_fm' does not work; launches Flow Manager without loading any project
9 N! h3 Y4 U i$ l( \+ `1727286 ADW FLOW_MGR Product options for PCB SI and Power Integrity are incorrect in the flow and tool launchers/ w6 w; n( P. j% H4 T8 g6 Y- W; v: Y( ^
1875498 ADW FLOW_MGR EDM fails to open or becomes unresponsive.2 }, p& S- K- {6 a: w( d
1879386 ADW FLOW_MGR Unable to access COS with the default Firefox version in the 17.2 installation. ?( m4 }( l7 J6 [9 q
1922541 ADW FLOW_MGR Warning message for unavailability of Java version appears on opening a project on Linux$ S) T9 ^; S$ O% n0 j \
1945451 ADW FLOW_MGR Checklist does not work with two-byte characters# f$ w b$ i) n) a- @
1956213 ADW FLOW_MGR Not able to invoke Flow Manager on the remote system6 W! w a) H' |' K- M- j
1892285 ADW LIBDISTRIBUTI Symbol not consistently available in 16.6 ADW Library1 w* o- V$ Z: S2 I' r n- r7 ]$ @( _
1961731 ADW LIBIMPORT libimport fails to create tar for two Capture models
- ]2 L" G/ E! Z+ V1836620 ADW LRM Library Revision Manager crashes on clicking Help, v3 M, b; z% n; U/ ~ }
1961845 ADW PART_BROWSER Error regarding environment variable5 L5 O' ^/ _* u. v
1890782 ADW TDA Launching TDO dashboard connected to PLM returns a license error: Q+ H: f8 X2 c% c1 G5 c* k
1980914 ADW TDA Cannot start Design Entry HDL and Component Browser in a TDO design
' U7 q, m; o5 u7 o1 ]- l: x1833750 ALLEGRO_EDITOR 3D_CANVAS Soldermask Text is not shown in 3D Canvas4 u' h* }1 G% N
1891230 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas Viewer not bending PCB with proper radius+ M: B8 \: [0 H. v* x" g, ~& b
1913338 ALLEGRO_EDITOR 3D_CANVAS STEP models missing from exported .stp file7 [) ?; ^* t6 g( G0 B
1927507 ALLEGRO_EDITOR 3D_CANVAS Get Error: All bend operations are disabled due to licensing and/or DLL installation issues on invoking 3D Canvas X8 p6 j; R2 t! H, n8 `% C
1931508 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas
4 g6 d f4 n( {$ m% U" F5 C1943060 ALLEGRO_EDITOR 3D_CANVAS Placebound bottom is not showing correctly.& v' K/ ?/ F9 V$ ]
1950099 ALLEGRO_EDITOR 3D_CANVAS Place Bound Bottom is displayed on Top, when dra is opened in 3D Canvas$ Z- j4 a$ `: U u$ ~3 Y' ]
1988307 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation9 H# R0 h% r# {0 r
1923585 ALLEGRO_EDITOR ARTWORK Additional unwanted subclasses appear in film control when a new film definition is added
" {6 x& L" Y, \% @3 ]* K1944079 ALLEGRO_EDITOR COLOR Export of Board Parameters (Net Colors) does not contain entries for nets with spaces
% o6 f4 L7 [+ L* Z0 `' p F, a" w2 ^1856320 ALLEGRO_EDITOR DATABASE Donut pad fails to connect with cross-hatched shape in full contact thermal mode, despite hatch overlap of donut.8 i% T% q6 z! q
1912313 ALLEGRO_EDITOR DATABASE Database corrupted during background process
, b8 r8 V) j+ {) L' x1913344 ALLEGRO_EDITOR DATABASE When changing accuracy of design, the thermal relief for donut pad's outer pad connects to inner pad
/ w9 G: L& ^: U- _. B1914470 ALLEGRO_EDITOR DATABASE Release 17.2-2016: export libraries command does not inherit posi/nega information X7 p9 s1 J# N z- |. `
1932086 ALLEGRO_EDITOR DATABASE Unable to resolve DBDoctor error
: {( I/ [; B2 m ~0 d6 B1963932 ALLEGRO_EDITOR DATABASE DB Doctor is not recognizing placed parts and showing them as unplaced., @4 F% D6 u) `% _( O' N
1987735 ALLEGRO_EDITOR DATABASE Interior sub-lamination backdrill holes are displayed with Top Soldermask pads where backdrill does not exist/ S; {7 M. a" G( H- a. ] O0 y
1977622 ALLEGRO_EDITOR DFM Not able to add value '5' or multiples of 5 in in DFF constraints for maximum stacked via count @( I: ?9 E9 q, L
1892809 ALLEGRO_EDITOR DRC_CONSTR NODRC_ETCH_OUTSIDE_KEEPIN property is not working on TEXT
. o i2 o6 T \; B7 P1894765 ALLEGRO_EDITOR DRC_CONSTR DRC for no_drc_component_board_overlap is not created if the place bound is outside Place Keepin2 E. d6 ~! A i; A4 H$ q
1896627 ALLEGRO_EDITOR DRC_CONSTR Moving components takes long time while doing placement: c$ n6 w9 f$ C: U% J$ q9 R) j
1914591 ALLEGRO_EDITOR DRC_CONSTR Spacing constraints for Mechanical to Hole shows resolved constraints different from the actual air-gap/space
+ x0 c5 d& B7 a; W1956468 ALLEGRO_EDITOR DRC_CONSTR DRC getting generated while moving the uvia and getting removed after updating DRC.
# W8 [/ F4 N1 d! }# V& M5 C1884149 ALLEGRO_EDITOR EDIT_ETCH Arced Routing of differential pair creates unexpected arc radii
* z3 b8 }7 h$ R0 i/ e2 w4 U1891985 ALLEGRO_EDITOR EDIT_ETCH Etch edit does not follow the constraints
% |: C) U' V% X& t+ I& n' }1860056 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on right-click after choosing the Move command& ^- f2 r% J* G' \
1860723 ALLEGRO_EDITOR GRAPHICS APD crashes on right-click when using the Move command
' q% G9 P; S1 {& p- y( `8 [1870058 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes when using Place Manual -H command+ b9 r- c4 a. o j
1930282 ALLEGRO_EDITOR GRAPHICS PCB Editor crashes on executing axlVisibleDesign(nil) from allegro.ilinit
; k3 P5 R6 _; Z1 N( }1882813 ALLEGRO_EDITOR INTERACTIV Unable to set the end point with 'snap pick to' when adding an arc
2 [9 \2 @, d) l1 T) W8 k: R1884725 ALLEGRO_EDITOR INTERACTIV Edit and Move vertex operation not working as desired: v7 u2 q/ {& F7 Y
1902359 ALLEGRO_EDITOR INTERACTIV Connector boundary remains ON for a layer if visibility toggles in Shape Edit application mode3 h2 a" K t0 E( S
1909004 ALLEGRO_EDITOR INTERACTIV Parameter description showing wrong for Padless Holes under Design Parameter Editor
9 Q# ?5 b9 E# e1 B4 C1912055 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on Delete By Query - AutoSilkscreen - Find By Query' W3 p4 X/ Q6 P2 a+ j! l
1924503 ALLEGRO_EDITOR INTERACTIV Editing shape causes PCB Editor to crash% V2 f, T+ S) q3 H" Y# g
1929614 ALLEGRO_EDITOR INTERACTIV Unable to Place Via Array when Staggered ring is selected in Global Ring Parameters.
/ X- z1 m# ^" e; Y; m9 B1938523 ALLEGRO_EDITOR INTERACTIV Change Shape Type message is same for dynamic and static shapes" H2 Z' B" }, Z/ a& W8 R
1940827 ALLEGRO_EDITOR INTERACTIV Irrelevant/incorrect warning message when doing Edit- Change on Clines. `- [9 S. T& R5 d& A9 {
1872653 ALLEGRO_EDITOR INTERFACES DXF export shows embedded layers in the layer configuration file
5 ^4 ~: S0 a+ K0 g3 p* N4 t1873971 ALLEGRO_EDITOR INTERFACES IDX proposal comments are not shown when importing the IDX file into Allegro# Z$ j0 Q: L8 [/ ^5 b
1892172 ALLEGRO_EDITOR INTERFACES STEP Package Mapping form needs to be larger
' ?( E! P6 }+ p: W1893311 ALLEGRO_EDITOR INTERFACES A line became two lines after import dxf1 p( N# ]5 X- U' P$ N& L x
1937816 ALLEGRO_EDITOR INTERFACES Unit as % in Property Definition not supported by SubDrawing/ E- O, W1 p; z
1973084 ALLEGRO_EDITOR INTERFACES Physical library not placed if design and IDF database not matched while running
% k1 s# S) T8 F" X1987526 ALLEGRO_EDITOR INTERFACES IDX import Fails to recognize SURFACE FINISHES Class0 v- z) S9 r1 z6 r* @- B
1872856 ALLEGRO_EDITOR IN_DESIGN_ANA Message displayed when creating directed groups needs to be improved
- a0 X1 I5 o6 u2 K- ]3 x1900832 ALLEGRO_EDITOR IN_DESIGN_ANA RTP: Return Path DRC does not check circle void correctly
+ c; m0 S* v+ I S5 s4 q% l+ Q+ H1935641 ALLEGRO_EDITOR IN_DESIGN_ANA Return path DRC crashes PCB Editor
* \7 L1 w( c* K: }9 |1 f, v1649465 ALLEGRO_EDITOR MANUFACT Manufacturing options are not visible in OrCAD PCB Designer legacy menu
. n8 B! t. t% M1873417 ALLEGRO_EDITOR MANUFACT Autosilk fails to add line information. Only part of the line is getting copied to the autosilk layer.
0 ?; t8 @% p* r3 Y5 }. C, L1911596 ALLEGRO_EDITOR MANUFACT Documentation Editor drill chart shows two different rows for the same slot.
: A. c+ d0 y* L9 j: P2 ]2 I8 E1937721 ALLEGRO_EDITOR MANUFACT Drill figure character scaled up in GERBER' V4 P1 x6 i' F; y$ F# i' q
1957768 ALLEGRO_EDITOR MANUFACT Import IPC2581 on cross-section does not import line width and impedance8 G: \) K+ U; b
1969363 ALLEGRO_EDITOR MANUFACT Pressfit connector backdrill depth is considering MNC Layer6 T' W0 G* H0 Z i" o8 z' g
1891102 ALLEGRO_EDITOR MULTI_USER Rejected by server error messages when using Symphony Team Design
: t9 N6 b9 O y; ]! P1928082 ALLEGRO_EDITOR MULTI_USER Unknown SubClass BOUNDARY/MULTI_USER_LOCK automatically added when defining Artwork Output.
, N1 g: {3 I" Y. d j ~1976705 ALLEGRO_EDITOR MULTI_USER Symphony client disconnects from server without any notification - despite ping mechanism
% g. a2 [) Z' ?3 _1972554 ALLEGRO_EDITOR NC Mill symbol moved from Nclegend-slots-1-2 to Nclegend-1-2 subclass if nc_param.txt not present! y! D& [, I8 `- b4 X1 T
1914412 ALLEGRO_EDITOR OTHER Autosilk lines do not clear padstacks that are not rectangular; @ C+ X& F7 p1 M3 E
1921933 ALLEGRO_EDITOR PAD_EDITOR column clearance cannot reset to 0 in padstack editor
3 P9 i$ w! }8 O; ^/ Z9 x1922234 ALLEGRO_EDITOR PAD_EDITOR DBDoctor reports 'illegal value for pad' and does not fix when zero corner radius for Rounded Rectangle is defined2 x7 }3 L1 Q& Q! C4 I
1932183 ALLEGRO_EDITOR PAD_EDITOR Drill Symbol information not exported in Padstack XML if Drill Figure in none# h, w0 ~& x7 A4 Z% ]. z, }' @% Z
1934880 ALLEGRO_EDITOR PAD_EDITOR Shapes with offsets not displaying properly in Padstack Editor views3 d: D8 V4 b' j M- k
1813270 ALLEGRO_EDITOR PLACEMENT When a place replicate module is updated, the vias used in thermal pad are removed
5 S4 U$ q8 j, M+ `1840275 ALLEGRO_EDITOR PLACEMENT Placing component with the Mirror option causing display problems
! v, F/ j1 E) `/ V' f/ z% s1854099 ALLEGRO_EDITOR PLACEMENT Align components to zero spacing causing mirrored components to overlap
2 U8 w2 f% r+ L) H3 s! w1854696 ALLEGRO_EDITOR PLACEMENT Pins shown incorrectly when the Alt Symbol and Mirror commands used consecutively
1 p2 C+ Y7 j N1 N: T9 \8 D% b* r1 f1862863 ALLEGRO_EDITOR PLACEMENT Too many messages in the command window when symbol does not support mirroring
# t; Y/ f4 n$ @6 }0 \6 d" ~* {1909857 ALLEGRO_EDITOR PLACEMENT Using Mirror with Alt Symbol placement displays incorrect graphics6 R' O# K: x2 P. M* q$ V
1917128 ALLEGRO_EDITOR PLACEMENT Place - Autoplace - Room when all the components of the room are placed on board causing crash
; J% _ c( c( J7 Z1925144 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding on using the Autoplace - Room command
" L, W5 \; |7 l4 Z+ w1961509 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes on choosing Place - Autoplace -Room
& z& g, v6 I- A2 Y2 [) i; [1930669 ALLEGRO_EDITOR REPORTS Net 'VSS' not included in the Etch Length By Pin Pair Report
8 O' m0 {5 o/ F! \, v8 ~0 V1982934 ALLEGRO_EDITOR SCRIPTS PCB Editor stops responding if Generate button is used to create script from journal file
% g. O: s% y" H, F, [6 [1 H1337346 ALLEGRO_EDITOR SHAPE Shape Check is generating problem point errors that seem unnecessary9 }/ R, }* K2 Z1 t( s
1396692 ALLEGRO_EDITOR SHAPE Zcopy with expansion not following board outline5 X. z' s! Y+ E2 M0 ]& o3 t
1902001 ALLEGRO_EDITOR SHAPE Shape behaving differently across hotfixes# L2 ?4 O4 m- \, [* u* |% j
1921287 ALLEGRO_EDITOR SHAPE 3D canvas is showing some stray objects( J$ n8 `$ ~. E
1936482 ALLEGRO_EDITOR SHAPE Option for Fillet to not obey NO_SHAPE_CONNECT Property" m* [6 b/ D- x& l
1943899 ALLEGRO_EDITOR SHAPE Only one Shape to Route Keep In DRC in release 17.2-2016 compared to two in release 16.6
% R3 I( ^( ~) B1944041 ALLEGRO_EDITOR SHAPE shape_rki_autoclip makes shape voiding incorrect% p2 Y0 W. u3 L- S3 d6 V. c6 d
1947675 ALLEGRO_EDITOR SHAPE Shape void error when dv_squarecorners is enabled- }, B* F/ J7 \
1949250 ALLEGRO_EDITOR SHAPE Shapes are filled even after raising and lowering priority) `* ^- @' {( ]
1984526 ALLEGRO_EDITOR SHAPE Same net shape voided is inconsistent with respect to vias: o! g; V7 Y* l
1984955 ALLEGRO_EDITOR SHAPE Dynamic shape creating same net spacing drcs.
# A0 V2 V! `+ r' {+ H6 @1839147 ALLEGRO_EDITOR SKILL axlDBGetLength() reports that the segments of a filled rectangle shape are invalid database ID arguments; n' p1 Z: B) D7 J0 U
1882776 ALLEGRO_EDITOR SKILL SKILL documentation for axlIsBetween() is wrong
A, Q# U i T& n" {' |4 R1882882 ALLEGRO_EDITOR SKILL Example for axlMathConstants needs correction in Allegro SKILL Reference
9 \' J3 b Y, ^* ~+ t2 C1902712 ALLEGRO_EDITOR SKILL axlAltSymbolReplace moves symbol to the top of design while replacing
* N9 S. m3 b& T( y1 ~5 [; s- O) X& N1906329 ALLEGRO_EDITOR SYMBOL Mechanical Pin to Conductor property set on a pin in a symbol does not pass to the board
1 W% S9 }/ [' R- m. J1911343 ALLEGRO_EDITOR UI_FORMS Global Visibility not turning all layers off
" ~% y" T H) }' R* @1985584 ALLEGRO_EDITOR UI_FORMS Import logic changes the Current Working Directory" z3 S, b- H w' n6 r& K+ n
1987829 ALLEGRO_EDITOR UI_FORMS Import logic changes the current working directory
+ V- o) ~2 \* q/ z$ N1992722 ALLEGRO_EDITOR UI_FORMS After netlist import process, the board file is changing its current path) b6 W9 T$ O0 B' ]8 l
1697506 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
/ A+ C5 t( A, j' v# r# y# R: e1702631 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not list correct net name for nets in a bus' N! k) X; Y( |! ]8 r) E! ]5 P. g% X
1703105 ALLEGRO_EDITOR UI_GENERAL Bus net names are incorrect in reports when using the allegro_html_qt variable# P$ Q% z+ ?# R D
1770786 ALLEGRO_EDITOR UI_GENERAL Stroke Editor working in OrCAD PCB Editor of release 16.6 does not work in release 17.2-2016
7 F t7 I+ z3 B5 p! d Y; x# G1784938 ALLEGRO_EDITOR UI_GENERAL Etch Length by Net report does not show net names with angle brackets in release 17.2-20167 O( j+ q: U" U9 p; I
1822557 ALLEGRO_EDITOR UI_GENERAL axlUIWCloseAll is not closing text window in release 17.2-20165 _% [3 k/ e0 @% t% E1 ~& a5 b
1836400 ALLEGRO_EDITOR UI_GENERAL Net names are truncated in HTML reports' b0 H0 R* v% Z
1869879 ALLEGRO_EDITOR UI_GENERAL Links not working in the Net loop report7 I. I% I% C2 w3 _; x7 ^
1895878 ALLEGRO_EDITOR UI_GENERAL axlUIWClose()/axlUIWCloseAll() functions do not work when allegro_html_qt setting is enabled.
$ @5 u. D) w0 x- k1912282 ALLEGRO_EDITOR UI_GENERAL PCB Editor exits with error message on editing objects
% p) @- B4 R, b8 \1913962 ALLEGRO_EDITOR UI_GENERAL PCB Editor toolbars change on choosing View - UI Settings - Save Settings and then restarting
" `! c0 Z8 ^# @7 \1933172 APD UI_GENERAL Cannot paste text into the command prompt without clicking when 'enable_command_window_history' is set3 m) `9 ~6 \. q. V& o" {
1843712 CAPTURE NETGROUPS Signals shown only for first segment of NetGroup+ q5 q% W* V0 y* I3 m
1917768 CAPTURE NEW_SYM_EDITO Missing package pin overview in Symbol editor+ I: d4 S- q# E, {+ j' z: u" T
1920088 CAPTURE NEW_SYM_EDITO Package view missing in the new Symbol Editor
/ Y; K* ^$ t9 q1922196 CAPTURE NEW_SYM_EDITO Snap to grid issue in Symbol editor
( c- Y/ ^7 \' f3 e( S0 {2 O9 h1927268 CAPTURE NEW_SYM_EDITO View Package is grayed out in release 17.2-2016, hotfix 038 and later versions7 a% K6 U: r/ N' u
1928012 CAPTURE NEW_SYM_EDITO In new Symbol Editor, View - Package is grayed out- K) Q9 a3 F) {( z3 D. |. b9 v& g/ p
1930865 CAPTURE NEW_SYM_EDITO View Package missing in hotfix 038: i% k0 D1 Q" E1 f/ i7 j" A
1938507 CAPTURE NEW_SYM_EDITO Issues with new Symbol Editor: Justification and spreadsheet usability
$ n: i, i/ n5 e; }1 B3 K2 l3 C1940869 CAPTURE NEW_SYM_EDITO Missing pins in 'Edit Pins of All Section' table view for 4k resolution but not in 2k resolution4 h; ?2 R4 C3 k8 J- \
1940888 CAPTURE NEW_SYM_EDITO Copying pins from a part and pasting on different parts not working properly.8 b4 C _, h, F' o$ x( A
1942994 CAPTURE NEW_SYM_EDITO Cut / Paste of object in New Part / Symbol editor always pastes on grid4 r) U$ J# m0 G
1944396 CAPTURE NEW_SYM_EDITO JavaScript error while copying from 'Edit Pins of All Sections'# ~; P+ \* t* S8 \" h7 ~8 L
1950224 CAPTURE NEW_SYM_EDITO Cyrillic alphabets are not displayed properly on Schematic.
1 g: i& n8 c4 l& j) F( M6 p1951369 CAPTURE NEW_SYM_EDITO Cancel closes Symbol Editor; }9 g; B/ \0 |, I$ p2 r* t3 T. q
1966785 CAPTURE NEW_SYM_EDITO Edit Part is grayed out
; N5 d1 N, l9 u8 d- k, }1973135 CAPTURE NEW_SYM_EDITO Issue with new Symbol Editor: cannot copy-paste pins% D+ {' F% {' H4 H' o/ z% y4 ?
1973344 CAPTURE NEW_SYM_EDITO JavaScript error on opening part from design
( i2 [$ l* Y7 `1974122 CAPTURE NEW_SYM_EDITO Cannot copy-paste all pin list on the new Symbol Editor0 i) P5 K% K0 p2 F: W& B m
1983593 CAPTURE NEW_SYM_EDITO Script error on copying and pasting to property sheet3 m# Y- L9 a7 w3 E: b* j
1929692 CAPTURE OPTIONS PACK_SHORT issues with Pin Numbers that contain letters/alphabets
8 k4 ]) _' f$ s; R8 w$ p9 l, V4 J1876939 CAPTURE OTHER Incorrect Capture renaming error (ORCAP-1310)1 r+ `; K+ k; [$ h D" H5 _
1916090 CAPTURE OTHER Incorrect error message when 'save as' fails due to long directory path
" |' R1 P# @7 [$ j1921927 CAPTURE OTHER Two functions are mapped to Shift + R in OrCAD Capture in hotfix 038
1 h3 [2 ?( ^7 l( o0 s1946453 CAPTURE OTHER Shift+R shortcut is assigned to two functions.
6 ^4 t+ Q5 Y+ z0 @1965456 CAPTURE OTHER Shortcut Shift + R is not opening the Independent Sources dialog box/ `% b( {( P6 l& n
1968757 CAPTURE OTHER Close CIP is grayed when right-clicking on the tab in Capture.- W$ z2 O$ a! H, x- N* ]
1938437 CAPTURE PART_EDITOR OrCAD Capture new Symbol Editor Pin Type missing in table
. ], L5 N# m: z2 ^5 M" s$ k1906757 CAPTURE SCHEMATICS Intersheet reference is overlapping with the offpage connector name0 m L& m4 m5 |0 l% X' p
1867016 CAPTURE SCHEMATIC_EDI Part placeholders not being positioned when moved
9 x& S( a- L" f1932837 CAPTURE SCHEMATIC_EDI Parameters graphics are not correctly positioned' }- i7 \. r1 d
1949518 CAPTURE SCHEMATIC_EDI Getting error when comparing designs
: p9 L) Q" e! |1967545 CAPTURE SCHEMATIC_EDI Only section A of heterogeneous part being placed and not sections B, C, or D- B1 V3 n" C, G) `6 P5 Q
1933919 CIS DBC_CFG_WIZAR New CIS Configuration .dbc file created in release 17.2-2016 shows release 16.3
& R: a' H! j: C t7 w1932550 CIS RELATIONAL_DB VIEW NAME in Relational Database configuration is not working as expected.
7 W/ o' y1 ^7 J! T2 b' d1832524 CONCEPT_HDL CHECKPLUS Default checkplus rules show body height of 0 (sym_2 of the attached cell). This causes the cell to fail verification.
1 [0 u- i" u$ S% c5 b/ h$ e6 r% ?& N# l1912023 CONCEPT_HDL CHECKPLUS signalWidth predicate does not recognize SIG[1..0] as bus.
0 `) Y% S% W& [- k1966120 CONCEPT_HDL COPY_PROJECT Copying release 17.2-2016 project results in message stating the project is of an older version
4 H/ G+ V; A0 S- b& P5 w' _1 J) G# [1879425 CONCEPT_HDL CORE Adding signals with the right-click menu is not following the defined color scheme
& I* ], a+ m+ G0 M2 M5 ~7 x1890542 CONCEPT_HDL CORE Getting ERROR(SPCOCN-1911) when running export physical with backannotation# a# {# v0 y' H7 s
1907684 CONCEPT_HDL CORE Moving symbol makes canvas unresponsive for a long time
+ @( [% N( z1 Y& ^- K" c2 |- L! |" j1920711 CONCEPT_HDL CORE Pin names changes when mirroring the swapped section.9 Y; h% D6 w p' \% A: b
1931421 CONCEPT_HDL CORE On Linux, 'cpmaccess -read' returns incorrect value" M) z( D+ I. G% A
1931782 CONCEPT_HDL CORE Setting DONT_FORCE_ORIGIN_ONGRID to ON does not work for sig_name
9 D) s& T# C, n/ U6 x5 \1932433 CONCEPT_HDL CORE _movetogrid causes signal disconnection4 C9 N0 Q& ~* A+ z: U1 H! }2 }
1946993 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic if new KEY properties exist in PTF but not in schematic
/ m) F% i" p* W6 }4 P1947029 CONCEPT_HDL CORE Design Entry HDL Font Support not working for signal rename8 F/ R3 c1 G' f4 e, k" D
1962865 CONCEPT_HDL CORE Schematic symbol creation with '-' as pin name not packaging
8 P4 l# c; h" b; a/ Q. C$ ?1966805 CONCEPT_HDL CORE Issues with packaging design containing cells named with a leading underscore8 ]: u* l/ p7 T5 w L- p! `1 k0 o
1967760 CONCEPT_HDL CORE DE-HDL crashes on moving Net Group/Port in release 17.2-2016, hotfix 044
S' T0 S- D7 e% o6 n+ @1968282 CONCEPT_HDL CORE DE-HDL Part Manager fails to update parts on schematic when new KEY properties exist in PTF and not in schematic
5 v7 M( z. [% P) r" ]1972815 CONCEPT_HDL CORE Part Manager not updating missing key attributes from the ptf file by using 'Update instances' option3 E" |5 M* ]. w `6 A
1887790 CONCEPT_HDL CREFER CRefer links not working in selected cpm file
6 |/ C3 w: E/ Q1898535 CONCEPT_HDL INTERFACE_DES Global Navigation window does not reflect removal of a net on page2 that is part of a netgroup on page1* [" k. Q! e2 o b
1888048 CONCEPT_HDL PDF Japanese characters are not output correctly to PDF on Linux.
5 `) x" Z+ ?6 W2 T7 K- L1937505 CONCEPT_HDL PDF Missing intersection dot in schematic PDF
( K5 `+ s a5 r1942486 CONSTRAINT_MGR CONCEPT_HDL CM crashes when you save after importing a TCF file3 K& f) E, m2 R
1983743 CONSTRAINT_MGR CONCEPT_HDL Region Class-Class members are being duplicated in CM in the current session1 ~9 S" J7 G5 r x7 a2 B- F. Q
1906573 CONSTRAINT_MGR ECS_APPLY Database corrupt and DBDoctor reports illegal database pointer error+ a! L8 @8 j, ^$ H7 ~) }
1913805 CONSTRAINT_MGR OTHER Setting environmental variable CM_PARTIAL_DCF in release 17.2-2016 causing crash
" x/ K4 x3 l+ _5 p1914813 CONSTRAINT_MGR OTHER C++ Runtime error and non-recoverable crash in class-class worksheet
: o. T0 |: I L9 u0 @1920142 CONSTRAINT_MGR OTHER Xnet names are not consistent in the design& Z' b4 s+ w2 B# a. H8 r3 V8 p0 l$ r
1898549 CONSTRAINT_MGR SCHEM_FTB Importing netlist causing crash in release 17.2-2016, hotfix 036, h6 f) M7 C9 U& Y. M! ~
1814851 CONSTRAINT_MGR UI_FORMS Field solver /DRC check running forever @4 O& R, T, V/ J3 e
1889862 CONSTRAINT_MGR UI_FORMS PCB Editor hangs while assigning net voltages in CM% {: `4 g' r) i, K D; f4 P* @) m- n
1965470 CONSTRAINT_MGR UI_FORMS Constraint Manager GUI Issue in release 17.2-2016, hotfix 039: Font size small and rows/columns in shrink mode
3 a! _+ F6 ~" a F1945406 ECW ADMINISTRATIO Tree view was not refreshed soon after changing the site permission.
& z: `9 L: r% b0 Q3 ^# c1826848 ECW METRICS SPDWECW-551 and SPDWECW-553 should be warnings, not errors! D, k. K* `) B( Z$ ]/ y
1933373 ECW PROJECT_MANAG ecwbatch does not accept password and does not ignore invalid users* J+ x* m7 w! d0 |+ j
1921502 F2B PACKAGERXL Errors on running Export Physical:SPCOPK-1138 and SPCOPK-1149
# N# j6 I; I9 `8 X! V$ F1929846 F2B PACKAGERXL PackagerXL is still creating the pstcmbc.dat file on a release 16.6 design uprevved to release 17.2-2016) w5 Q5 m$ F0 w' Q; O
1953780 F2B PACKAGERXL Updated subdesign package information not updated on the top-level design in the reuse flow( W# g& @' ^% S# R. S; w/ i# A
1971738 F2B PACKAGERXL Deleting blank space from pstxnet.dat file crashing DE-HDL
& G" W& h n2 C/ {( X2 p1 ~2 N. ?: Y1891002 INSTALLATION DOWNLOAD_MGR Issue with Download Manager (Change Preferences Option does not Work)
4 J1 N3 [7 i) F0 K- Y7 N1972890 ORBITIO OTHER OrbitIO-APR failed to run if PCB design included9 b; M! J8 D- }2 J+ }) U
1954262 PCB_LIBRARIAN CORE Footprint model check in fails with verification checks failed error
2 I( V% A. s! v6 Q1943656 PCB_LIBRARIAN GRAPHICAL_EDI Symbol Editor is blank if .ascii file is newer than .css file0 G' ^/ ~4 d9 J/ {5 G
1897887 PCB_LIBRARIAN SYMBOL_EDITOR New Symbol Editor: Inconsistent symbol results when adding vector pins in Part Developer
3 t3 j- ^1 R. u1898003 PCB_LIBRARIAN SYMBOL_EDITOR Issue with Page Border Symbol
( i2 T' I% j. J. F1842007 PSPICE LIBRARIES Change required in swit_reg.lib
2 X' {5 r; a" ?% \1906922 PSPICE LIBRARIES Mismatch in mapping of IC pins in model and PSpice template for analog device AD8138
5 |* @ O2 ~9 i1 V% C1947586 PSPICE LIBRARIES Update the model AD8138/AD in ANLG_DEV.OLB
1 `& c7 M% \3 w+ k! M* [1748470 PSPICE MATLAB PSpice displays an error when sending current in co-simulation3 \$ |6 t7 S9 c7 }) o
1802455 PSPICE MATLAB Incorrect current direction for pins in SLPS flow
: Z% @) l# a9 C$ i; C, y1852811 PSPICE MATLAB ORPSIM-2604 being reported in SLPS simulation
. P- V s: c* R( m) c$ g1858716 PSPICE MATLAB Co-Simulation fails if 'RC' is used as reference of resistor
+ \& E: R! u# W2 r1921641 PSPICE MODELEDITOR Model Editor in Client Server installation slow to invoke
9 U: N9 ?$ A8 {, }* K1922160 PSPICE MODELING_APPS New Capture Associate Symbol GUI not reading libraries
" H9 t5 q' c3 P- U* u1843698 PSPICE PROBE PSpice icons appear very small on a specific computer6 N* ^3 H4 g3 g3 i
1773841 PSPICE SIMULATOR orSimSetup64 crashes when running the simulation for attached design
9 r" g7 O. b8 B; p: r1816316 PSPICE SIMULATOR Simulation stuck; however, the status bar is correctly updated during Pseudo Transient Analysis
# F1 T& U: ]% m* N+ v! V1887119 SCM IMPORTS Cannot selectively update changes in VDD
) }1 P, ^- X. Y4 R1889362 SCM IMPORTS Cannot selectively update changes in Visual Design Differences3 D% ?1 {, G! b
1958545 SCM SETUP Auto assign models does not work in SCM same way as in DE-HDL
8 [, _$ y$ j- R* K3 i1988841 SIG_EXPLORER INTERACTIV SigXplorer stops responding or crashes in hotfix 047 when a design is saved5 y; ]6 y' s! I3 S( C' u( |# \
1988943 SIG_EXPLORER INTERACTIV SigXplorer crashes on selecting Update Constraint Manager
! r2 K0 g8 e* w% b. X) O) e+ k1991375 SIG_EXPLORER INTERACTIV SigXplorer crashes when clicking Save4 ~3 s, t- [0 `
1993749 SIG_EXPLORER INTERACTIV SigXplorer crashes on saving topology
& S4 v( K% l0 b; {) R1969975 SIG_INTEGRITY GUI Model Browser edits model above the one that is selected* `; ^! R7 `4 v6 k
1953184 SIP_LAYOUT IMPORT_DATA Sub Drawing not saving dashed lines; e/ Z, a) p& j5 F( e' H% e
1913864 SIP_LAYOUT ORBITIO_IF SiP Layout design import results in wrong die rotation
* _$ X8 D6 u& P& \9 n6 F1880237 SIP_LAYOUT PADSTACK_EDIT Background Window comes to the forefront when closing the Padstack editor
7 m& e. a$ s) S9 F# `. D3 B2 P" o1972560 SIP_LAYOUT STREAM_IF GDS Export fidelity issue: inverted arcs
; A+ X* E8 k9 ^; w$ z, u' g5 Z9 j1920317 SIP_LAYOUT THIEVING Thieving pattern does not allow for OOPS operation
' T" v( v7 i) B# [. `1909075 SYSTEMSI DOC SystemSI PBA channel and circuit simulations do not respond if bit pattern is 1s or 0s4 @! y, Z) w8 m D; ?5 v
1916101 SYSTEMSI DOC Lack of stimulus in file causes Serial Link Analysis to become unresponsive
7 y2 J* D( e# C5 ]- S1919562 SYSTEMSI ENG_PBA SystemSI generates wrong timing bathtub curves in channel simulations for write and read9 U; r' Q$ f2 `, G. m
1964064 SYSTEMSI GUI_PBA Able to sweep AMI parameters in SSI-PBA
1 |2 \, ?9 f/ k9 ?1971266 SYSTEMSI GUI_PBA MCP header shows only 49 ckt nodes instead of 52 for s52p S-parameter file! j8 i; v5 v/ O3 U
1885625 SYSTEMSI GUI_SLA Manage AMI + DLL from Setup Analysis Window
0 [9 U* V2 c3 D9 R1924382 SYSTEMSI GUI_SLA Data Rate field in SystemSI Stimulus property form is confusing for PAM4 operation4 ~/ m; G2 O) d/ l D8 f$ n
1982341 SYSTEM_CAPTURE CANVAS_EDIT Signal rename does not maintain new signal name value
/ g+ p4 N# I# ^( k6 ^- k1976857 SYSTEM_CAPTURE CONSTRAINT_MA System Capture-CM Match Group Creation is not updating correctly$ v- l3 O$ A6 [, J8 g5 w- W9 e
1929606 SYSTEM_CAPTURE DESIGN_CORRUP Opening design causes System Capture to crash
9 R2 V$ a8 M. G1914697 SYSTEM_CAPTURE DRC Overlapping component DRC does not work9 d g! n+ N9 b: H$ G6 U. d
1973467 SYSTEM_CAPTURE IMPORT_PCB System Capture Import Physical shows many component and physical differences on a design that is synced up" C: q0 w4 ]9 d6 f6 i9 M
1962603 SYSTEM_CAPTURE NAVLINKS Ability to not underline hyperlinks for Navigation Link values, E. [; j! z4 Z6 P; K
1967639 SYSTEM_CAPTURE PART_MANAGER Part Manager does not open in System Capture for part property value changes even after setting the cpm directive.
0 o& E/ J+ U0 _$ I1964388 SYSTEM_CAPTURE SMART_PDF Some shapes are not visible in the smart PDF schematics
' ~) ~. M: m: H. Y: c# J1 N" {1976832 SYSTEM_CAPTURE TDO Rolling Back local lower-block requires check-out of higher-level packaged & variant views
5 T4 W7 x3 j: X" u, ?1976844 SYSTEM_CAPTURE TDO CM - TDO check-out dependencies are broken! u; z( @0 A% G, `* M# F0 V* F
1976859 SYSTEM_CAPTURE TDO Variant Editor in System Capture -TDO allows to delete a variant without checking out variants view
0 z& ^2 V, D# t) e1 ]1839816 TDA CORE All the design objects are locked in the EDM dashboard after a DSFrame error+ O3 {3 o% a' v# U& }6 d/ ]' b- `
1889898 TDA CORE Cannot check in the top level of the project in TDO) {& _% x7 R# ^* L* H5 e8 n
1892411 TDA CORE Unable to undo the block checkout if something fails
: A, O$ l% C( A# K, b1877757 TDA DEHDL Refresh Hierarchy does not show latest TDO lock/unlock status in DE-HDL7 w; {2 A. k: n! I
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