Hotfix_SPB17.20.054_wint_1of1.exe

yangquan3

2 H6 p1 V. ?2 L0 n2 d
) ]9 x* C/ a# d% v8 X% zHotfix_SPB17.20.054_wint_1of1.exe
( d9 G7 ^0 z; ]2 T1 }9 |下完了
) j- [' M. }5 T/ Q  [" g" |链接: https://pan.baidu.com/s/1r_llgvrGH_bebfSWaR7_5A 提取码: jpbn 复制这段内容后打开百度网盘手机App，操作更方便哦
3 z7 Q6 y' u6 s( C8 d# ]

linguohua

Fixed CCRs: SPB 17.2 HF054
8 W3 R( P' F6 _04-26-2019
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
$ I* g! w  {4 S# M" d& b========================================================================================================================================================
2060269 ADW                DBEDITOR      Unable to create ECAD type mixed-case schematic model attributes
2030086 ADW                LRM           Cache part_table.ptf made by LRM Update cannot be read if it has null value in key property
1975317 ADW                PART_BROWSER  Space at the end of line in CDS.LIB results in zero libraries being shown in new component browser
2076340 ADW                PART_BROWSER  .helix folder needs to be deleted for PTF changes to take effect and to convert a design to cache
+ O$ M, R- o  v& H& Q# _2025147 ADW                TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
8 Z) x% {0 y- t6 B9 y2025201 ADW                TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design
2056694 ADW                TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
2054243 ALLEGRO_EDITOR     3D_CANVAS     Plating is not shown on stacked vias in 3D canvas
, c: ]2 g3 I3 Z( R$ C$ s2054327 ALLEGRO_EDITOR     3D_CANVAS     3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation
7 }& p. V; {1 E  X, U2044980 ALLEGRO_EDITOR     ARTWORK       'Import - Artwork': PCB Editor stops responding and no artworks are loaded
2060489 ALLEGRO_EDITOR     COLOR         SKILL axlGlobalVisibility() issue in a partition file: VIA/SOLDERMASK_TOP subclass visibility not turned off
2072695 ALLEGRO_EDITOR     COLOR         Clines of colored nets not colored when 'display_nohighlight_priority' is set
# r# `7 l2 m+ O2061203 ALLEGRO_EDITOR     CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone
2010812 ALLEGRO_EDITOR     DATABASE      PCB Editor STEP model offsets should follow origin movements
2011993 ALLEGRO_EDITOR     DATABASE      Change STEP model mapping when Symbol Origin is changed in DRA using Setup > Change Drawing Origin
2051596 ALLEGRO_EDITOR     DATABASE      Error for unsupported property in element
- m  ~' t& Y2 n+ b2 d2056497 ALLEGRO_EDITOR     DATABASE      Place manual is slow
2059489 ALLEGRO_EDITOR     DATABASE      DBDOCTOR in batch mode with argument '-check_only' detects text error
0 h5 F8 ~% }9 @4 S2064268 ALLEGRO_EDITOR     DATABASE      PCB Editor crashes when running SKILL code
' E8 |6 }8 a( Y$ L5 i2068588 ALLEGRO_EDITOR     DATABASE      Crash on opening release 16.6 design in 17.2-2016
3 m5 A( R7 Y' L# n2079131 ALLEGRO_EDITOR     DATABASE      axlChangeNet crashes PCB Editor in fast shape mode with Microsoft Visual C++ Runtime Library Error
/ G7 }3 r) \5 G, C) ?/ Y/ W2034759 ALLEGRO_EDITOR     DFM           Importing DFT constraints on board does not assign csets to design but shows the csets
3 o( I8 ?& \/ n1 Z2 b2039992 ALLEGRO_EDITOR     DFM           Cset is not set in Pastemask element of DFA when importing XML Constraint File.
1 h1 n- e  m3 O7 {2046824 ALLEGRO_EDITOR     EXTRACT       Extracta ECL_NETWORK View reports incorrect pin layer.
7 {! L2 j3 v& S: @2 F, R2048912 ALLEGRO_EDITOR     IPC           Running PCB Design Compare - Graphic mode reports ERROR (SPMHA1-273) 'Shape intersects with itself'
2066597 ALLEGRO_EDITOR     IPC           Graphical compare not completed because of self-intersecting shape locations
2079719 ALLEGRO_EDITOR     IPC           IPC2581 import fails with error 'Failed to add (LW)POLYLINE'
2066229 ALLEGRO_EDITOR     NC            Tool code missing in backdrill NC file on choosing 'Optimize Drill Head Travel' in NC Drill
# O0 F  u% V$ J2070379 ALLEGRO_EDITOR     NC            After running backdrill some vias are shorted to other nets
2041881 ALLEGRO_EDITOR     PAD_EDITOR    Difference in locations of drill in pad editor and symbol editor
& f+ ]; E0 }$ a1 ~2058852 ALLEGRO_EDITOR     PAD_EDITOR    Net associations lost on refreshing vias
2061580 ALLEGRO_EDITOR     PAD_EDITOR    Lock Layer Span settings specified in padstack editor not reflected in PCB Editor
3 D* ~& J+ q5 S9 p2048116 ALLEGRO_EDITOR     REPORTS       Extracta command files not visible in Tools-->Reports when there is a space present in the textpath variable
2038949 ALLEGRO_EDITOR     SCHEM_FTB     Netrev is slow if there is an input board file with many modified components
2052758 ALLEGRO_EDITOR     SCHEM_FTB     Connectivity objects are being reported as Added and Deleted in Constraint Differences Report
. S8 Q: e! e! ~2 ?2066099 ALLEGRO_EDITOR     SCHEM_FTB     Inconsistent net names on export physical after changing net names in DE-HDL
2043882 ALLEGRO_EDITOR     SHAPE         Shapes not updated to 'Minimum aperture for gap width' in Global Dynamic Shape Parameters window
2 X/ C/ j. X6 i0 }! ?2048483 ALLEGRO_EDITOR     SHAPE         Shapes not getting updated post backdrill update
* i, C2 n( `- ~% m; z2052063 ALLEGRO_EDITOR     SHAPE         Cannot import IPC2581 due to 'Shape intersects with itself'
1 c8 N5 r/ u% V* @1 V. C2056478 ALLEGRO_EDITOR     SHAPE         Editing shape by sliding segment causes PCB Editor to fail due to 0-length segment in shape
2058017 ALLEGRO_EDITOR     SHAPE         Shape not voiding correctly when fillets are present
" L6 ^1 V1 Z5 r, C  v% t! E% H2066473 ALLEGRO_EDITOR     SHAPE         Teardrops create strange copper shapes
2079698 ALLEGRO_EDITOR     SHAPE         IPC2581 import fails with error 'Shapes intersects with itself'
2010569 ALLEGRO_EDITOR     SKILL         Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in HotFix 048.
2055055 ALLEGRO_EDITOR     SKILL         Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
2023755 ALLEGRO_EDITOR     STEP          Export STEP includes enclosure even when it is not selected.
6 W# t! ?; Q; |% L* }1881233 ALLEGRO_EDITOR     UI_GENERAL    Green/white canvas without grid when creating a board file (File - New)
1900525 ALLEGRO_EDITOR     UI_GENERAL    Resizing the update symbols UI causes the options to overlap and jumble up (refresh issue)
& U$ |! Y8 i  f6 C2003861 ALLEGRO_EDITOR     UI_GENERAL    Same y-coordinate returned for different vertical positions when creating board outline in HotFix 048
( g5 C1 g, q. u& |7 _3 @" Y4 M2033958 ALLEGRO_EDITOR     UI_GENERAL    Incorrect canvas display on creating a design from the Start page and then opening an existing design
5 ~  K- [9 N7 r- `3 {/ {. t5 c6 v2053496 ALLEGRO_EDITOR     UI_GENERAL    Confirmation dialog is behind canvas
  m% o( ^! k' L7 T. d6 q( z5 g5 N- u2054429 ALLEGRO_EDITOR     UI_GENERAL    Editor stops responding until choosing Done after clicking Zoom by Point twice
7 u7 F7 h: I4 t9 a# t+ y! {2059707 ALLEGRO_EDITOR     UI_GENERAL    'HTTPS' links are not shown as hyperlinks when using allegro_html
. e+ [; ]1 Z3 C2 M2063423 ALLEGRO_EDITOR     UI_GENERAL    Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden
5 _7 F" v) t& i% a2038105 APD                DRC_CONSTRAIN APD crashes on update DRC in release 16.6
2050674 APD                PARTITION     Cannot remove C-Point from a partitioned design
) D: w3 u6 ~( F2068814 APD                WIREBOND      Bond wires cross on auto-separate
# s! {+ X+ m. Y+ x- o. ^. A7 W1967433 CAPTURE            OTHER         Cannot open DSN or OPJ files by double-clicking if Capture is already open
1967332 CONCEPT_HDL        COMP_BROWSER  Crash in customer environment on clicking on last row border in PIM after filtering
2001759 CONCEPT_HDL        COMP_BROWSER  Using Modify Component crashes Design Entry HDL
2020788 CONCEPT_HDL        COMP_BROWSER  Intermittent crash when clicking bottom edge of part selection table in the Modify Component window
2053578 CONCEPT_HDL        CONSTRAINT_MG Values specified for custom properties are not preserved
2013002 CONCEPT_HDL        CORE          Ability to regenerate Netgroup names to remove '_1' suffix
2026637 CONCEPT_HDL        CORE          DE-HDL crashing often when launched from EDM Flow Manager
# V& h; P! A0 @) W! e2041145 CONCEPT_HDL        CORE          Set font size & color of netgroup names and netgroup taps
) B' p: c5 e+ F* b" d1 V2056743 CONCEPT_HDL        CORE          NetGroups appended with _1_1, some are empty, and inconsistent in DE-HDL CM and Allegro PCB Editor CM
2065889 CONCEPT_HDL        CORE          DE-HDL Modify command moves location of attached symbol properties
5 g. c, ?, E% d% s2074410 CONCEPT_HDL        CORE          Full net connectivity not shown in Allegro PCB Editor.
2045717 CONCEPT_HDL        RF_LAYOUT_DRI The RF PCB Options is greyed out when doing Import Physical on Linux with enterprise licenses
9 R) F3 [0 d5 ]' {, m( D  A2045274 CONSTRAINT_MGR     CONCEPT_HDL   Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
6 D- ~. T% ?- E2050521 CONSTRAINT_MGR     OTHER         Unexpected Xnet removal from schematic when Export to PCB Layout is executed.
2066270 PCB_LIBRARIAN      SYMBOL_EDITOR Unable to edit note text containing comma
2069181 PCB_LIBRARIAN      SYMBOL_EDITOR Pinlist window expand/collapse buttons act weird first time when invoked.
2070007 PCB_LIBRARIAN      SYMBOL_EDITOR Project not found error in Symbol Editor when path contains space character
2072793 PCB_LIBRARIAN      SYMBOL_EDITOR Right-click menu of formatting text objects is not consistent: second and third options are swapped
2073138 PCB_LIBRARIAN      SYMBOL_EDITOR New Symbol Editor: Do not allow duplicate properties
* G3 l1 B9 d1 B1957458 PSPICE             FRONTENDPLUGI Refresh issue with Bias Display on a new design: bias value not updated
  I2 C' T8 x2 E4 A5 q4 q4 G1 O2022211 PSPICE             FRONTENDPLUGI Bias Point results are not updated
2 F/ b, _1 M3 G2031058 PSPICE             FRONTENDPLUGI PSpice bias values are not getting updated
, A7 j* }+ B9 b  G6 H& P$ f( b2038021 PSPICE             FRONTENDPLUGI Bias display is not updated
4 K+ ~% r; v* V- Q9 F. k2055274 PSPICE             FRONTENDPLUGI Capture crashes on SIMSETUP OK when two projects are open
6 n9 f5 W! v) F- N2053432 RF_PCB             OTHER         Property on RF component not transferred to new design not containing the component
" A8 _$ B: v7 Y+ H3 B( [2003341 SCM                SCHGEN        Unable to generate a schematic for hierarchical blocks
2069924 SIP_LAYOUT         DIE_ABSTRACT_ Conversion from co-design die to standard die / BGA / anything else must remove floating function pins.
1 [7 o! w0 I8 C" i; d2067894 SIP_LAYOUT         OTHER         sip database size is enormous for a small component definition used in fdesign
2067987 SIP_LAYOUT         OTHER         Orphaned die attachment in SiP Layout cannot be removed
4 j" U) F7 t  D) o! y0 ?7 P2072857 SIP_LAYOUT         OTHER         SiP Layout crashes when using Find by Query and choosing 'Symbols'
2068973 SIP_LAYOUT         REPORTS       SiP Layout Missing Fillet report not catching a missing fillet in HotFix 051 and 052
2059533 SIP_LAYOUT         SYMB_EDIT_APP SiP Layout: Cannot rotate bumps in Symbol Editor application mode
; d2 ~, E8 F, k- K1 }" M1981749 SYSTEM_CAPTURE     ARCHIVER      System Capture: Archiving a design from the Tcl command window results in error
7 N2 c' W% u2 P! {% ~2054869 SYSTEM_CAPTURE     AUTOMATION    syscapUtils.tcl command cnsAutoCreateDiffPair is broken due to missing acm_code.il and acm_config.txt files
1966488 SYSTEM_CAPTURE     CANVAS_EDIT   New folder rename box does not show the text typed.
1814813 SYSTEM_CAPTURE     COMPONENT_BRO System Capture session log should specify the CDSSITE path for the current session
" T4 j: r5 M4 y1977673 SYSTEM_CAPTURE     COMPONENT_BRO adding reference blocks through add component error when cell name matches design name
8 K3 p4 D! W. G0 h. I2027100 SYSTEM_CAPTURE     COMPOSITE_FIL pstdedb.cdsz and netlist preview in System capture is not being updated when individual netlist files are written
1961274 SYSTEM_CAPTURE     CONNECTIVITY_ Xnet removed during pin swapping
2041879 SYSTEM_CAPTURE     CONNECTIVITY_ xnets on net with only pull-up resistor
1889238 SYSTEM_CAPTURE     COPY_PASTE    Wire fails to connect during copy and paste
$ z- ?2 t3 ~2 }! s- \1993146 SYSTEM_CAPTURE     DESIGN_EXPLOR Cannot move page up by only one position
; P# m6 K$ R3 {+ g. n1910941 SYSTEM_CAPTURE     MISCELLANEOUS Parts that are not in any schematic page appear in netlsit and BOM
1902347 SYSTEM_CAPTURE     PRINT         Prints all sheets if one sheet is specified as the print range
! _1 E8 J0 n3 y6 q8 k* N- V; g2041272 SYSTEM_CAPTURE     SMART_PDF     Smart pdf displays component outline when component is not de-highlighted.
2065768 SYSTEM_CAPTURE     SMART_PDF     Custom Variable in Table Object not getting passed to PDF
1969243 SYSTEM_CAPTURE     VARIANT_MANAG Export variant does not name file correctly if the filename contains a space
1990258 SYSTEM_CAPTURE     VARIANT_MANAG Cannot paste copied preferred part to multiple parts with the same part number
, V% s9 ]0 S" b: ?% C1992250 SYSTEM_CAPTURE     WORKSPACE     Double-clicking a .CPM file runs System Capture but does not open project

linguohua

金志峰 发表于 2019-5-4 01:01
麻烦先发个ccr看看吧

抱歉，本来想复制到回帖里面，发现格式全乱了。因此直接看下面连接比较好：
/ L& U8 o. [2 Ohttps://electronix.ru/forum/index.php?app=forums&module=forums&controller=topic&id=138247&page=5

linguohua

金志峰 发表于 2019-5-4 01:01
麻烦先发个ccr看看吧

  m; N4 z; L+ |; I" U5 L$ z. Jhttps://electronix.ru/forum/index.php?app=forums&module=forums&controller=topic&id=138247&page=5

th2010-gc01

更新得真快啊！

ethernet

更新頻率真是令人嘆為觀止。。。

llntech

good

llntech

good

逸步舞秋风

给个网盘链接把 威望太贵了

kewin_wang

感谢楼主！

金志峰

楼主貌似下了几天了。。。

金志峰

麻烦先发个ccr看看吧

Geant168

great

vasylll

thank

Deny

thanks