Capture-Allegro最好的设计习惯

John-L

: \3 H4 {7 `( u6 c4 g* N& \* z
: l' \" q+ }4 d9 _, _. I, [2 X做到下面的要求,allegro NET-IN就轻松多了:
% |# n& t6 G& X" E) r" e
- f$ @4 [$ S" O" G6 T+ {7 YBest practices for Capture-Allegro
Best practices for preparing a library for Capture-Allegro PCB Editor
; c: D2 R( h. X; L- Q2 ^3 N8 e. }5 I$ f$ kflow
2 t, B7 V9 Y$ p5 `􀂃 Limit part and pin names to 31 characters
􀂃 Use upper case characters for part/symbol names, part references
' ?. M  l0 \8 ~. X" Vdesignators, and pin names
- T, V6 m9 L1 L8 L0 @5 M􀂃 Do not use special characters to assign part names, references
3 v: _. r( r) J: f( B$ q" b1 Ndesignators, and pin names
􀂃 Do not use duplicate pin names for pins other than power pins
􀂃 For multiple power pins with the same pin names, do not make some
pins visible and other invisible
􀂃 Do not use "0" as a pin number
Best practices for Capture design for Allegro PCB Editor
􀂃 While defining a net list alias or a net name
+ q" N$ a2 x9 u3 O3 s0 I• Keep the maximum length of a net name or alias up to 31
, }1 s# P: A5 P0 Ccharacters
$ |& b3 m) r: o6 Q4 a• Do not use lower case or special characters in a net name
􀂃 Avoid using "Power Pins Visible" property at design level
􀂃 Use net to connect pins
* V5 T+ T- ~: p9 k8 B$ O+ N0 Z• Leave room for assigning a net name. Pin-to-pin connection
$ M$ }- w0 _, @changes the net name when a user moves a component
1 T" z6 z8 x# n  V* r% L1 e8 @􀂃 Run the Capture DRC command before generating Allegro PCB Editor
netlist
7 T/ q$ c& `- U$ b: O􀂃 Set path for Allegro PCB Editor footprint before running Netrev
Best practices for smooth back annotation
1 `) Y  v6 a4 }: }  B7 B8 n2 \7 K􀂃 Do not change design name, hierarchical block names, or reference
designators in Capture after board files creation
􀂃 Do not edit a part from schematic in Capture after board file
creation
􀂃 Do not replace cache as it changes the Source library name and part
name, in capture
  o* C7 M3 k6 D( H( M- u3 \􀂃 Do not change the values of component definition properties in
capture after board files creation
0 e5 t: h) A: t􀂃 Do not change Design file/root schematic/hierarchical block names
in Capture after board file creation
􀂃 Do not add or delete components to or from the schematic design
, O5 z2 c& Y7 A# w, t  G7 `! qimmediately after the board file creation. Add or delete components
after finishing the back annotation process
4 P: p8 h" {' q+ n& |- 2 -
* b* M, O1 z5 F+ i􀂃 Do not add any additional components in Allegro PCB Editor. Instead,
! q: L' o. p( I" X8 [( Oadd components in Capture and take them to Allegro PCB Editor
􀂃 Do not add, rename, or delete a net in Allegro PCB Editor
􀂃 Do not change the format for reference designators for parts in
) ]; L+ t; P1 gAllegro PCB Editor as <Alphabet(s)><Numeric><Alphabet(s)> or
><Alphabet(s)>-<Alphabet(s)>
&#1048707; Run Allegro PCB Editor Dbdoctor before running Back annotation by
selecting the Database Check command from the Tools menu in Allegro
PCB Editor
3 x, n+ r1 K  E&#1048707; Make backups of the original design before updating the design with
the swap information in Capture
$ n+ ~$ O5 K  [3 f6 g&#1048707; Back annotate the design immediately after making the board file.
Though it does not a mandatory step, back annotating the design
5 F1 n' K! ^; f! w+ `: i! b) [before placing components helps avoid problems in back-annotation
at a later stage.
( T( c- H* s4 Z% Z7 i, k/ YIf back annotation at this stage generates an empty swap file, you
can proceed with placing and routing the board file. In case any
problems are detected, you must correct them in the design file and
generate the board file again until an empty swap file is generated.

longzhiming99

一直不明白电源脚默认都是隐藏，有什么好处？1048707; Avoid using "Power Pins Visible" property at design level&

Sisic

英文版的  看不懂 請問有中文版的嗎？

jiangliang

做工程需要规范，学习下，谢谢！

John-L

不知道为什麽COPY出来会有"&#1048707"之类的东东

yizhe1015

很好哦

03155001

谢谢分享

yzxujiang

努力争取

happywzb

不错
  X" S; i3 n+ G4 k" E2 J好东西

dabing715

好东西 大家分享

osinfo

7# dabing715
打开学习一下，谢啦1

hehehe

谢谢分享！

n042208

谢谢楼主

xhymsg

TKS~~~

John-L

自己顶一顶。
看见好多人调网表有问题。
养成良好习惯很重要。

杜晓

很好

vincent_xiao

学习了

sls_swz

学习了！顶起来！