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各位大佬：
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我是新手，我用orcad画完原理图，drc检查没有错误，但就是不能生成网表，请教：谢谢！
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log：
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Loading... C:\Documents and Settings\Administrator.ASUSTEK-4295C4C\桌面\sch\allegro/pstchip.dat
7 Q9 r I- M7 }. H3 W' Z3 `$ H7 J#72 ERROR(SPCODD-72): A mismatch in the number of sections occurred on line 1701 while parsing logical pins.7 D: S) b0 S" O. o: t
To avoid such errors, use Part Developer instead of manually editing the library part definition
. ~8 \9 }1 e/ \0 U ERROR(SPCODD-47): File ./allegro/pstchip.dat could not be loaded, and the packaging operation did not complete. Check the pxl.log file for the errors causing this situation and package the design again.
+ w. {( `0 ^; `. S/ c#53 ERROR(SPCODD-53): Packaging cannot be completed because packaging has encountered a null object ID. The design may not have been saved correctly. Save the schematic and rerun packaging.
, p* O h6 x# [. h: w, m#21 Error [ALG0036] Unable to read logical netlist data. |
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发表于 2009-8-30 18:30
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支持！
反对！
楼主