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Fixed CCRs: SPB 17.4 HF013 - Date: 12-10-2020
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========================================================================
5 g: v) ~7 f1 V7 E3 TCCRID Product ProductLevel2 Title
! X) z6 g! T6 A J) {& @===================================================================================5 d+ B* G, i1 ~ g/ G% q
2317991 ADW DBEDITOR Two symbols named Conn1x28_AB and EPC2 disappear from the DB editor./ s& k1 \( D& k( f: R- x1 }
2337802 ADW DBEDITOR Saving Schematic Model Classification created several copies of the classifications and removed the original
' \$ w+ K- v5 ^2344239 ADW DBEDITOR Symbol mt41k128m8da disappeared after checking in to EDM
5 J4 _# k7 |% K3 K0 Z! x( S# o2331095 ADW LIBDISTRIBUTI Schematic symbol missing after undo-checkout in EDM
! h" d$ d s$ ?) V& i8 z: a2347550 ADW PART_MANAGER Part Manager does not see VALUE property changes
/ D8 G9 z5 K( J2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned
2 i6 f2 M3 d; w4 R2247481 ALLEGRO_EDITOR 3D_CANVAS Error message for bend operations being disabled in release 17.2 for rigid-flex: Cannot offset planar face to valid body# R0 S `1 u! a5 o5 e0 R
2299554 ALLEGRO_EDITOR 3D_CANVAS Error message on starting 3D Canvas and after bending all objects regarding object outside design
3 ^. e% X. n$ ]' @% X3 b2303282 ALLEGRO_EDITOR 3D_CANVAS Unable to bend design1 ^; f J% r3 e
2345138 ALLEGRO_EDITOR 3D_CANVAS Bend operations are disabled: Cannot make wires with duplicate vertices7 [% \: U8 A2 g/ A
2346811 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas bender engine error due to duplicate vertices) E4 E9 T9 I' u, q) g
2067211 ALLEGRO_EDITOR CROSS_SECTION The Cross-section Chart view in the Cross-section Editor does not remember its settings.7 Z ~6 X) C" N
2228181 ALLEGRO_EDITOR CROSS_SECTION Allegro PCB Editor cross-section, release 17.4-2019: Pressing 'Enter' does not move to next field
, u4 f3 g& `: W' X" o2210674 ALLEGRO_EDITOR DATABASE BGA component is split on moving between zones
( r0 b+ V( r) A, i y" P2260964 ALLEGRO_EDITOR DATABASE Backdrill via replacing fails in release 17.2-2016, HotFix 062 and HotFix 066 but ok in HotFix 050 and Hotfix 065' g1 l" k+ K# P& j4 v6 T
2291817 ALLEGRO_EDITOR DATABASE Corrupt .brd file causes Allegro PCB Editor to quit on running database check6 ? I6 ]' \% s$ P+ e9 _6 y
2317130 ALLEGRO_EDITOR DATABASE Message to upgrade appears on opening DRA files created in release 17.2-2016 even if saved in release 17.4-20193 d# d/ d: q% ^5 J4 |
2357413 ALLEGRO_EDITOR DATABASE Import Sub-Drawing (clipboard) stops responding with Venture license: Completes with warning using PCB Designer license
: b9 n. R/ {& ~* x) G* ]2037361 ALLEGRO_EDITOR DFM DRC not flagged for soldermask features drawn with a line to pin, via, or shape soldermask features
, q, R! L$ v2 M# q2 q2079204 ALLEGRO_EDITOR DFM Enabling option to update analysis mode and run DesignTrue DFM wizard causes PCB Editor to exit
* S! V3 Q3 R3 u3 D& a3 a2087181 ALLEGRO_EDITOR DFM DFM reporting false positive hole to hole with stacked microvias
8 ]0 x$ Z8 M( {5 b- p( N2272112 ALLEGRO_EDITOR DFM Mask: Exposed etch area does not work for cline6 R+ K7 F0 f- M/ t5 r- X
2341080 ALLEGRO_EDITOR DRAFTING Allegro PCB Editor crashes on moving module/ T& l4 m# I7 I9 Y8 V3 O
2348334 ALLEGRO_EDITOR DRAFTING Allegro PCB Editor crashes on Component Move$ D$ h& X5 U/ J/ V4 V# L4 \0 P
2271904 ALLEGRO_EDITOR DRC_CONSTR DRC missing for static shape which has an overlap with Route Keepout
! q6 v1 x+ l7 @& o, {2341989 ALLEGRO_EDITOR DRC_CONSTR Allegro PCB Editor crashes while performing Update DRC.4 v$ w0 p! D$ h; t# z( x
2180397 ALLEGRO_EDITOR EDIT_ETCH OrCAD/Allegro PCB Editor stops responding during add route
9 v$ o t7 `- [2185709 ALLEGRO_EDITOR EDIT_ETCH Film Area Report stops responding
# w9 R) S0 ]# S P6 u7 f( p: ~* a C2341753 ALLEGRO_EDITOR EDIT_ETCH Random crash of Allegro PCB Editor! O3 Q# {: T8 g( W
2267702 ALLEGRO_EDITOR EDIT_SHAPE 'Edit - Split Plane - Create' crashing Allegro PCB Editor/ ^* I7 i( R. a, x1 |
2175472 ALLEGRO_EDITOR GRAPHICS Infinite cursor disappears when dragging a component to a new location.
2 n$ L# x g. i8 x4 T; K; x2184194 ALLEGRO_EDITOR INTERACTIV New Via Array command usage model issues: Clicking to place vias leads to selection of shapes, x S' I: M7 m. h2 P8 R
2242133 ALLEGRO_EDITOR INTERACTIV Line arc with line font and width not displaying correctly
]- J+ S+ o+ c) k6 O) Q) w/ a: V2244420 ALLEGRO_EDITOR INTERACTIV Highlight SOV is not flagging clines that are within sov_spacing0 H3 o7 G5 V* } y5 ]4 ~
2293704 ALLEGRO_EDITOR INTERACTIV "Oops" command during 'add rarc' command does not revert back to snap grid of cursor
" \) v! R+ M) c) f7 D( C; E( @9 o* w2304773 ALLEGRO_EDITOR INTERACTIV Cross-probe with Capture prevents subsequent part selection in Placement Edit Mode- j5 X- x& c) P5 K( R% i
2309994 ALLEGRO_EDITOR INTERACTIV Place -> Via array cannot be placed after preview by clicking on shape in release 17.4-2019
) o2 x2 Z: I+ H$ L" _) K: Q: P2312593 ALLEGRO_EDITOR INTERACTIV Cannot commit Via Array placement within a shape using Single Side option
% l3 s1 k+ A3 ^3 {: P y2315052 ALLEGRO_EDITOR INTERACTIV Cross-probing issue when multiple parts are highlighted in Capture, sometimes not highlighted in PCB Editor.
, K4 c& ?. A8 ^3 f; K9 d2321401 ALLEGRO_EDITOR INTERACTIV Cross-probing issue when selecting multiple parts in OrCAD Capture: Does not highlight those in PCB Editor
; I) Z; f# _+ N3 m [& J2324879 ALLEGRO_EDITOR INTERACTIV Rotate with function key followed by 'ix' moves component to unexpected location
3 m: s& u2 d5 R' S7 J2334085 ALLEGRO_EDITOR INTERACTIV Data tips not appearing if cursor moved quickly to next element./ f/ D ?. S6 i( O, W# J
2346770 ALLEGRO_EDITOR INTERACTIV Unable to place Via array on shape with Array Parameters "Type" as "Single Side"9 u% W- ?& _; _
2347531 ALLEGRO_EDITOR INTERACTIV Copy command results in wrong location while using 'oops' followed by new position in release 17.4
8 |/ D4 m4 {! V+ ?, ]$ x7 n4 x2360755 ALLEGRO_EDITOR INTERACTIV Rotate with funckey moves Symbol x6 n- @5 f a5 M l9 Z) ~( t
2366514 ALLEGRO_EDITOR INTERACTIV Cross-probe issue in PCB Editor and Capture CIS in release 17.4-2019, HotFix 012: No element found* Z' ^7 Y3 o& b1 x; }: x- a/ c
2132582 ALLEGRO_EDITOR IN_DESIGN_ANA Messaging in command window does not appear in the journal file.
3 U- O: T# K: m2306827 ALLEGRO_EDITOR IN_DESIGN_ANA Rise Time and GeoWindow max value limitation to 1000mil and 1000ps }- E+ b+ A6 |
2121233 ALLEGRO_EDITOR IPC Exporting IPC2581 from board is not including tolPlus and tolMinus for thickness of TOP and BOTTOM( ?. _9 _5 ^% ]& \/ k4 M
2295545 ALLEGRO_EDITOR PAD_EDITOR Import of XML for pad stacks not working as expected: Pad files not generated
: D! B2 H- R4 t( K4 ]2286761 ALLEGRO_EDITOR PLACEMENT Not able to place via array around void in release 17.4-2019 while it is working fine in release 17.2-2016.
9 i Z' Q4 S7 ] L, b/ O% c2309866 ALLEGRO_EDITOR PORTING Allegro PCB Editor performance issue - slowness with Xorg high CPU occupancy rate
6 c- a# Q4 Y) D/ }7 f- `& A( u% l2350452 ALLEGRO_EDITOR SCRIPTS Incorrect table (vertical) header popup in release 17.4-2019$ F0 l$ W: l: M+ u I# A
2125268 ALLEGRO_EDITOR SHAPE When shape outline is located at specific area, shape is not working correctly.
% e0 q; u% ~$ _5 n2342307 ALLEGRO_EDITOR SHAPE Performing operations such as voiding on shape gives error (SPMHA1-507) stating PolyBool has hit an assert
/ Z. S" p, L" l2308042 ALLEGRO_EDITOR UI_FORMS Color dialog text hidden by checkbox in Allegro PCB Editor light theme
2 q) G: n8 E8 M' G: X2318019 ALLEGRO_EDITOR UI_FORMS Allegro displays garbled text
4 c0 `) n7 u# |6 ^9 h0 w7 N" e2338953 ALLEGRO_EDITOR UI_FORMS Scroll zoom and arrows pan do not work when certain commands are active2 Q' b+ G! u$ G% d
2345208 ALLEGRO_EDITOR UI_FORMS Change event does not work well in String field of Grid in form
) i4 P( y, F+ G/ x& {# j- Y" Z2351653 ALLEGRO_EDITOR UI_FORMS Cannot switch to other alias or funckey unless command is canceled after setting Alias or funckey for zcopy shape& Y, ~8 L/ ^5 M0 J
2353126 ALLEGRO_EDITOR UI_FORMS The POPUP fields in Test Form have a triangle sign* T) e' E. u4 d2 U: T. e
2363394 ALLEGRO_EDITOR UI_FORMS Padpath text hidden in Allegro PCB Editor in light theme# k! w) B; [. s6 q
2257512 ALLEGRO_EDITOR UI_GENERAL Split view Horizontal and Vertical are mixed up/ p, ^4 z+ K# k) Q7 A
2262412 ALLEGRO_EDITOR UI_GENERAL Allegro PCB Editor crashes on using SKILL GRPDrwUpdate() API because GRPDRWDATA->hwnd is not initialized
2 v! C9 ~' o {( a2 n% a2265250 ALLEGRO_EDITOR UI_GENERAL Checkbox not center justified in Grid form in release 17.4-2019
- x( `# m6 h# y2271500 ALLEGRO_EDITOR UI_GENERAL Very slow switching between views with infinite cursor
* A+ C: v7 O9 D5 ]$ B+ p# O8 z$ E! I2293753 ALLEGRO_EDITOR UI_GENERAL Issue with using SKILL in Design Workflow: PCB Editor command does not run if added after SKILL command in a task1 {- }3 b- s) X; T9 x
2301681 ALLEGRO_EDITOR UI_GENERAL The Edit>Text command in the layout is creating cursor overlap while editing the text.
: j1 G3 \; \* s$ M2302399 ALLEGRO_EDITOR UI_GENERAL Edit Text display issues with insert mode: Not redrawn after text edit done, showing old removed characters `; L' B" H9 ~1 t
2315467 ALLEGRO_EDITOR UI_GENERAL The border option does not work for text fields depending on other fields around it
0 r/ j; F; s1 Q; H: X0 z9 {2322601 ALLEGRO_EDITOR UI_GENERAL The cursor disappears when editing a shape area and drag edge if infinite cursor type is being used.7 O" x. p+ R( c6 P/ _9 F
2324334 ALLEGRO_EDITOR UI_GENERAL Menu entry missing using OrCAD Professional or OrCAD Standard license for Tools - Padstack - Refresh
: G6 \. H. ]) q/ ?& M* J8 q T6 w3 ^2337176 ALLEGRO_EDITOR UI_GENERAL Visibility pane cannot be correctly resized
9 |9 o6 R! o, Q( R$ P2338704 ALLEGRO_EDITOR UI_GENERAL Cyrillic text not shown correctly.
* a9 V6 v+ \; G' y0 n; w0 r2341742 ALLEGRO_EDITOR UI_GENERAL allgro_lock_toolbar resets on restarting Allegro PCB Editor
3 B2 q7 s3 o+ g; d8 C% N( q9 \, g2341757 ALLEGRO_EDITOR UI_GENERAL Textbox size is small: Cannot enter value for spacing to align components.8 o( M6 l/ W1 |8 c7 H: n# h
2345084 ALLEGRO_EDITOR UI_GENERAL World view not working correctly and does not display cutout with latest hotfix of release 17.4-2019
, s9 \% p% l% C- l2347282 ALLEGRO_EDITOR UI_GENERAL Very slow view loading and redraw in release 17.4-2019 hotfix." c2 O; [ o0 d8 g2 V
2354524 ALLEGRO_EDITOR UI_GENERAL Large space in command line between command prompt and typed text
/ {4 y! P/ X- O2 r8 A2356220 ALLEGRO_EDITOR UI_GENERAL Window size is bigger in release 17.4-2019 compared to release 17.2-2016 because of white space8 Z) W3 s" z8 o" }& c# m
2356985 ALLEGRO_EDITOR UI_GENERAL Cannot shrink menus to min size4 e& c6 z0 N1 ~' c
2357540 ALLEGRO_EDITOR UI_GENERAL axlUIWTimerAdd() function not generating elapsed time correctly in release 17.4-20190 K: O% l+ J# R5 F O/ _
2359766 ALLEGRO_EDITOR UI_GENERAL When using Edit > Text in release 17.4-2019, the cursor under the text turns into a gray/white bar
; M, d3 j# q, @( x, B6 m2168386 ALLEGRO_EDITOR ZONES Bend Area also bends the rigid part6 p; G% W% w ?2 U. X
2078434 ALLEGRO_PROD_TOOLB CORE Shield Router - cline end caps treated differently than cline-segment end caps
" v# i; \, ]6 a2101020 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC with multiple net classes: script selects only the last two classes in a group/ x5 U, T Y0 l3 I
2150291 ALLEGRO_PROD_TOOLB CORE PCB design compare cannot compare Cross-section layer name with space
( E, | u2 {5 o$ s0 J# F5 \2075523 ALTM_TRANSLATOR CAPTURE Translation issues with third-party PCB and Schematic2 U5 ~) P' z; C( m G
2336558 APD DATABASE AREF degassing for Gerber export
" f9 b! e/ M# c9 C7 I8 M) X7 k2 |2222216 APD LOGIC Part is not highlighting in Logic -> Edit Part List/ L* Y( j) M0 O# A: M N% f
2354236 APD UI_GENERAL Manufacture - Artwork: Wire bonds visible when Film view selected4 b7 G7 B- P, q# l8 B) ^
2249404 CAPTURE GENERAL Place Part > Add Library > Browse dialog stop taking key board input after Create PCB Netlist
& F" c" J% h; x; M2199790 CAPTURE NETLISTS Netlisting from command prompt gives different results in release 17.4-2019 and 17.2-2016) A- C* `7 T) e/ r
2340813 CAPTURE OPTIONS OrCAD Capture changes canvas theme after PDF export5 N" z6 ?. N# i% \$ N2 X
2343788 CAPTURE OPTIONS Export PDF changes color scheme of schematic, ?- V9 W" Y# j2 y4 w1 ^' S% U3 b# R2 r
2213702 CAPTURE SCHEMATIC_EDI Wire signal, which is part of NetGroup, on top level of a hierarchical design is not shown in signals command results.4 p% C( n& X, ^0 I
2264254 CAPTURE SCHEMATIC_EDI Crystal Report from Capture in release 17.2-2016 does not display Japanese characters correctly7 @: i# ?. [# D+ ]( y) o4 h0 B
2278930 CLOUD_INFRA COMPONENT_EXT Unable to get parts from third-party Search Provider/ |' G9 n: Y/ L) Q4 }6 T
2313388 CLOUD_INFRA STARTPAGE Capture starts slowly when Start page is enabled
+ @, q9 g, L& }: D* K& \2332357 CONCEPT_HDL CORE Unable to backannotate or perform 'design sync' from PCB Editor to Capture2 g" ]( y7 j. l' o( D g
2333126 CONCEPT_HDL CORE Design sync fails when the temp folder is missing in root directory
) B3 Q" T0 d" b" n2 L2306359 CONSTRAINT_MGR ANALYSIS RPD Match Group DRC errors occur after refreshing symbol for silkscreen corrections.
% U& ]5 v( Y9 B' O, T5 f2239908 CONSTRAINT_MGR CONCEPT_HDL Cross-probe is not enabled in pre-select and post-select mode in Allegro Design Entry HDL.
; c7 o: B+ x6 r+ U2307873 CONSTRAINT_MGR CONCEPT_HDL Cross probing disabled in PCB Editor when adding net to a Class in Constraint Manager.
, \2 w9 k& o7 D0 q- {2238753 CONSTRAINT_MGR DATABASE Pin delays in Constraint Manager showing 3 digits resolution even if pin delay is defined with 4 digits# z1 o1 \' l! z& Y6 R# v
2351214 CONSTRAINT_MGR ECS_APPLY Importing constraint file in OVERWRITE mode does not delete some ECSETS permanently
* H/ I0 y! X$ o; ], V2226652 CONSTRAINT_MGR UI_FORMS Release 17.4-2019, Constraint Manager: Height of column headers is too large0 n) ]. w! Q# {
2226663 CONSTRAINT_MGR UI_FORMS Release 17.4-2019, Constraint Manager: Cannot auto set column width by double-click
8 w7 w- m3 }% }2341522 CONSTRAINT_MGR UI_FORMS Release 17.4-2019: Filtering in CM for Prefix or Suffix does not work5 y9 X3 I @3 Y% ^! F
2251671 PCB_LIBRARIAN SYMBOL_EDITOR Drawing or custom shape shows small overlap after reset origin
& a+ N7 J p& I- v6 v _2306865 PSPICE LIBRARIES QVBICN model issue: Model and implementation pin mismatch and part moved to different library% u5 j) G' [& z. p
2345948 PSPICE LIBRARIES Default PSpice component cannot be placed from PSpice Search2 h* g: ~4 y" t! Y
2346793 PSPICE LIBRARIES PSpice install has issues finding "XFRM_NONLIN…" parts.+ H$ B/ {& S8 l* m; m% j' e
2320996 PSPICE TI_CONTRACT Library update causes simulation errors (ORPSIM-15115 and ORPSIM-15107)
2 t0 f& y+ T1 ]8 Z9 S7 p' V m8 t2358318 PULSE ADHOC Allegro System Capture crashing when copying or pasting part or adding new part to design
" m# ?; L% \; A' \2359260 PULSE ADHOC Commits are denied and incorrect status/versions displayed in Project pane) j6 z" c O N$ U4 h) X
2341542 PULSE CORE Versions from Pulse Server using FQDN & Intermediate Cert. Authority (Atom): Control & ad hoc collaboration not working5 P+ w$ j9 w; g9 Q8 S
2262023 PULSE UNIFIED_SEARC Some object types being ignored during release 17.2 to 17.4 EDM database uprev1 b* B8 `& X5 c* n: u& m \
2356310 PULSE UNIFIED_SEARC Unified Search text color should be much darker in the results section5 H' s- L! N3 | P; w" r- D
2329757 PULSE VERSION_ON_SA Pulse tray not launching/ f# Q/ A9 ?* F! y( Y
2311689 SCM OTHER SCM crashes during port assignment5 K, _; ?+ V2 u: x4 P
2339272 SIP_LAYOUT UI_FORMS Latency observed in APD Plus in release 17.4-2019 when running SKILL code
% x7 d7 U% h0 H6 q# g2345888 SIP_LAYOUT WLP Advanced thieving patterns in .gds shifted after stream out
, \, o/ H, C6 Q8 e2356097 SIP_LAYOUT WLP Importing external DRCs results in error0 N/ g) f: a# X
1972290 SYSTEMSI COMMON case-insensitive in mcp header editor- S m- A9 W7 h; G# @6 \2 [; ?
2139994 SYSTEM_CAPTURE CAPTURE_IMPOR Importing OrCAD Capture designs fails for spaces in package name
6 M: x( g3 j0 G8 y, E8 S! r1814813 SYSTEM_CAPTURE COMPONENT_BRO System Capture session log should specify the CDS_SITE path for the current session7 y6 y, c; N3 _$ q) b
2089112 SYSTEM_CAPTURE CONSTRAINT_MA Constraints are imported as read-only in System Capture from a DE-HDL design
1 u9 c3 i1 S: f" w2242032 SYSTEM_CAPTURE CONSTRAINT_MA XNets issues in designs migrated from release 17.2-2016: Cannot add XNets across some resistors after removing7 {0 w7 G0 O9 V0 v
2334411 SYSTEM_CAPTURE HSS_DESIGNEDI Packaging Options for Block dialog, Reference Designators tab: Sample text for both suffix and prefix is the same+ i% z2 n0 ?3 h6 u
1893897 SYSTEM_CAPTURE IMPORT_DEHDL_ Notes in Japanese from DE-HDL designs do not import correctly into System Capture7 u$ a9 ~. ]5 f
1983793 SYSTEM_CAPTURE IMPORT_DEHDL_ The ground symbol differs from the power symbol
1 |6 j7 @) S3 B2025950 SYSTEM_CAPTURE IMPORT_DEHDL_ Broken connectivity on imported ground symbols
- J% Y4 l G4 t1 W9 S5 i, C1969979 SYSTEM_CAPTURE MISCELLANEOUS 'Power_Group' property not working correctly with System Capture5 [+ w% l% R; G7 G
2006600 SYSTEM_CAPTURE NAVLINKS Placement of navigation links: placed on top of port/off page symbol and inconsistent alignment, L0 Z/ {* F# g
2018961 SYSTEM_CAPTURE PERFORMANCE Moving objects and/or groups of objects is very sluggish
- w; Y# T' v9 e8 r8 y+ o. b; ?2084693 SYSTEM_CAPTURE PERFORMANCE Performance improvement required in System Capture+ C0 @6 w' ^0 y2 v- {
2114146 SYSTEM_CAPTURE PERFORMANCE Design takes a good amount of time to open5 `# r C- E' W! i* w
1902347 SYSTEM_CAPTURE PRINT Prints all sheets if one sheet is specified as the print range7 u6 k& E" d) D8 I/ U
2182607 SYSTEM_CAPTURE PRINT System Capture crashing while trying to print: N; {$ W( t+ c# Y" [! Z7 O1 [
2342128 SYSTEM_CAPTURE PRINT The right edge of the options area is cutoff5 d. Z+ `; Y/ S$ @% e; q
2106307 SYSTEM_CAPTURE PROPERTY_EDIT An orphaned VOLTAGE property gets attached to the page border
- N/ H1 P0 w* e5 Q0 C% Q3 T2080707 SYSTEM_CAPTURE SELECTION_FIL Cannot select component that has a block shape drawn around it.
5 a5 c8 y1 O0 O% F4 T: u2141023 SYSTEM_CAPTURE SELECTION_FIL Place drawing objects behind the components
$ L- E) I! @: a) q2041272 SYSTEM_CAPTURE SMART_PDF Smart PDF displays extra box outline if component is selected% U! R$ g( x0 z6 {0 @/ L1 n
2065768 SYSTEM_CAPTURE SMART_PDF Custom Variable in Table Object not getting passed to PDF( k4 J, O. w0 H# o/ O
2269518 SYSTEM_CAPTURE SMART_PDF PLM system cannot process older versions of Smart PDF files! c8 y3 q1 F# K" E" Z
2298673 SYSTEM_CAPTURE SMART_PDF Smart PDF crashing when Remote Desktop Connection is used. O9 G( M" [$ m5 m. v* ~: _2 l
2318787 SYSTEM_CAPTURE SYMBOL_GRAPHI Pin numbers overlap bubble pin stubs0 c( v0 f5 ^4 H) y- f- ~3 E6 ?
2082594 SYSTEM_CAPTURE UI Component Replace should seed the Component Browser with the part's existing properties+ {+ N: l( {/ s2 F v! o2 p$ F6 e
2218534 SYSTEM_CAPTURE UI 'Auto Create Differential Pairs' command missing from the Tools menu
) J1 _" X9 n3 y2221714 SYSTEM_CAPTURE UI 'Tools - Auto Create Differential Pairs' menu option is missing
. Z3 K8 ]* S2 m2269532 SYSTEM_CAPTURE UI Voltage values missing and incorrect names displayed for power symbols3 d4 }: g* m+ b( N) }/ q
2274042 SYSTEM_CAPTURE UI Bus tap bit number XY location and symbol colors changing4 `7 N9 M+ O9 b, ~( h
2354836 SYSTEM_CAPTURE UI Moving objects causes it to appear very far off the page9 {% q+ E' P0 G) [
2361110 SYSTEM_CAPTURE UI Moving a border shape with a text box inside causes both to disappear' Q# C: O* _9 `3 ]+ W
2193445 SYSTEM_CAPTURE VARIANT_MANAG Box object prevents selecting a part in the variant view( G! ` K9 @; L
2283596 SYSTEM_CAPTURE VERSION_ON_SA Misleading message displayed when a user did not have the required privileges
/ y A9 B6 ~ f$ n+ m9 |- R, S, a2010029 SYSTEM_CAPTURE WIRING Zoom is too slow when zooming into a smaller area
) h+ n: h7 e3 z# V$ }2 O8 M2209521 SYSTEM_CAPTURE WIRING Scalar net name 'synonym' wins and is assigned to bus
0 |/ g0 Q$ I7 v& X% s! }: T7 l2290743 SYSTEM_CAPTURE WIRING ALLOW_4WAY_JUNCTION directive not working as desired.
3 t7 Y3 n- W# E2340292 SYSTEM_CAPTURE WIRING Net names move automatically when connecting a named net with an unnamed net.0 B9 A" p* `/ [3 D$ a& Z1 @
2253244 TOPXP AMI_BUILDER Capability to build standalone Tx or Rx AMI model in Parallel Bus Analysis workflow
; S& s7 @6 R/ Q; n% {" m2296478 TOPXP GUI Auto-shorting causes duplicate SPICE R element
2 t2 p) }3 _* O$ b3 n; K, m# r2305071 TOPXP GUI Difference in results at Tx power with same setup in release 17.2-2016 and release 17.4-2019! I% I6 B+ J/ h! k7 z
2188372 TOPXP SYSTEMSI Channel Simulator results incorrect when IBIS CLK model is different for P/N buffer outputs
* c% K2 O& I. @7 _2218575 TOPXP TCL Provide Tcl support for editing AMI model parameters in Topology Explorer) ~4 A1 J5 G$ ?! g
2356260 TOPXP TCL Topology Explorer - Tcl commands to automate the entire Sweep Simulation needed |
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发表于 2021-1-6 10:46
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