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Fixed CCRs: SPB 17.4 HF013 - Date: 12-10-20203 H6 g& h) X: y' F, c/ Y! A
2 T4 z4 u7 j/ S2 T- [! v========================================================================
. g. f: z$ }! xCCRID Product ProductLevel2 Title' Q+ d7 c( D$ y% `$ Z
===================================================================================
4 [7 n7 {/ y% B2 z7 M. O v9 H: _" F- a0 `2317991 ADW DBEDITOR Two symbols named Conn1x28_AB and EPC2 disappear from the DB editor.! G; _( _/ T8 F0 E' L1 h
2337802 ADW DBEDITOR Saving Schematic Model Classification created several copies of the classifications and removed the original" c! r, L/ K( U$ c( N, j/ G
2344239 ADW DBEDITOR Symbol mt41k128m8da disappeared after checking in to EDM2 [: ]/ y, Y! l
2331095 ADW LIBDISTRIBUTI Schematic symbol missing after undo-checkout in EDM
0 A3 g; }7 P! n! V/ B2 m2347550 ADW PART_MANAGER Part Manager does not see VALUE property changes8 M* H( n% B( m' l1 C7 [3 ?. V
2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned; w9 F: _. J) v/ R/ }/ E' |
2247481 ALLEGRO_EDITOR 3D_CANVAS Error message for bend operations being disabled in release 17.2 for rigid-flex: Cannot offset planar face to valid body
) m$ R8 p4 V: ?! ^) e" W2299554 ALLEGRO_EDITOR 3D_CANVAS Error message on starting 3D Canvas and after bending all objects regarding object outside design
5 I1 T, y p3 j& A2303282 ALLEGRO_EDITOR 3D_CANVAS Unable to bend design- @4 P( t* a+ P( J( w: Y6 ?
2345138 ALLEGRO_EDITOR 3D_CANVAS Bend operations are disabled: Cannot make wires with duplicate vertices
, Z, c' F0 m0 q( o# s- d2346811 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas bender engine error due to duplicate vertices
/ Y! _: q5 q! B& i2067211 ALLEGRO_EDITOR CROSS_SECTION The Cross-section Chart view in the Cross-section Editor does not remember its settings.
8 z/ O) l; A/ X0 O0 l# C& w2 ^2228181 ALLEGRO_EDITOR CROSS_SECTION Allegro PCB Editor cross-section, release 17.4-2019: Pressing 'Enter' does not move to next field
# ]4 I$ O$ A1 u4 v/ q# g1 ]& C/ f2210674 ALLEGRO_EDITOR DATABASE BGA component is split on moving between zones
9 X8 j7 \, p" \: ?6 J9 D; \+ ~2260964 ALLEGRO_EDITOR DATABASE Backdrill via replacing fails in release 17.2-2016, HotFix 062 and HotFix 066 but ok in HotFix 050 and Hotfix 065
& V0 v, u0 Q" ?/ x2291817 ALLEGRO_EDITOR DATABASE Corrupt .brd file causes Allegro PCB Editor to quit on running database check
' u, h; h& N8 U: A+ J9 r) w2 d% J$ _* I2317130 ALLEGRO_EDITOR DATABASE Message to upgrade appears on opening DRA files created in release 17.2-2016 even if saved in release 17.4-2019! A" G- R7 B+ `1 [
2357413 ALLEGRO_EDITOR DATABASE Import Sub-Drawing (clipboard) stops responding with Venture license: Completes with warning using PCB Designer license! Q5 [2 S1 m' |% l
2037361 ALLEGRO_EDITOR DFM DRC not flagged for soldermask features drawn with a line to pin, via, or shape soldermask features
# u! @& W% M0 u4 q2079204 ALLEGRO_EDITOR DFM Enabling option to update analysis mode and run DesignTrue DFM wizard causes PCB Editor to exit
0 Q# B7 l0 |. c# m6 c, Q" `2087181 ALLEGRO_EDITOR DFM DFM reporting false positive hole to hole with stacked microvias
+ N8 ~: O: X9 E* U5 v6 x2272112 ALLEGRO_EDITOR DFM Mask: Exposed etch area does not work for cline
& q4 S+ K3 l0 G3 p5 P$ p( S$ I( ?2341080 ALLEGRO_EDITOR DRAFTING Allegro PCB Editor crashes on moving module+ e3 M/ L. a& v) I U" P5 h
2348334 ALLEGRO_EDITOR DRAFTING Allegro PCB Editor crashes on Component Move/ Y$ h6 b: @# O! |
2271904 ALLEGRO_EDITOR DRC_CONSTR DRC missing for static shape which has an overlap with Route Keepout
) s8 I8 N. s2 s2341989 ALLEGRO_EDITOR DRC_CONSTR Allegro PCB Editor crashes while performing Update DRC.
, h# Z2 B: T4 a: m( ?( \" x; W2180397 ALLEGRO_EDITOR EDIT_ETCH OrCAD/Allegro PCB Editor stops responding during add route) ?& l6 l' j ?, @
2185709 ALLEGRO_EDITOR EDIT_ETCH Film Area Report stops responding" `0 ? N3 D; g: e: f
2341753 ALLEGRO_EDITOR EDIT_ETCH Random crash of Allegro PCB Editor
. B9 J6 G8 `, J; n" Y2267702 ALLEGRO_EDITOR EDIT_SHAPE 'Edit - Split Plane - Create' crashing Allegro PCB Editor9 ^+ t' Z9 Z$ z) F% X* I9 S
2175472 ALLEGRO_EDITOR GRAPHICS Infinite cursor disappears when dragging a component to a new location.. I* p9 M6 \( H4 V
2184194 ALLEGRO_EDITOR INTERACTIV New Via Array command usage model issues: Clicking to place vias leads to selection of shapes( ?6 P) H+ Q( x( `' Q' Z0 G7 @
2242133 ALLEGRO_EDITOR INTERACTIV Line arc with line font and width not displaying correctly$ ^3 B Y, n9 H6 D4 f8 f6 S
2244420 ALLEGRO_EDITOR INTERACTIV Highlight SOV is not flagging clines that are within sov_spacing- o- f- h( I7 ?( y: V" s
2293704 ALLEGRO_EDITOR INTERACTIV "Oops" command during 'add rarc' command does not revert back to snap grid of cursor
1 F1 g& M8 L3 x/ S2304773 ALLEGRO_EDITOR INTERACTIV Cross-probe with Capture prevents subsequent part selection in Placement Edit Mode: ?' a- h; R S( A6 x q+ J# [2 P
2309994 ALLEGRO_EDITOR INTERACTIV Place -> Via array cannot be placed after preview by clicking on shape in release 17.4-2019/ R4 v* @) {4 m* G4 S
2312593 ALLEGRO_EDITOR INTERACTIV Cannot commit Via Array placement within a shape using Single Side option; g" C4 [6 P5 ~
2315052 ALLEGRO_EDITOR INTERACTIV Cross-probing issue when multiple parts are highlighted in Capture, sometimes not highlighted in PCB Editor.
# J2 ~3 l$ S! X( U1 ^2321401 ALLEGRO_EDITOR INTERACTIV Cross-probing issue when selecting multiple parts in OrCAD Capture: Does not highlight those in PCB Editor
4 s( k. J2 S" x2324879 ALLEGRO_EDITOR INTERACTIV Rotate with function key followed by 'ix' moves component to unexpected location
( Q# I: C+ g6 s, }4 D, t2334085 ALLEGRO_EDITOR INTERACTIV Data tips not appearing if cursor moved quickly to next element.
_' g% P1 A& p' `4 K, Z2346770 ALLEGRO_EDITOR INTERACTIV Unable to place Via array on shape with Array Parameters "Type" as "Single Side"! ] [- Q& q. ^9 j$ d
2347531 ALLEGRO_EDITOR INTERACTIV Copy command results in wrong location while using 'oops' followed by new position in release 17.4+ `5 F/ p2 V0 x O; v( i N/ \3 h
2360755 ALLEGRO_EDITOR INTERACTIV Rotate with funckey moves Symbol
) i, F* I0 {0 G; I2366514 ALLEGRO_EDITOR INTERACTIV Cross-probe issue in PCB Editor and Capture CIS in release 17.4-2019, HotFix 012: No element found
) c5 ^& m- p% k {" @" g1 u- g# m2132582 ALLEGRO_EDITOR IN_DESIGN_ANA Messaging in command window does not appear in the journal file.
5 Q% W' z! V9 _: m6 w' A2306827 ALLEGRO_EDITOR IN_DESIGN_ANA Rise Time and GeoWindow max value limitation to 1000mil and 1000ps
/ X- u! k1 Z- ^9 B# e1 n8 H2121233 ALLEGRO_EDITOR IPC Exporting IPC2581 from board is not including tolPlus and tolMinus for thickness of TOP and BOTTOM
/ C2 i8 d! s9 j/ {2295545 ALLEGRO_EDITOR PAD_EDITOR Import of XML for pad stacks not working as expected: Pad files not generated
, o6 _: Z; ]2 w% ~$ r: v$ M2286761 ALLEGRO_EDITOR PLACEMENT Not able to place via array around void in release 17.4-2019 while it is working fine in release 17.2-2016.7 @5 \* W# s# g+ V. @
2309866 ALLEGRO_EDITOR PORTING Allegro PCB Editor performance issue - slowness with Xorg high CPU occupancy rate; G; g. G! i$ i
2350452 ALLEGRO_EDITOR SCRIPTS Incorrect table (vertical) header popup in release 17.4-2019
" h. J& S+ c# G; _3 j2125268 ALLEGRO_EDITOR SHAPE When shape outline is located at specific area, shape is not working correctly.0 f6 @, h* d# P' G; {
2342307 ALLEGRO_EDITOR SHAPE Performing operations such as voiding on shape gives error (SPMHA1-507) stating PolyBool has hit an assert5 Y# l9 v) D U+ {
2308042 ALLEGRO_EDITOR UI_FORMS Color dialog text hidden by checkbox in Allegro PCB Editor light theme: @, t* G. H6 e. D) s; X" o. q
2318019 ALLEGRO_EDITOR UI_FORMS Allegro displays garbled text7 q. v! Q7 W6 v" z' m
2338953 ALLEGRO_EDITOR UI_FORMS Scroll zoom and arrows pan do not work when certain commands are active
7 U. w6 {- h: v, A9 T/ [; d. u2345208 ALLEGRO_EDITOR UI_FORMS Change event does not work well in String field of Grid in form
% A! M- k! r" i8 V! c2351653 ALLEGRO_EDITOR UI_FORMS Cannot switch to other alias or funckey unless command is canceled after setting Alias or funckey for zcopy shape
. K0 r1 n3 j0 }; r2353126 ALLEGRO_EDITOR UI_FORMS The POPUP fields in Test Form have a triangle sign2 }! p# I9 z6 U5 u+ \) ?* k
2363394 ALLEGRO_EDITOR UI_FORMS Padpath text hidden in Allegro PCB Editor in light theme% ?! h, z+ J& `! o' y
2257512 ALLEGRO_EDITOR UI_GENERAL Split view Horizontal and Vertical are mixed up
; x1 _' b2 r! S, k2262412 ALLEGRO_EDITOR UI_GENERAL Allegro PCB Editor crashes on using SKILL GRPDrwUpdate() API because GRPDRWDATA->hwnd is not initialized6 H/ Y7 p: c2 Q# \ U) m, \ F+ ~8 |: i D
2265250 ALLEGRO_EDITOR UI_GENERAL Checkbox not center justified in Grid form in release 17.4-2019
6 r, S& w& V* C8 U) m9 q q0 f1 b b2271500 ALLEGRO_EDITOR UI_GENERAL Very slow switching between views with infinite cursor
/ Y6 p; e# I4 X, Z$ |2293753 ALLEGRO_EDITOR UI_GENERAL Issue with using SKILL in Design Workflow: PCB Editor command does not run if added after SKILL command in a task1 i0 P1 `6 r8 J/ w8 y$ f9 q
2301681 ALLEGRO_EDITOR UI_GENERAL The Edit>Text command in the layout is creating cursor overlap while editing the text.- i0 ~5 R2 s0 ^+ R, f% w
2302399 ALLEGRO_EDITOR UI_GENERAL Edit Text display issues with insert mode: Not redrawn after text edit done, showing old removed characters- A7 F* P1 M! C
2315467 ALLEGRO_EDITOR UI_GENERAL The border option does not work for text fields depending on other fields around it
8 j% d6 V$ v$ F5 o& Q3 |% Y6 d$ B2322601 ALLEGRO_EDITOR UI_GENERAL The cursor disappears when editing a shape area and drag edge if infinite cursor type is being used.2 M( y" K$ _* [ Q" Q( b
2324334 ALLEGRO_EDITOR UI_GENERAL Menu entry missing using OrCAD Professional or OrCAD Standard license for Tools - Padstack - Refresh
$ f. l( H! C" q* R& ?0 w4 B* Z% F( l2337176 ALLEGRO_EDITOR UI_GENERAL Visibility pane cannot be correctly resized' C$ H; p/ o! Z5 j) B
2338704 ALLEGRO_EDITOR UI_GENERAL Cyrillic text not shown correctly.
, S( c2 A% n" N/ A: v2341742 ALLEGRO_EDITOR UI_GENERAL allgro_lock_toolbar resets on restarting Allegro PCB Editor
4 T: m% K5 r3 u) X) i% _2341757 ALLEGRO_EDITOR UI_GENERAL Textbox size is small: Cannot enter value for spacing to align components.2 M( s, U0 X! K" N; A
2345084 ALLEGRO_EDITOR UI_GENERAL World view not working correctly and does not display cutout with latest hotfix of release 17.4-2019
/ k+ b1 z* v: N" e, i/ b9 U2 @. F4 N2347282 ALLEGRO_EDITOR UI_GENERAL Very slow view loading and redraw in release 17.4-2019 hotfix.2 w1 ^, l2 ~; Z4 | e
2354524 ALLEGRO_EDITOR UI_GENERAL Large space in command line between command prompt and typed text% ?. N# a: G/ T7 \& A
2356220 ALLEGRO_EDITOR UI_GENERAL Window size is bigger in release 17.4-2019 compared to release 17.2-2016 because of white space
' z" Q6 I& w: C2356985 ALLEGRO_EDITOR UI_GENERAL Cannot shrink menus to min size
5 L6 o! E2 T' h2357540 ALLEGRO_EDITOR UI_GENERAL axlUIWTimerAdd() function not generating elapsed time correctly in release 17.4-2019
: d( p! Y3 M) Q. B5 x# Z2 l1 X/ N2359766 ALLEGRO_EDITOR UI_GENERAL When using Edit > Text in release 17.4-2019, the cursor under the text turns into a gray/white bar+ V e) M8 G3 {( l# v, j
2168386 ALLEGRO_EDITOR ZONES Bend Area also bends the rigid part
$ P. E q- l; L# Z1 V: i2078434 ALLEGRO_PROD_TOOLB CORE Shield Router - cline end caps treated differently than cline-segment end caps
- E' q3 p O, }& J f2101020 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC with multiple net classes: script selects only the last two classes in a group8 i% c% W& p* h/ b% b! s
2150291 ALLEGRO_PROD_TOOLB CORE PCB design compare cannot compare Cross-section layer name with space V% r! L5 D3 U* T/ y
2075523 ALTM_TRANSLATOR CAPTURE Translation issues with third-party PCB and Schematic
# f, E1 I% K5 x: d& Y2336558 APD DATABASE AREF degassing for Gerber export
/ u" K( D* V& o( q2222216 APD LOGIC Part is not highlighting in Logic -> Edit Part List0 r1 J9 q$ l) X5 d# H% J* s/ O% q
2354236 APD UI_GENERAL Manufacture - Artwork: Wire bonds visible when Film view selected
E3 b0 c$ C& @7 d/ n2249404 CAPTURE GENERAL Place Part > Add Library > Browse dialog stop taking key board input after Create PCB Netlist) E \2 u) B! v' h* L
2199790 CAPTURE NETLISTS Netlisting from command prompt gives different results in release 17.4-2019 and 17.2-2016
! q6 r2 A9 t( {4 s& F( q2340813 CAPTURE OPTIONS OrCAD Capture changes canvas theme after PDF export* ?) G! W& z i
2343788 CAPTURE OPTIONS Export PDF changes color scheme of schematic U' I1 N) E- @0 l
2213702 CAPTURE SCHEMATIC_EDI Wire signal, which is part of NetGroup, on top level of a hierarchical design is not shown in signals command results.
0 }( x7 a' }. o3 k. Q8 a6 S2 C, y2264254 CAPTURE SCHEMATIC_EDI Crystal Report from Capture in release 17.2-2016 does not display Japanese characters correctly
$ k& t8 r% r) Z' I8 I1 a% Y0 e2278930 CLOUD_INFRA COMPONENT_EXT Unable to get parts from third-party Search Provider
0 {2 f4 N2 O! O0 b! H5 V2313388 CLOUD_INFRA STARTPAGE Capture starts slowly when Start page is enabled
6 V3 \' j) `% T5 V0 [' \2332357 CONCEPT_HDL CORE Unable to backannotate or perform 'design sync' from PCB Editor to Capture' o" _. K7 d+ w, H1 g
2333126 CONCEPT_HDL CORE Design sync fails when the temp folder is missing in root directory
/ u/ H6 `( ~- r8 W( j' @2306359 CONSTRAINT_MGR ANALYSIS RPD Match Group DRC errors occur after refreshing symbol for silkscreen corrections.3 d6 P+ q x( U( m
2239908 CONSTRAINT_MGR CONCEPT_HDL Cross-probe is not enabled in pre-select and post-select mode in Allegro Design Entry HDL.
: o2 a! ^. a8 K4 Q# C2307873 CONSTRAINT_MGR CONCEPT_HDL Cross probing disabled in PCB Editor when adding net to a Class in Constraint Manager.
* L) Z$ E( e1 s2238753 CONSTRAINT_MGR DATABASE Pin delays in Constraint Manager showing 3 digits resolution even if pin delay is defined with 4 digits6 Z# m ~ Z) s4 N
2351214 CONSTRAINT_MGR ECS_APPLY Importing constraint file in OVERWRITE mode does not delete some ECSETS permanently; G0 L0 \. @; I* h9 f; C
2226652 CONSTRAINT_MGR UI_FORMS Release 17.4-2019, Constraint Manager: Height of column headers is too large
' ]! R' y2 l+ @2 W1 Q2226663 CONSTRAINT_MGR UI_FORMS Release 17.4-2019, Constraint Manager: Cannot auto set column width by double-click
! q* Q+ I4 b. l( `% B$ K5 Z2341522 CONSTRAINT_MGR UI_FORMS Release 17.4-2019: Filtering in CM for Prefix or Suffix does not work8 [ D8 s7 B" K1 ^ `
2251671 PCB_LIBRARIAN SYMBOL_EDITOR Drawing or custom shape shows small overlap after reset origin
, i/ C/ d0 Z- R: \! \6 B* V5 d& \2306865 PSPICE LIBRARIES QVBICN model issue: Model and implementation pin mismatch and part moved to different library
. B X! N$ X' |' P: q2345948 PSPICE LIBRARIES Default PSpice component cannot be placed from PSpice Search
* A) h* M: ?9 [5 L2346793 PSPICE LIBRARIES PSpice install has issues finding "XFRM_NONLIN…" parts.0 E4 z& {& [. d
2320996 PSPICE TI_CONTRACT Library update causes simulation errors (ORPSIM-15115 and ORPSIM-15107)* V4 n1 R( O/ L3 I
2358318 PULSE ADHOC Allegro System Capture crashing when copying or pasting part or adding new part to design
8 o6 o' v# I& S. X' V& `: j2359260 PULSE ADHOC Commits are denied and incorrect status/versions displayed in Project pane
2 G! b% @6 ?- k6 j! Z2341542 PULSE CORE Versions from Pulse Server using FQDN & Intermediate Cert. Authority (Atom): Control & ad hoc collaboration not working
+ F/ z! N8 b' F1 p7 p5 n; I7 f4 V2262023 PULSE UNIFIED_SEARC Some object types being ignored during release 17.2 to 17.4 EDM database uprev
5 [5 z1 o' g8 P* S& \8 Z0 m8 ~, K4 d2356310 PULSE UNIFIED_SEARC Unified Search text color should be much darker in the results section
* B* ~- w0 g0 b T; g2329757 PULSE VERSION_ON_SA Pulse tray not launching. j( n% q) J1 H; U2 U
2311689 SCM OTHER SCM crashes during port assignment# V! _/ R# E9 o: y% P/ W/ U
2339272 SIP_LAYOUT UI_FORMS Latency observed in APD Plus in release 17.4-2019 when running SKILL code
" D8 k# z; }" F7 r% c @2345888 SIP_LAYOUT WLP Advanced thieving patterns in .gds shifted after stream out
3 z( n- S% `7 x& W( W4 D) c2356097 SIP_LAYOUT WLP Importing external DRCs results in error3 x% G* H3 X2 }. @- y1 C8 D
1972290 SYSTEMSI COMMON case-insensitive in mcp header editor, k+ i3 K6 E" C# R
2139994 SYSTEM_CAPTURE CAPTURE_IMPOR Importing OrCAD Capture designs fails for spaces in package name
; i7 ^1 f% x, ]2 a1814813 SYSTEM_CAPTURE COMPONENT_BRO System Capture session log should specify the CDS_SITE path for the current session
, b- z8 J+ I- F: X0 z- f3 X2089112 SYSTEM_CAPTURE CONSTRAINT_MA Constraints are imported as read-only in System Capture from a DE-HDL design
& d. f3 p5 S2 j I/ N1 w2242032 SYSTEM_CAPTURE CONSTRAINT_MA XNets issues in designs migrated from release 17.2-2016: Cannot add XNets across some resistors after removing" z0 J! [- N0 Z J3 [9 s q
2334411 SYSTEM_CAPTURE HSS_DESIGNEDI Packaging Options for Block dialog, Reference Designators tab: Sample text for both suffix and prefix is the same
9 T& x% \3 c% f4 @: e1893897 SYSTEM_CAPTURE IMPORT_DEHDL_ Notes in Japanese from DE-HDL designs do not import correctly into System Capture
% Q! x* I7 r" }( g1983793 SYSTEM_CAPTURE IMPORT_DEHDL_ The ground symbol differs from the power symbol
1 U' @. }1 `+ f. `0 k0 S$ w8 i2025950 SYSTEM_CAPTURE IMPORT_DEHDL_ Broken connectivity on imported ground symbols
6 n/ W( `4 A# ?5 E7 ?1969979 SYSTEM_CAPTURE MISCELLANEOUS 'Power_Group' property not working correctly with System Capture
% ?% M1 i! X+ [! K2006600 SYSTEM_CAPTURE NAVLINKS Placement of navigation links: placed on top of port/off page symbol and inconsistent alignment. g i% `' A$ p6 C! `) p) h- y1 c2 u
2018961 SYSTEM_CAPTURE PERFORMANCE Moving objects and/or groups of objects is very sluggish
+ `! L3 h( B( H& I2 N4 U1 r# D2084693 SYSTEM_CAPTURE PERFORMANCE Performance improvement required in System Capture$ L) {2 ?' j+ Y
2114146 SYSTEM_CAPTURE PERFORMANCE Design takes a good amount of time to open
, f6 v5 G8 Y1 S, M$ O# O' @6 N% G1902347 SYSTEM_CAPTURE PRINT Prints all sheets if one sheet is specified as the print range, x( Y( J- [8 `$ J; u
2182607 SYSTEM_CAPTURE PRINT System Capture crashing while trying to print
5 f: M0 @! v" d9 T- @2342128 SYSTEM_CAPTURE PRINT The right edge of the options area is cutoff6 h5 T# _4 e4 {% b) D# X, J
2106307 SYSTEM_CAPTURE PROPERTY_EDIT An orphaned VOLTAGE property gets attached to the page border
3 Z' g! H" v9 h& C" y6 M7 n2080707 SYSTEM_CAPTURE SELECTION_FIL Cannot select component that has a block shape drawn around it.9 j9 m4 @) r6 I1 B
2141023 SYSTEM_CAPTURE SELECTION_FIL Place drawing objects behind the components
; ^4 p4 b2 R7 V* I& j2041272 SYSTEM_CAPTURE SMART_PDF Smart PDF displays extra box outline if component is selected) p0 K# ?6 ?7 L* D' h$ z
2065768 SYSTEM_CAPTURE SMART_PDF Custom Variable in Table Object not getting passed to PDF! m: V3 X! A. e% X. L
2269518 SYSTEM_CAPTURE SMART_PDF PLM system cannot process older versions of Smart PDF files! Q7 T# X9 b5 A- E4 w/ ^. @
2298673 SYSTEM_CAPTURE SMART_PDF Smart PDF crashing when Remote Desktop Connection is used
7 }5 A# t; ?0 N" v/ @ h& c' G4 A2318787 SYSTEM_CAPTURE SYMBOL_GRAPHI Pin numbers overlap bubble pin stubs
! c/ X4 c" k, d2082594 SYSTEM_CAPTURE UI Component Replace should seed the Component Browser with the part's existing properties1 a( c: R! o/ ?; u5 N% p
2218534 SYSTEM_CAPTURE UI 'Auto Create Differential Pairs' command missing from the Tools menu" q1 r4 u$ i- f5 d+ D5 W
2221714 SYSTEM_CAPTURE UI 'Tools - Auto Create Differential Pairs' menu option is missing
5 ]; \- P; [" f K0 y5 O+ H2269532 SYSTEM_CAPTURE UI Voltage values missing and incorrect names displayed for power symbols
) W7 [- m) ?( C4 X5 O- q2274042 SYSTEM_CAPTURE UI Bus tap bit number XY location and symbol colors changing
3 g: D; Y# H/ r0 e2354836 SYSTEM_CAPTURE UI Moving objects causes it to appear very far off the page
$ }/ B) G2 T: ~4 n1 M( I! b* M5 g2361110 SYSTEM_CAPTURE UI Moving a border shape with a text box inside causes both to disappear
5 a! i& `! Q8 x9 N# u# O2193445 SYSTEM_CAPTURE VARIANT_MANAG Box object prevents selecting a part in the variant view
' k7 g- P* V' P2283596 SYSTEM_CAPTURE VERSION_ON_SA Misleading message displayed when a user did not have the required privileges& F8 C7 h& _+ R; @
2010029 SYSTEM_CAPTURE WIRING Zoom is too slow when zooming into a smaller area9 I2 v2 P9 i3 E; s# N
2209521 SYSTEM_CAPTURE WIRING Scalar net name 'synonym' wins and is assigned to bus
+ F& K1 y5 l# P; }2290743 SYSTEM_CAPTURE WIRING ALLOW_4WAY_JUNCTION directive not working as desired.
; I. F! p# O8 d0 P1 U6 Y2340292 SYSTEM_CAPTURE WIRING Net names move automatically when connecting a named net with an unnamed net.; ]( I# `+ p G7 J( Z
2253244 TOPXP AMI_BUILDER Capability to build standalone Tx or Rx AMI model in Parallel Bus Analysis workflow) t9 t0 j. f8 S0 `6 S) K
2296478 TOPXP GUI Auto-shorting causes duplicate SPICE R element
/ S Q% B2 }2 S1 l0 |& K2 @2305071 TOPXP GUI Difference in results at Tx power with same setup in release 17.2-2016 and release 17.4-2019
! q5 O* _ { H# i1 F2188372 TOPXP SYSTEMSI Channel Simulator results incorrect when IBIS CLK model is different for P/N buffer outputs
( V: I* k. P/ G; R$ V: n3 @8 ~2218575 TOPXP TCL Provide Tcl support for editing AMI model parameters in Topology Explorer
. P$ E' H, @: c, L( E5 G2356260 TOPXP TCL Topology Explorer - Tcl commands to automate the entire Sweep Simulation needed |
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发表于 2021-1-6 10:46
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