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EDA365电子论坛网»电子社区 › EDA工具&PCB设计 › Mentor Xpedition论坛 › ForwardAnnotation.txt 哪里有错误
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ForwardAnnotation.txt 哪里有错误

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mentor.

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发表于 2011-5-5 22:21 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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本帖最后由 mentor. 于 2011-5-5 23:15 编辑 + `% l9 {/ o; E! k" i  i
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         Forward Annotation
9 S# _& \4 {% U                               ------------------8 [" f% C; l7 [! r# O0 c" ^
                         10:19 PM Thursday, May 05, 2011
) n5 J. ~- q; N2 z3 G2 l$ L                Job Name: C:\WDIR\MyPrj\NIOS\NIOSii\PCB\NIOS.pcb: b* @% w" p" C3 g

* Z6 ?, o" z5 b9 O6 C* z, m7 _5 BVersion:  01.01.00& M1 k1 d3 C% ^3 k" p
     The PDBs listed in the project file will be searched to satisfy the parts$ p% j7 t; e  F# |  @
      requirements of the iCDB only for parts not already found in the
" w* _. M$ M$ R/ O      Target PDB." u5 u' ^' m* }' t. i
     The schematic source is a Common Data Base.2 [, Y: t% B. E
     The AllowAlphaRefDes status indicates that reference
- {" j: i" W9 y$ f0 o) M9 G      designators containing all alpha characters should be deleted/ D" _: C1 T/ }- D% D  x- e, U/ D
      and the relevant symbols repackaged.0 `  v8 W2 C, q2 \) K
8 B- l5 s- |  v' @
     Common Data Base has been read/ |) |6 R3 K+ Z" X& h7 r
     Target PDB Name: Work\Layout_Temp\PartsDB.pdb' ~1 |) s1 y% A2 F
     Number of Part Numbers: 20
+ O" h8 o! e4 K          Part Numb: AMS1117 -> Vend Part: AMS1117 , J+ s" C" p2 ?5 ]
          Part Numb: Cap220UF -> Vend Part: Cap220UF
2 N% j1 \3 A. }$ I" ^          Part Numb: Cap0805 -> Vend Part: Cap0805
) M. A) i2 v8 ~/ v7 d          Part Numb: Cap1210 -> Vend Part: Cap1210
" e4 B, k! [+ S/ L8 t# p          Part Numb: Cry_50M -> Vend Part: Cry_50M * H: l' X" u0 C7 F
          Part Numb: DC_POWER -> Vend Part: DC_POWER $ j* ^) u' B" Z1 K
          Part Numb: EPCS4SI8 -> Vend Part: EPCS4SI8 * g. W/ X% l3 |" v  N$ D
          Part Numb: EP2C8Q208 -> Vend Part: EP2C8Q208
  r; Z2 X6 Z/ Z; O/ z          Part Numb: FB -> Vend Part: FB ! o( }$ }* M6 s6 ~& ^
          Part Numb: Header10 -> Vend Part: Header10
/ d( b" H* T) \8 G* z2 b9 T5 W* E7 E3 |          Part Numb: Header25x2 -> Vend Part: Header25x2 5 R5 G0 N8 A  C, y6 R
          Part Numb: IS61LV25616AL -> Vend Part: IS61LV25616AL
+ v# |" o2 E- `6 f& o1 k5 L          Part Numb: JS28F320J3D -> Vend Part: JS28F320J3D % ]" J+ z" o( @$ F; E  M
          Part Numb: K4S281632K -> Vend Part: K4S281632K
( b( k; f+ Z7 f+ e+ T. n          Part Numb: LED -> Vend Part: LED
' J$ l! Q  P; t# N( t. q+ M          Part Numb: Res0805 -> Vend Part: Res0805
& m* P* g  v. H- I          Part Numb: SMB -> Vend Part: SMB $ A/ {5 B  R  b6 j* k
          Part Numb: SW -> Vend Part: SW
0 f5 s5 x( ^# \" I" ]6 v5 J          Part Numb: SW_90 -> Vend Part: SW_90 2 u3 z4 M5 E4 _7 d0 n0 c
          Part Numb: SW4 -> Vend Part: SW4
. @) g7 }  B! S, |' A( w$ J4 O3 I1 j     Number of Part Names: 0
  {! `- S& @8 j3 J" K# s; w     Number of Part Labels: 0' o, z. |7 D" K. ~0 ]3 S- U
) U( H# G! J% g. i- K% f

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mentor.

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2#
 楼主| 发表于 2011-5-5 22:22 | 只看该作者
Checking for value differences between symbol properties and PartsDB properties9 v0 }1 x& _0 s6 M+ ?. F8 T: L
2 @/ x# K+ n: B& N7 ?
     Checking the validity of the packaging of prepackaged schematic- s( e4 o$ i' K- x
      symbols.  Only the first error in symbols having the same3 x/ l' G6 }7 i! L) M! E& n2 X
      Reference Designator will be reported.
: U4 i. f6 m0 Y& S: H8 r3 F! L
8 z9 B- f9 b" P" Y6 X* g4 l; o     The packaging of all prepackaged schematic symbols is consistent6 L9 J. P) T. a* f" B/ c
      with the Parts DataBase data for the cross mapping of5 \0 X6 h; B) {4 O; h
      symbol pin names to Part Number pin numbers.
. k, y& G; e- L( T- ~      Symbols that were not prepackaged will now be packaged correctly.
( y9 T6 A8 j  B: {      3 a: m+ J: G4 v9 c' n& n/ M
     No errors in Existing Schematic Packaging.
$ `% M  x- s. @( C' j  f9 _  E7 _+ V1 E1 z
     The Common DataBase has been read and will be packaged./ ^5 F+ ~$ Q' t" b( u4 K! m
     Clustering 109 Symbols:
+ @  _4 j4 o; a7 c& v! P             109  ********
3 @+ Y0 ~+ Q) ?9 Z0 p$ O! R( W             100  **************************************************
; I! N! g6 {3 |' c& k0 u( V              50  **************************************************
$ \9 S( ?. d; N6 h3 q& J" Q" x     Clustering is Complete
4 h7 b/ ~# t! G5 C# x- ^9 [/ g( f% x% {7 [- {- `: e
     Packager Assignments successfully completed
9 z3 Y! f, G6 P2 ]0 n& e/ @; Z/ O

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3#
 楼主| 发表于 2011-5-5 22:23 | 只看该作者
187 nets were found containing 676 pins) t1 }) j/ _$ N' O! R
     101 components were found9 u7 h. U, f6 r5 d. Y6 m! y  K- K
$ _$ n* I* p6 C* ?
     WARNING:  Cell  could not be found in the CellDB for/ y+ Y+ a; q! G9 }4 @
      Part Number K4S281632K.) K8 {/ D) c7 h( p" r
( H3 q8 w1 w* g  ~5 ^# \
     WARNING:  Cell  could not be found in the CellDB for/ v, O6 R& o6 l& V$ q4 d1 j
      Part Number IS61LV25616AL.
0 b8 c( Y/ Z6 G7 `
9 B& a" l* a4 _( {. K. ]! ]/ [     2 Pin application warnings found as noted above.# _9 u6 H; ^6 I+ B: O

! e  `; @- g7 C; e! ~4 O& H# I2 ?     Creating a formatted Schematic Netlist (LogFiles\SchematicNetlist.txt)...
: B  C1 {6 W- g9 {% i     A formatted Schematic Netlist has been created.
# @  c7 y( c4 R$ z! J3 @% ]! U
( j  `0 @  B: a/ Y     The Logic DataBase has been compiled from the Schematic Design.1 E+ C/ K& j% T4 |5 A7 G3 }
      Use Netload to bring the Component Design into sync./ Q* [9 `9 n$ d  y
* Z2 j. a% z& v; y, m) h% O
     This Logic Data was Compiled with 2 warnings.
# U- J6 U) T( `) k! z% V      Erroneous results may occur if not fixed.
, k' P0 O+ X; O3 v! j# H# `, j; C2 N# ~9 S9 O$ \
                                     NetLoad6 e% U0 h2 M. ?( p
                                     -------* u& @" Q& k% J8 q* R( T

, h, @) \7 o7 _( y                         10:19 PM Thursday, May 05, 2011/ r' s: J$ t2 D
                Job Name: C:\WDIR\MyPrj\NIOS\NIOSii\PCB\NIOS.pcb; o" N2 R9 Y" g. N
# G9 o: K, y, u

3 f- r4 F5 ?7 V- G9 z% YVersion:  02.11.12
* T4 _  ~( [9 ]$ Z$ h% O: \) k, w
* s4 X* b' i2 f0 p& A        Netloading the Layout.  Unused components will be changed to spares.
( f' b4 g; }0 {$ e9 Y% G, R4 p; }  ~# P
        Unconnected pins will be set to net "(Net0)".2 ~: L' v% q% g3 ?/ K
3 V/ Z( U) x+ x
        Schematic reference designator changes will be forward annotated., G- v* c0 ~5 J3 c: I; v
/ q1 x- [4 I. z3 W* K

2 i1 @; N' Z+ @! i# `     "C17" is being converted from a spare to a "Cap0805" part.
9 W0 A# E* q- ^- O: j0 k# k
0 O& @5 ?+ W* h- s1 L+ w     Netload completed successfully with 0 warning(s).
# o% _( F! p- @. Y6 _9 F3 z0 H( K     ' k1 n, K; q+ M. n
     Back Annotating...
4 ~) v& e! m9 c( l2 G: [( _# t4 d0 X/ h
$ \4 {& E3 W1 ^2 h  Updating Logic Database.../ Z9 @5 ]4 k$ J6 G

. }5 Z5 Z, }; t! n     Version:  99.00.056 h* O$ A" n7 r! I9 |
. ~; x3 ~2 l" r. O6 Q5 U" _
     No changes made to Existing Schematic Packaging.6 C5 A" {$ h; U+ f( N3 ^  F
6 W( U6 A% z# K
  t8 Y, D+ V, j0 ?1 }
     There is no symbol data to be back annotated to the schematic source.

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4#
 楼主| 发表于 2011-5-5 22:24 | 只看该作者
  The Logic DataBase has been updated and the Common DataBase has2 \' |6 j1 l3 P0 o
      automatically been brought into sync with the Logic DataBase.1 ]3 G9 W( f% P# O9 G* r% j. `
      Please proceed with your design.! g8 l+ v& @: }) @; N7 X
( B7 W1 B' Q' Q) J+ G
     Finished updating the Logic Database./ e5 P0 G" ?* g6 F  u0 T; [

+ Z1 z9 O% {' C& f% Z" E" q, h3 v+ J     Creating a formatted Schematic Netlist (LogFiles\AfterBakAnnoNetlist.txt)...
. _  h8 y$ D* H8 z' s6 n1 E1 V) K' L; G     A formatted Schematic Netlist has been created.
* K) H, T3 E3 \3 L0 B; X6 z( x, _+ Y2 L9 Z! `* K: C
     Creating a new netlist text file (LogFiles\KeyinNetList.txt)9 L+ w% Q* k* g5 ^* O; G2 {9 n9 Q
      from the Logic Database (Work\Layout_Temp\LogicDB.lgc)...  {. F/ c6 F% V  c% k2 |! V
  A new netlist text file has been generated.
+ {( n( @2 n% O) V% ?0 z
  K; ]/ y! R5 y4 T6 }# ^( [! c7 R( @# O+ @
# |$ C! V* d9 b
                 Beginning Netload on the Layout Design.% N' `' Q' U; h4 g, Z' O6 |* C8 X" O1 S
           ---------------------------------------------------9 m2 @' ]' E+ t6 L7 z1 R0 d) U& j' B

  V: V9 h) _, L. V" Y4 H. rForward-Annotation on the Layout Design has been successfully completed.; }' g8 D( n& I

. _" ~! _0 ?2 a( s/ YThere were 0 reassignments of nets.8 d1 y# B$ j$ h1 X* }# D; w; Z
There were 0 traces broken back.
0 z1 m: B: T, l6 _+ HThere were 0 nets removed from the Layout Design.

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mentor.

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5#
 楼主| 发表于 2011-5-5 22:28 | 只看该作者
这是一个forward 的log, 是什么原因不能Foreard 呢？

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ugqy

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6#
发表于 2011-5-6 17:42 | 只看该作者
  WARNING:  Cell  could not be found in the CellDB for
$ A9 N; _( ~  ^1 y      Part Number K4S281632K.2 P% S6 j  @$ _* m  ?. K+ e
6 ~; Q) i7 @9 ^: i0 S, c* c
- X+ ?) k4 _2 p     WARNING:  Cell  could not be found in the CellDB for6 ^+ {. Z. ~+ T: K* ?# v/ Y! G
      Part Number IS61LV25616AL.
- c+ I2 X4 ]* o$ ]* Z, v这2个元件是不是在原理图里面更改了part number。导致LIB中不能调入？

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