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有没人测试过STC32G单片机的编码器模式。/ f! |1 x1 _8 k7 J, {) r4 d
1.例程 中 P1口选择P1.0 ,P1.2 ,STC32G 没有P1.2 。这么郁闷的事也有。
6 B3 A1 M( ?1 o8 I' b; o( @2.换到P2 口也没反应。
6 i% ?+ r3 C& n9 I8 T' k6 a* A& T3.找到STC8H的编码器历程也不能用。% A" O Y* Y8 Z
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下面是STC8H编码器模式历程:
3 Y1 j, Z7 D" R#include "reg51.h", ~ A' N/ N8 e: M
#include "intrins.h"$ ^1 y( M7 h- ?& |4 B) q+ b2 d
7 L& K g: G1 P8 r, X6 p! Wtypedef struct TIM1_struct
4 }' j) W8 }4 D1 g{0 h3 C& |# J& X8 y1 ?% K+ y3 h
volatile unsigned char CR1; /*!< control register 1 */: A+ _7 l) D. g5 y
volatile unsigned char CR2; /*!< control register 2 */
3 S$ ?! P2 K7 Q5 \5 k% {4 V volatile unsigned char SMCR; /*!< Synchro mode control register */0 b9 r) O% K# f* I! x& Q- v" E; ~1 w
volatile unsigned char ETR; /*!< external trigger register */
3 T4 |8 w* m1 b9 ?5 h5 f volatile unsigned char IER; /*!< interrupt enable register*/) l1 X' I& U8 |, v4 \; M0 u
volatile unsigned char SR1; /*!< status register 1 */ e4 v( I7 i, J
volatile unsigned char SR2; /*!< status register 2 */. e: D* A4 q& _' J0 n) f' K/ S6 E
volatile unsigned char EGR; /*!< event generation register */* V A/ E8 f5 K6 B# G
volatile unsigned char CCMR1; /*!< CC mode register 1 */- g5 F* a( W; c! ^
volatile unsigned char CCMR2; /*!< CC mode register 2 */
- p# a' ?+ j; g6 @* F+ `- p volatile unsigned char CCMR3; /*!< CC mode register 3 */4 ~3 I& s# L$ P0 {# g( ?3 d. @) ^
volatile unsigned char CCMR4; /*!< CC mode register 4 */
$ Q& H' V* X9 f6 A( L5 z volatile unsigned char CCER1; /*!< CC enable register 1 */4 _8 E. i0 b: r* c- ~
volatile unsigned char CCER2; /*!< CC enable register 2 */
7 S1 A2 U' b. j( w7 p volatile unsigned char CNTRH; /*!< counter high */0 b8 k+ Q6 v0 m: \3 A
volatile unsigned char CNTRL; /*!< counter low */" j9 o& @. k$ w4 Y6 V
volatile unsigned char PSCRH; /*!< prescaler high */
) E* s# @0 M5 Q) g! W0 W volatile unsigned char PSCRL; /*!< prescaler low */& }9 `0 v1 J( B- r* l$ ]3 T- Z# A
volatile unsigned char ARRH; /*!< auto-reload register high */$ x0 X4 X- z* R
volatile unsigned char ARRL; /*!< auto-reload register low */
0 e4 t( A+ r5 s% c% k volatile unsigned char RCR; /*!< Repetition Counter register */
& e- Q& y g) o! z9 t2 j5 m) s volatile unsigned char CCR1H; /*!< capture/compare register 1 high */+ T) n& l* w7 w1 [3 _9 c
volatile unsigned char CCR1L; /*!< capture/compare register 1 low */) c/ I1 ^, Z, d' q; k2 \: T- m
volatile unsigned char CCR2H; /*!< capture/compare register 2 high */5 z+ P" V$ _+ H) {
volatile unsigned char CCR2L; /*!< capture/compare register 2 low */& v$ S; I" W. g: l) D0 p5 p' C
volatile unsigned char CCR3H; /*!< capture/compare register 3 high */
1 B% {; m$ I" }7 p3 m' r, B volatile unsigned char CCR3L; /*!< capture/compare register 3 low *// h% [) O: L4 M' s2 e% ~
volatile unsigned char CCR4H; /*!< capture/compare register 3 high */
+ k0 U1 e7 S+ R' K" ~& ], D1 | volatile unsigned char CCR4L; /*!< capture/compare register 3 low */
0 f( h( `$ I* _" ~3 D volatile unsigned char BKR; /*!< Break Register */
2 q x7 `2 K9 j) N1 x% Z volatile unsigned char DTR; /*!< dead-time register */
. `; r- S2 h9 X6 b+ f4 _7 }6 a volatile unsigned char OISR; /*!< Output idle register */
$ ?, p% |4 j( _) Q. ?; n; l}TIM1_TypeDef;
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( ^, ?8 _7 L0 L) ^, x- l#define TIM1_BaseAddress 0xFEC05 _% o' x f$ q* \& C; ~. w
9 y+ o4 l" q) e( F; F
#define TIM1 ((TIM1_TypeDef xdata*)TIM1_BaseAddress)
* w+ e# k# E- b3 Q/ T: b# ?#define PWMA_ENO (*(unsigned char volatile xdata *)0xFEB1)2 k4 n" x" N C' ? N8 G
#define PWMA_PS (*(unsigned char volatile xdata *)0xFEB2) Y4 `( k: L1 B2 R$ u/ i% G7 b
V* ]4 o' H- ~# f6 S9 d* Hsfr P0M0 = 0x94;
# m' s, |2 w, t* x# d; t, x: Hsfr P0M1 = 0x93;! i, m6 w! ]: _( Q- [
sfr P1M0 = 0x92;5 c: k! @$ V& Q# H$ _4 _% J
sfr P1M1 = 0x91;
9 w1 j `1 V% O+ M6 }sfr P_SW2 = 0xba;! x3 T3 m7 x" h9 h
3 Q) L% j/ c( t* g- I. t' ?, xsbit P03 = P0^3;, E( x& S* H# f0 m
. x4 O/ a4 |' n, h! E
unsigned char cnt_H, cnt_L;& \, K3 m1 O! r' W, c) K
) \2 c2 U5 S( w8 u7 H7 z
void main(void)0 i# u' Z% K6 z6 U; s d
{
# `, m# a) j, H- k% q) } P_SW2 = 0x80;) f0 o8 {3 X* }: }! m: ~
# c% ^0 {" Q0 U$ U( n! h3 ` P1M1 = 0x0f;( f; x( q, G5 g; U6 L) G
P1M0 = 0x00;& _) N' V& y6 K/ ^2 r0 }" ^5 j
# m @) Q3 q& a& B+ @! C2 g PWMA_ENO = 0x00; //配置成TRGI 的pin需关掉ENO对应bit并配成input/ }* F: H0 t2 D! W$ V# T$ w
PWMA_PS = 0x00; //00 WM at P1
& b* H3 f' q& O$ B+ X+ Q; p" s9 I
" G7 k" `0 c8 {1 q0 c7 d8 | TIM1-> PSCRH = 0x00; //预分频寄存器! h t/ X& d0 @) u/ p* {' W
TIM1-> PSCRL = 0x00;0 j' W: r* _5 n1 \ ~
/ l+ t/ H/ K& `% C
TIM1-> CCMR1 = 0x21; //通道模式配置为输入,接编码器,滤波器4时钟" M- y% L- H& K" A( o" }5 }
TIM1-> CCMR2 = 0x21; //通道模式配置为输入,接编码器,滤波器4时钟
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TIM1-> SMCR = 0x03; //编码器模式3
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$ v/ z' ] ~+ ], l- ]) p TIM1-> CCER1 = 0x55; //配置通道使能和极性 A a+ ]2 a* b2 b: b& E
TIM1-> CCER2 = 0x55; //配置通道使能和极性8 M6 k5 t m5 ]5 ^' I) v
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TIM1-> IER = 0x02; //使能中断) X# c( j' B: r1 j+ t
( X, H; @7 q$ V' `) e% g& }
TIM1-> CR1 |= 0x01; //使能计数器; B/ P. D' G% H! Q, _- x. l0 ?& @2 a: Z
- Q+ z( Q+ j3 b EA = 1;
* |' a, y+ h# }/ ~( y) l7 r$ J4 Z
while (1); o( Q# j4 U( g
}
/ B1 e( i1 a9 K2 k
' B) {' }7 O" v7 f1 ?# {/******************** PWM中断读编码器计数值**************************/
2 V& F6 j, v( B7 I. L1 D5 Ovoid PWMA_ISR() interrupt 26( m) m5 R. J, G4 i
{
5 M4 c3 a+ d ]( [! [ if (TIM1->SR1 & 0X02)
0 ~" t( i3 N I* P$ \( M! n {" H% d' ^0 L# d$ w% a3 A2 t
P03 = ~P03;
; B0 w6 X& }8 V/ t! n/ a cnt_H = TIM1->CCR1H;, o" S7 {# m H( y/ p
cnt_L = TIM1->CCR1L;
+ S2 N, n$ E) T. u+ V- x# ~+ v TIM1->SR1 &= ~0X02;1 t* b9 a) Z7 h1 L
}
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