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Hotfix_$PB16.50.013

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发表于 2011-12-22 08:57 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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本帖最后由 yulizi 于 2011-12-22 11:18 编辑
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http://kuai.xunlei.com/d/DGOHIFKLICUP' F8 f, L/ ~+ `; l+ n
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DATE: 12-16-2011   HOTFIX VERSION: 013
+ s+ k! l, |/ U2 j# _: x6 w+ _' E3 C===================================================================================================================================
' S, ^5 ~. q3 |, V& HCCRID   PRODUCT        PRODUCTLEVEL2   TITLE' v: I& [7 |7 \4 @. f6 ~7 b0 s/ Q7 `
===================================================================================================================================4 C' N. E  Y& t
875695  SIG_EXPLORER   INTERACTIV       Enforce Causality check box doesn't work.
: @" i' b7 V/ g. Q# o927148  CAPTURE        PROJECT_MANAGER  Capture crashes on creating scehmatic folder with name which already exists in design
1 [7 |2 e1 {# L% n2 T- i+ x( W938013  CAPTURE        NETLIST_OTHER    The netlist in RINF Format contained two identical lines for PCB FOOTPRINT
* o- g- ?) X% u/ e% h+ w( B941409  Pspice         PROBE            BUG : Search accuracy wrong in new cursor window: x2 Z1 z5 k( G9 r& B
945242  SIG_INTEGRITY  SIMULATION       Unable to select "shapes" in find filter for 'show parasitic ' command+ L% y* b3 c7 U
946293  concept_HDL    ARCHIVER         Archiver hangs if there is a whitespace at the end of the path of cref.dat
6 z0 D9 F5 d1 J, o2 g4 z946770  CONCEPT_HDL    CORE             揤iew Design?function is missing in Windows Mode after reseting the menus.- \! X6 a( `: ?. B! K" B7 _
950994  CAPTURE        NETGROUPS        Problem in expanding the netgroup in Auto Connect to Bus function' t" u  M, C/ J/ _- `# [0 j% K
953530  SIG_INTEGRITY  GEOMETRY_EXTRACT Display Parasitics is displaying wrong results for EMS2D Field Solver compared to topology extraction using Probe.- O+ g' t% o/ [2 D
953713  CONCEPT_HDL    PAGE_MGMT        Random page replacement/duplication in block3 o' R* K8 k% t1 J) i8 C$ M
953917  CONCEPT_HDL    ARCHIVER         archcore should handle errors correctly
: {; \( C2 T7 `953971  allegro_EDITOR MANUFACT         NC Drill files not generated correctly when using the option "搒eparate files for plated/nonplatedholes?
  B5 K1 [4 ~, O! b954400  CAPTURE        NETGROUPS        BUS members of NetGroup are getting converted to Scalars in Export-Import NetGroup.! ^- _6 ?2 Q& B) e) b7 u/ _$ y
954498  SCM            B2F              SCM crashes when importing physical
  s* }* n9 r% o0 y5 D& M3 _954623  ALLEGRO_EDITOR EDIT_ETCH        Unable to complete connection with Add Connect - related to soldermask to cline check?
' z( \& |% A# C% q5 y954894  ALLEGRO_EDITOR MANUFACT         Dimensions disappear when opening database in v16.5 from v16.3
8 l; ?/ U. ^; E* ]% {  A1 I  L955029  CONCEPT_HDL    CORE             custom text font size not recognized in symbol view0 Q8 S; j; x$ n- ^! t. R8 S' c
955133  SIG_INTEGRITY  FIELD_SOLVERS    The Field solver creates the differential trace model which is reversed T(D1) and T(D2) of bottom side.' R$ ^8 n& ?5 f5 k0 k
955290  CAPTURE        DRC              Description for UPD0014 missing in the Browse DRC markers window
* p8 O; q7 e$ P$ e( m955299  ALLEGRO_EDITOR DRC_CONSTR       drc text to smd pin does not work any more on this database in 16.3 S039
2 `" b/ p# i, S: h& H0 w1 E& A955338  CONCEPT_HDL    CHECKPLUS        Need to change PART_NAME$ G8 [% h, W; E, i0 W& ^
955447  SIG_EXPLORER   OTHER            Model path set in DE HDL Model Assignment not used by SigXP from CM in DE HDL
6 R4 p/ E: n) s6 D: f2 Z955740  SIG_INTEGRITY  GEOMETRY_EXTRACT Crosstalk with Timing Windows does not work correctly" u, ]4 N, e1 T6 {% I
955749  ALLEGRO_EDITOR MANUFACT         show element Info shows symbol dimensions on incorrect subclass% Q* V, W$ y! Q( v
955912  ALLEGRO_EDITOR OTHER            Shapes with voids that are exported to PDF have gray filled area over the void
$ z$ M6 ], N3 e: x) ?956129  CONCEPT_HDL    INFRA            DEHDL uprev hierachical design from 16.2 to 16.5 packaging failure." H' M5 N$ v# s" l9 ]& ?" e
956373  ALLEGRO_EDITOR NC               drawing name doesn't display in the log file
( S' M9 T4 V2 @- J, @956393  CAPTURE        PROJECT_MANAGER  "GENERAL" and "TYPE" tabs are missing from "Properties" dialogue box.0 f1 ?3 Z1 m. t1 g
956448  PSPICE         MODELEDITOR      Can not generate a DEHDL symbol from Model Editor, because no Capture license found
  _+ N! w/ ?" l" Y1 L. T* c0 T956456  CAPTURE        NETLIST_OTHER    OrTelesis netlist not transferring user properties defined under combined: P* q3 j" D3 z' M/ J
956489  ALLEGRO_EDITOR MANUFACT         dimensions lost when symbol with diemnsions attached to symbol origin placed on board
9 k" k4 d4 D) l" |2 ]5 x956603  CONCEPT_HDL    OTHER            Part Manager "has stopped working" after changing a component
7 l! \9 C9 e; \3 o956751  ALLEGRO_EDITOR ARTWORK          Import Gerber command does not work correctly
" d# [) H9 j' v956847  PCB_LIBRARIAN  METADATA         PDV - Partdeveloper symbol to function linkage broken/changed in 16.5. _: ]8 Q: F( Z0 O% G
956987  CAPTURE        OTHER            Find from "Search toolbar" doesn't gives complete results6 i' l; Y, }* d8 j5 Q4 B% {5 X
956996  CONCEPT_HDL    INFRA            Correction to ERROR(SPCODD-7): Following Primitive instance causes CM to empty
- V2 ~8 \" w: c* \957009  CAPTURE        NETLIST_OTHER    Problem getting database property in mentor pads PCB netlist8 \" Y5 U; o# S7 ^) h+ ?
957137  APD            DXF_IF           DXF out  command dose not work correctly.
" |  T2 T- p0 M9 Y957167  APD            GRAPHICS         Highlighting for Static shape with display_nohilitefont environment variable., a" R/ D6 V6 L7 Y
957232  SIG_INTEGRITY  OTHER            Allegro crash during Model Assignment.
+ Y, P. ~# r# V, O0 c) C957267  CONCEPT_HDL    INFRA            Packager Error after Import Design4 U4 l- V- D3 S% u' {! H! \" y; Z7 F
957866  SIP_LAYOUT     DATABASE         Cavity outline is not getting deleted from symbol file
( X5 z  `& k3 k( s! m4 V' w" w958010  ALLEGRO_EDITOR REPORTS          Wants the ability to extract "Batch"  reports from Partition ".dpf" files.3 k( u4 t; }: S& I9 q' ?
958252  ALLEGRO_EDITOR TESTPREP         Resequence testprep with the option - Delete probes too close crashes the design
6 w$ h" F9 ?0 i0 ]958253  ALLEGRO_EDITOR REPORTS          Shape did not have thermal relief connected to pin but unrouted nets still shows zero.
1 Y7 k) l8 t0 |- a- Y- ~" p  C958433  ALLEGRO_EDITOR DRC_CONSTR       False embedded component DRCs
4 q. F! _" P% u0 ^958753  ALLEGRO_EDITOR SHAPE            Dynamic shape is getting corrupted in 16.5, `+ B- K! ?3 P- q( @
959011  ALLEGRO_EDITOR OTHER            copy problem of via and cline
  H- E) i/ b9 ~959101  ALLEGRO_EDITOR EXTRACT          Using extracta with excluding Thermal reliefs. z) b( D, W$ P( y- [
959253  CONCEPT_HDL    INFRA            Design will not open
" {% T% \4 G' k3 L9 d' o959299  APD            MODULES          Getting ERROR(SPMHDB-279) when trying to update modules placed on the Top side
5 ?/ }- q" v- W$ p5 a959884  CONCEPT_HDL    INFRA            Design Uprev/concept2cm crashes with Application Error/Out of Memory Error.
+ f# }7 l0 v1 f7 o# }" v2 d3 l959909  ALLEGRO_EDITOR SCHEM_FTB        Site level propflow.txt file is ignored property is transferred# C4 S) _# H; g$ D% }
960067  SIP_LAYOUT     PLATING_BAR      Creation of plating bar removes "NODRC_ETCH_OUTSIDE_KEEPIN" property from the clines.1 \) P! |' F4 T. ~! V* U& f4 c
960126  SIG_EXPLORER   EXTRACTTOP       Allegro PCB SI license is used automatically at Topology Extraction of Allegro Physical Viewer.( s+ y& e; t$ w1 m/ }1 H9 W( y5 U
960143  SIG_INTEGRITY  GEOMETRY_EXTRACT Running simulation in Bus sim happened crash while enable Coulpled Via model to S parameter# F0 s+ B  ]: P
961349  CONCEPT_HDL    HDLDIRECT        Motorola designs have broken connectivity compared to 16.3* v0 e5 q. ^- Z7 K5 F4 H
961816  ALLEGRO_EDITOR INTERFACES       Normal Export > DXF fails and offsets  the pins of the BGA symbol
! l5 |* R5 x5 |& X. {; G# I962519  SIP_LAYOUT     WIREBOND         Align option doesn't work for wb_tackpoint fingers

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参与人数 3贡献 +16 收起 理由
轩辕浪 + 10 赞一个!
xzcpj + 2 很给力!
interrupt + 4 神马都是浮云

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2#
发表于 2011-12-22 08:58 | 只看该作者
s013,感谢楼主分享。

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3#
发表于 2011-12-22 09:01 | 只看该作者
多谢分享。。。。。。。。。。。。。。。

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4#
发表于 2011-12-22 09:18 | 只看该作者
顶!!!!!谢谢分享!

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5#
发表于 2011-12-22 09:27 | 只看该作者
谢谢分享

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6#
发表于 2011-12-22 09:38 | 只看该作者
15没装成功过,但还是谢谢你..." D) V+ V) e: v+ L$ n

3 K3 E& n6 t+ u2 A3 M6 v3 |

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7#
发表于 2011-12-22 09:46 | 只看该作者
非常感谢楼主yulizi 的无私奉献,有了你这个论坛充满了生机和希望。
  • TA的每日心情
    开心
    2024-5-31 15:00
  • 签到天数: 1000 天

    [LV.10]以坛为家III

    8#
    发表于 2011-12-22 10:58 | 只看该作者
    感謝分享{:soso_e100:}

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    9#
    发表于 2011-12-22 11:01 | 只看该作者
    都更新些什么呢??

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    10#
    发表于 2011-12-22 11:31 | 只看该作者
    大神啊,顶# N+ u: L) b; T. M3 S4 S1 o3 h7 c

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    11#
    发表于 2011-12-22 11:31 | 只看该作者

    ( [/ j1 a% J8 W! \感謝分享

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    12#
    发表于 2011-12-22 11:41 | 只看该作者
    说什么好呢
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    2025-6-14 15:00
  • 签到天数: 625 天

    [LV.9]以坛为家II

    13#
    发表于 2011-12-22 13:26 | 只看该作者
    楼主好人啊., B5 N: Y- L0 X3 @" a
    太感谢了.- f, E+ h- ~$ `/ }8 h
    现在这cadence也太差了把

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    14#
    发表于 2011-12-22 16:45 | 只看该作者
    感謝分享{:soso_e179:}

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    15#
    发表于 2011-12-23 06:51 | 只看该作者
    太感谢您了
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