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zxli36 发表于 2012-12-29 09:04 ![]()
' b' e) @% w+ J, h能不能把你Package时的信息发上来大家看看。
3 r6 l) C8 R9 } a* v IPackage时的信息如下,总共有二十几个问题,几乎所有器件都有问题,这个问题困扰我很长时间了,麻烦您帮我看看,非常感谢; x# b8 e. P% a Z" X
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Started C:\MentorGraphics\7.9.3EE\SDD_HOME\wv\win32\bin\packagerui.exe F:\demo_dx\demo_dx.prj /d Board1 /nobrowse /config "C:\MentorGraphics"/ j& j' S1 _3 b2 r% B
0 \3 c* T& u% q1 x+ MPackager Version: 020806.00
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Commandline is: "C:\MentorGraphics\7.9.3EE\SDD_HOME\wg\win32\bin\package.exe -jF:\demo_dx\demo_dx.prj -nBoard1 -Add" V3 u, u& o9 A" o
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The Common Database is at "F:\demo_dx\database".; Y' E. |) k1 {+ d# d/ o0 t I& s0 t
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The Root of this design is "Deme_Root_1".
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& t) x5 V) ^ i3 ]0 d8 ^The Front End Snapshot of this design is "DxD"./ Q6 K& M9 P! G& ~! N
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The PCB Design Path of this design is at "F:\demo_dx\PCB\Board1.pcb".# a- w" m, h5 |7 i* O; f3 `( |
. v& c% Q9 ?- `The Central Library is at "F:\Central_Library_for_DxD-Exp\Central_Library_for_DxD-Exp.lmc".$ `5 e# c2 Y9 A& H& I
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Unable to determine the Disable Repackage status.
1 E, ^# m1 n9 u4 T" h!Repackaging will be allowed!; l0 K% z( i* H$ e! C
# q+ ^9 _) s" F& H& dThe PDBs listed in the project file will be searched to satisfy the parts
' l2 v5 u/ k- a: T4 d+ s, D. jrequirements of the iCDB only for parts not already found in the
, e2 c* D. {' g/ J, w: \& g$ @Target PDB./ B: {* h3 E" |% Z) ]5 Q6 e
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The AllowAlphaRefDes status indicates that reference
, Q0 S" I9 A. mdesignators containing all alpha characters should be deleted/ O+ x5 l9 F* n* v/ P# `, A
and the relevant symbols repackaged.
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- ` x7 N/ J' c& J. _' [9 e: n1 S: M& p; GThe cross mapping of symbol pin names to Part Number pin
5 z5 P* X! _7 T0 u5 Z' gnumbers will be checked for packaged symbols and mapped correctly$ k: \3 ~# v0 r. Y9 p& m: d1 V
for unpackaged symbols.
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Properties that have been checked off in the Property Definition Editor
4 h8 B1 S3 H$ E$ P. t! cfound at Library Manager/Common Properties will be checked for value
2 j/ S) O$ Z# b) `) z; B+ }differences between the PartsDB and the non-null properties on symbols.& E Q9 n/ c5 j) k& W! }6 Q
Those properties checked off (other than Part Number)
7 v3 B. g8 Q$ c q* m& u- N7 nwill not be transferred from the PartsDB to symbols.
4 T0 Y' U/ c) `. {0 A$ [The following properties were checked off in the Property Definition Editor:
7 U, S* y" A; X1 m"EPFIXEDWIDTH"
9 q- U" k, c' u+ C"EPFIXEDLENGTH"
! o A |3 V7 f"Term"
! R9 A% S$ A/ n5 h f4 @"SIM_MODEL"1 T! M; `# ~1 N- w `% I; k
"SIM_MODEL_FILE"- b4 S" L5 A: Q0 b; M0 i L% X
"Array Component" c9 g% B7 ~. C4 c% z' Q, j
"ICX_PART_MODEL"
r& i1 b& }+ W5 i7 L"Use Verilog"# G I: J" Z5 W4 ~+ z2 f0 M
"Order"
3 V" O& h3 |4 p9 }' A' K"Parametric"/ z8 Z. P1 J3 e* k3 g8 F
"Value2"- ^* _ ^2 O6 R4 B2 @# @# v& y
"Tech"
. B5 V' d B' q! f# M4 d"IBIS"* g e, } H& t! [1 e0 V
"Part Label"
' ~, `+ o) ~) B# X; w' `7 p"VHDL Model"
- l* S2 L/ r* v3 Y$ \6 T1 u- F"Verilog Model"
/ ^; E7 P$ L+ i c, c"Cost"
! A8 @1 _8 u: D"Tolerance"
2 @$ a: ?0 A4 [3 T"Part Number"
: R, m8 H0 e( t"Value"
9 J8 F# ~! G- T* l. D5 s: b"Part Name"
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Testing of Packaging is being terminated with 22 errors and 1 warnings.& s8 o2 W! Z4 g$ @8 `$ G* O
Design has NOT been packaged.2 X3 p6 N; p+ t4 `
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Writing to Log File: Integration\PartPkg.log. Q9 }- ^' l5 Y3 z L! k6 X# ~4 V0 K2 }
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There have been 22 errors and 1 warnings." b8 a }! ~: b( ?# K, e
! S1 R# m( L& W$ g+ {5 c# T/ w+ u///////////////////////////////////////////////////////////
. r& n! R9 |5 V: ]- n///////////////////////////////////////////////////////////% V4 h! ^8 q, z
///// The Log File will now be copied to this window. /////' l' y& M/ p# Z4 J; N6 T( b5 ?5 A
///// Therefore the data above will also appear below /////
+ n9 O( ?, N0 o///// with more specific error and warning messages. /////
3 u5 N @% A5 j) q8 r8 B# g0 A4 D///////////////////////////////////////////////////////////5 S9 z9 U* Y) F' B4 f% K2 b
///////////////////////////////////////////////////////////! a: I% \- n& X( [
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) F- S1 `+ _6 [3 Z4 T- V) W: b
Packager& m' {8 @9 x# d6 l
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09:27 AM Saturday, December 29, 2012
( y# p, m& v$ l# pJob Name: F:\demo_dx\demo_dx.prj" q: ?( M0 `% V& n( a
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Packager Version: 020806.00
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Commandline is: "C:\MentorGraphics\7.9.3EE\SDD_HOME\wg\win32\bin\package.exe -jF:\demo_dx\demo_dx.prj -nBoard1 -Add"9 D( K, C, \* E+ p6 L
' F4 W+ P, p% L) g. ]3 K( q$ W
The Common Database is at "F:\demo_dx\database".1 q# n' V* i. z& X. K9 @8 f
+ o; Q; O; K$ C T% S) gThe Root of this design is "Deme_Root_1".- @4 f- j" h1 @4 B& G& w
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The Front End Snapshot of this design is "DxD".
& u0 j3 Q' X. M# T9 h3 K) ^5 y" b1 y5 O
The PCB Design Path of this design is at "F:\demo_dx\PCB\Board1.pcb".
$ Q# K# J/ E' |' H! F) N0 I; w# C& P& I
The Central Library is at "F:\Central_Library_for_DxD-Exp\Central_Library_for_DxD-Exp.lmc".5 M0 O# r0 n; N
0 a) F% X3 ?+ U* J5 L1 T8 [8 SUnable to determine the Disable Repackage status.
/ b8 A" K, S1 q/ z) a!Repackaging will be allowed!; i: N. R+ A1 m$ I* w
! n4 o+ p: u4 P- G* m3 RThe PDBs listed in the project file will be searched to satisfy the parts$ X @9 O! {6 `- o, j1 w/ _
requirements of the iCDB only for parts not already found in the
$ B; [, L. c) } T8 f9 Z% I5 F6 `Target PDB.
^, y& \- |8 F
" C" Z/ V1 X" w( CThe AllowAlphaRefDes status indicates that reference
/ L% k, h) g1 g% u0 ?. z: W2 r4 |designators containing all alpha characters should be deleted1 t& P) A; y" o( U, j
and the relevant symbols repackaged.' ]( b3 J- N- | i% j; I
, h2 f- d D5 _' D2 f% ^ `3 jThe cross mapping of symbol pin names to Part Number pin
4 n& P! q5 u, N+ l& Dnumbers will be checked for packaged symbols and mapped correctly9 G9 C* I0 i o# S
for unpackaged symbols.# [& g2 {, h$ u) P
* u9 Y: U1 J4 q3 B7 g9 R4 S
Properties that have been checked off in the Property Definition Editor A: l2 r1 R5 K, u* v0 X
found at Library Manager/Common Properties will be checked for value
+ X: G! ]; v" |1 U' Tdifferences between the PartsDB and the non-null properties on symbols.
. V0 w: | ~, d$ j7 r5 |- O& |7 `Those properties checked off (other than Part Number)& ]& B( j& b2 V- e
will not be transferred from the PartsDB to symbols.
8 Z+ j3 E9 ?! }/ a2 C& }The following properties were checked off in the Property Definition Editor:/ S8 p% U. [) _9 d4 {4 a0 `
"EPFIXEDWIDTH"7 k8 v$ a! _8 j
"EPFIXEDLENGTH"3 N% d c) |3 i1 _- `: R
"Term" A, X0 X, C) s# ~ a0 _
"SIM_MODEL"
$ w, G& K& o6 r5 ^"SIM_MODEL_FILE"' I' ?' { ~5 q5 ?: `1 X# g
"Array Component"8 s. V+ ]8 ~, n6 J+ I
"ICX_PART_MODEL"1 T9 [8 J* ]7 P' [8 q
"Use Verilog"; i/ {- |. A, G1 d6 H+ n
"Order"/ J" G( ^% R, E. {; g
"Parametric"
9 J& _/ V# D* ]5 X$ r# X"Value2". `2 N& r- P1 r2 r
"Tech"
2 h8 c: S$ Y. l& G"IBIS"( m& ^* j+ w- F" l
"Part Label"1 P% t/ b1 X" S: O3 {, ?# A2 L
"VHDL Model"
: k2 M) v5 H! o8 a( ~% l; n"Verilog Model"
) w- W1 L3 L& x) W) p' a4 L9 }"Cost"
% T+ m+ r+ S4 E; f5 w6 w"Tolerance"
" |7 t4 y2 p! w# i"Part Number"
1 j; D; I, l" `2 l& V"Value"
. _" U' o3 @* L M, K"Part Name"
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Checking for errors in the ICDB...+ K' c% x; b o. m' f0 K5 U8 r! X
$ X( a4 z# Y+ V- N0 hNo errors found. Proceeding with packaging...
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$ W$ y2 E1 W4 I/ ?6 L$ ]Common Data Base has been read( ~3 l. T/ j; x; h( p
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Target PDB Name: Integration\LocalPartsDB.pdb R! Q6 }+ v( e+ E) Z, V* {' r! b8 F
* R1 ^% Q5 `3 _, `" xWARNING: There are no PartsDB partitions from which to extract parts.; F; J. i0 ^. }& p& S# S+ x# b
Proceeding using the data in the local PartsDB "Integration\LocalPartsDB.pdb".; e; {' ?; d# y4 `' P
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Number of Part Numbers: 21
$ I8 j; a: Y f+ L- VPart Numb: BNC_1 -> Vend Part: - Z8 J$ [* j3 ?! x, A1 t1 ]( ]
Part Numb: CON_EDG_64 -> Vend Part:
* [, u& f8 E9 E* j5 oPart Numb: C_P0.01pF -> Vend Part: 2 K1 Q; M5 e' e- [# d5 e
Part Numb: C_P3.3uF -> Vend Part: ( y$ _( ?8 z" Z: l+ A
Part Numb: C_P47pF -> Vend Part:
: A: X% U* S I }2 B, I2 B4 m( F" yPart Numb: C_0.1uF -> Vend Part: # M$ n4 d0 ^* t4 Z+ x( F7 u
Part Numb: DG419AK -> Vend Part:
) D( Y; G" D1 \Part Numb: EPC1064 -> Vend Part: a+ P5 P! E$ f
Part Numb: EPF8282A -> Vend Part:
2 }0 S; ]7 n# S7 iPart Numb: FCT16245 -> Vend Part:
+ s* } T; C" m* _7 FPart Numb: LED -> Vend Part:
J, S+ E% A* M& dPart Numb: L_50uH -> Vend Part: $ T2 F5 e# U C$ c! s) i3 I
Part Numb: R_2K -> Vend Part: # c' B) |: E/ v; g% n
Part Numb: R_10K -> Vend Part:
& B1 `$ W; ^8 W' JPart Numb: R_100 -> Vend Part: 7 B; L7 L6 O6 ^) O7 I. p/ ~6 m; A
Part Numb: R_220 -> Vend Part:
?' P6 m5 c& L4 Q- CPart Numb: R_510 -> Vend Part:
$ }3 b5 b3 m$ @; Y! ]( rPart Numb: TC55B4257 -> Vend Part:
7 a I% t: t; N2 }# c3 dPart Numb: TLC5602A -> Vend Part:
( M( M! {0 R0 {' W K& Q' sPart Numb: 20L10 -> Vend Part: 0 m) ~. X: Q0 e$ C! w
Part Numb: 74ACT574 -> Vend Part:
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Number of Part Names: 1
9 b2 L0 H* Q7 X1 F( u" s: B8 i7 gPart Name: TLE2037A -> Part Number:
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+ |. @9 ]; H% p( w5 Q+ fNumber of Part Labels: 0) V' @9 j' n1 e" U( g
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/ h* O' `& y! H8 n& @9 R! ?Checking for value differences between non-null symbol properties and PartsDB properties,
2 Q* g" R& ~% ]( N6 G8 v( I3 V1 Gbut only for those properties checked off in the Property Definition Editor
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2 ?3 R) J2 a4 H' [Checking the validity of the packaging of prepackaged schematic
' Z) r8 p @ ^) {4 @( u* Osymbols. Only the first error in symbols having the same
: M, \8 g' O5 UReference Designator will be reported.
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ERROR: There is no Part Number: CON_EDG_64 in the Parts
6 Q9 U8 V4 N: G+ g+ mDataBase for symbols with Part Name: CON_EDG_64 and Part Label: (null).( B, g5 u) t- ~- s8 u, K
[Please add the Part Number to the PDB either directly
0 {% e8 P7 _7 {, t. m' Mor by having the project file point to a PDB that contains it.]
/ R$ I' M o; O- x" u2 sThe relevant symbols are:
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S) w/ h; F- m. n4 Y; ? Block Deme_Root_1, Page 1, Symbol $1I41
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2 c6 j$ _, d9 JERROR: There is no Part Number: FCT16245 in the Parts: e. Z6 E8 J; X+ s
DataBase for symbols with Part Name: FCT16245 and Part Label: FCT16245.5 j/ e# r! j: U# ^6 d7 }( p
[Please add the Part Number to the PDB either directly* |/ [* i! j3 p: h
or by having the project file point to a PDB that contains it.]8 [+ r% F$ j2 R: f4 z& [
The relevant symbols are:
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! z& Q7 w( k% m# e- ?8 ?! b) c Block Deme_Root_1, Page 1, Symbol $1I1277 # Q+ Y4 f. C5 t( L2 @0 E# j
Block Deme_Root_1, Page 1, Symbol $1I1424
$ X/ k/ y; g& Y I2 [- V$ A" J/ ^ Block Deme_Root_1, Page 1, Symbol $1I1395
6 z. R1 N* ^) Y* j" s Block Deme_Root_1, Page 1, Symbol $1I1366 7 W* C4 h9 b8 c0 j6 j. {2 \
Block Deme_Root_1, Page 1, Symbol $1I1337 / x8 Q c: O, u& y, }
Block Deme_Root_1, Page 1, Symbol $1I1308 |
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