|
|
EDA365欢迎您登录！
您需要 登录 才可以下载或查看，没有帐号？注册
x
本帖最后由 紫菁 于 2017-9-14 11:21 编辑
) ]* t; L4 {+ t6 p+ t# c
$ H3 D# O9 o) o; {: }, ?下面链接是cadence SPB16.3及最新Hotfix下载地址，需要的可以下载！8 e7 ^ g; A! ~) V* E
/ P- S% a1 S# L0 r0 ^) I2 m: R# {6 Y& y' Z
Hotfix057更新的内容如下所示：7 z5 q9 M. R. I. i& a% J' P
DATE: 12-19-2012 HOTFIX VERSION: 057
6 R! h. t# `6 S$ @/ D! t# k2 G===================================================================================================================================
5 z' {' W5 v+ Y( _" @CCRID PRODUCT PRODUCTLEVEL2 TITLE7 B, n: _0 E- s2 {0 a
===================================================================================================================================* o! u' I% R( b- x
1080193 SIG_INTEGRITY ASSIGN_TOPOLOGY View Topology freeze during the extraction of the net connected to resistor network.
# B0 G/ a) ?9 o j1082509 allegro_EDITOR INTERFACES Export DXF in the 16.3 S056 roatate some pins.- Q }) I0 m5 o5 Y% M
6 _( F1 o4 P- w6 j3 s0 _
DATE: 12-7-2012 HOTFIX VERSION: 056
8 Z- k7 t/ J/ b, ] e' _===================================================================================================================================. h. ]" U/ i* d) p
CCRID PRODUCT PRODUCTLEVEL2 TITLE
1 i- @8 U' Q w+ X* [===================================================================================================================================0 d% E5 A9 b+ ~! Q& ~! y
825813 concept_HDL CORE HDL crashes when copying a property from one H block to other
! @# k* K: V- [/ M871886 CONCEPT_HDL CORE Browse button in Signal Integrity window of DE-HDL option causes program crash
2 g/ r, p& J6 w9 m2 n+ q2 D871899 CONCEPT_HDL CORE 'Multiple:' column of Grid window in DE-HDL option is too wide
: a2 B: E" h4 t. w4 _/ U$ g873917 CONCEPT_HDL CORE Markers dialog is not refreshed9 E: a8 |$ C( s( a, L
887887 CONCEPT_HDL CORE Option to find unconnected Pins/Nets with DEHDL L License
g. `9 x: h$ D9 l5 D: k892857 CONCEPT_HDL CORE packager treats R? as a unique reference designator! r% u& i" ?9 s K
1075587 CONCEPT_HDL PAGE_MGMT Unable to insert page in schematic
# B# A4 L! h9 I& y1 X+ P1078682 ALLEGRO_EDITOR DRC_CONSTR Unaccetable slowness with Slide |
|
/1 
发表于 2013-1-14 11:49
收藏
淘帖
支持！
反对！
