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更新内容及模块：0 q+ {: U2 j9 R7 z1 G
DATE: 06-14-2013 HOTFIX VERSION: 011
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0 j7 y; }5 f. p1 i: Y C2 uCCRID PRODUCT PRODUCTLEVEL2 TITLE
# z/ m) Z3 S, k5 [/ n===================================================================================================================================, D2 {' P' y) x5 C; k- m: }3 j: l0 o
982306 concept_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf0 u/ _6 A% ?; o. k' }
1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers
! ~4 Y6 k# l2 k* |" i# f1093375 allegro_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer
! `( Q7 F0 ^- ^4 K1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import
- z( w* H" X, v8 _" a3 w$ t1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT$ A/ ^. u. C; B3 `$ H7 s
1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting
9 c7 q! X9 v. s* ~4 N. [1110323 APD DXF_IF DXF out is offsetting square discrete pads.
2 z" Q" e' H# R. C6 ]( S" X! y, C1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board
0 _# l9 _7 y9 t/ O W1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.
# v' x, i' a6 Q+ T: \1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets": Z. y7 e- t8 S5 k$ a o0 R; A+ e1 s
1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal." n, m9 ?/ _6 o* C( e: n( L$ Y
1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide
2 u8 `0 t2 D6 M A4 U7 k1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero
* ?. `, n& j. \) ~1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP
1 C1 Q: s5 w* G. G9 w5 s. u1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output& e: T1 V5 C4 u1 x b
1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor
3 p7 @* A h. n, E1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL
1 B7 [& G; G& h/ _( m% j1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.
% ^. t. N% |& O6 y( r( d- _1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added) I v8 T( U+ v& i" Q& Z
1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps
( j3 @. S, l' ~/ n1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol
4 |: |+ r! g6 Q7 X; h1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.
2 I5 U5 H( l) b& I( z( ]5 v1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF
8 Q4 l E2 k, g1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid
6 d/ F7 D4 b- d' c! Q( y0 G1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()
* w9 W4 o4 r& E! n" B. c+ d1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes$ T" E+ X* h$ Q2 v8 m( K. X' Q6 V
1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols" ]# M9 A. e* p
6 h' i1 W; P- m" s4 p8 n' T
4 Z n1 A: I/ m下载链接：% \' T9 [, k! |! P V9 R- p
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发表于 2013-6-16 15:39
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支持！
反对！
期待16.7.。。。。。。。。
