|
EDA365欢迎您登录!
您需要 登录 才可以下载或查看,没有帐号?注册
x
更新内容及模块:
. s7 g! q1 x! {DATE: 06-14-2013 HOTFIX VERSION: 011
1 P* ~4 S, n" m2 `( d! ~6 {+ y===================================================================================================================================" b3 B) _" O* W$ l" F0 O
CCRID PRODUCT PRODUCTLEVEL2 TITLE1 o! q# a/ ^: c# p; m% v( [3 ]- E# M
===================================================================================================================================
6 j/ J" i9 }7 z' P; }, y982306 concept_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf9 m0 k' N# K K% |1 ^8 v
1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers2 z* c! k: `. G; f
1093375 allegro_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer
* \8 C; l1 T: N T' z1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import
4 R1 s+ y/ g2 {6 y: E- [1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT3 ]! P1 D7 A* ~6 I4 b4 ?3 b
1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting! H9 B# ]0 s2 C# g
1110323 APD DXF_IF DXF out is offsetting square discrete pads.# t& f/ j3 ~- {0 {
1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board5 c8 ^2 _( l. J# r( y+ I$ W
1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.' Z. ^/ i+ h' O# K: f6 X
1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets": ]0 I, H0 b1 u3 v. `9 ]
1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal.
& n& g: O C1 q# ?1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide: J9 y/ N9 {6 L$ T" Q
1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero
7 W# ]: ~& O N( v1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP: m9 p) E: _. a! O( A
1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output2 t- d" {: w; W) t
1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor& a! W6 z' K% K* A
1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL T5 Q- W9 i1 f- S W
1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.
/ }2 Y, J' b4 b) M$ ^1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added
- z: ]8 a ^' r8 e- j9 [$ Z3 V1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps
2 l9 o$ c5 P4 H& {& h7 I1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol
0 m( @* ~$ p8 A; N# D+ d0 i; ]7 N5 }1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.
- m3 g' u5 v2 T+ I2 d1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF
) n% t& q& S0 D) s" S- h1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid l, \. p( O( P) F& d
1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()
; ]: W3 c- b, K0 a& _1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes
8 A5 M" @1 i0 ]; r1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols8 U! p0 h6 Q' Q3 `, a9 V( l
- W, ?5 ^/ j! ~% w2 B
1 U" R4 \) \4 x6 H下载链接:
4 d5 k! G6 m5 r4 Thttp://pan.baidu.com/share/link? ... 5&uk=3826038294
2 E( P. j# a8 y ~( ]2 E |
评分
-
查看全部评分
|