关于 signoise errors 的问题

mjchen

set  ads_autosaverevs = 0
" t  m0 T' `6 Qset  ads_boardrevs = 1
( ]8 ]- O2 J; T6 hset  ads_dbext    = brd
, m5 n: {$ w2 r) s: vset  ads_logrevs  = 4
set  ads_materialname = materials
0 `8 E  x! v, |4 O6 v, ]set  ads_msgname  = allegro
! I8 u' R7 j4 q; `set  ads_norevs   = 1
set  ads_textrevs = 2
2 F% `( n: T# c$ W5 }4 Iset  adsboardpath = E:/working/tr5 .
set  aDSPath      = . C:/cadence/SPB_16.6/share/pcb/text
/ R+ a! q9 F9 w! p! h9 pset  alibpath     = C:/Cadence/SPB_16.6/share/pcb/pcb_lib
# `3 j% S4 C$ a9 E* a0 @set  allegro_brd2odb = C:\mentorGraphics\Allegro Export ODB++
  F' [. _6 i9 K0 hset  allegro_dynam_timing_fixedpos =
2 l2 R9 f3 @' s9 X' M+ [; |( vset  allegro_install_dir = C:/Cadence/SPB_16.6/share/pcb
1 a; ^! e  `' U! A- V5 Fset  allegro_install_dll = C:/Cadence/SPB_16.6/tools/pcb/bin
set  allegro_install_root = C:/Cadence/SPB_16.6
, B. {  N3 H, \' G7 }. U4 }! pset  allegro_install_tools = C:/Cadence/SPB_16.6/tools/pcb
" ]# l* m) C% D% c( }set  allegro_site = C:/Cadence/SPB_16.6/share/local/pcb
set  allegro_type = pcb
set  allusersprofile = C:\ProgramData
% p6 U. \: i4 j/ F2 @! Zset  ansifont     = ansifont
set  appdata      = C:\Users\chenmaojie\AppData\Roaming
set  aptpath      = . ..
1 [% a7 ~6 k9 `# p0 S4 ^: s: G2 Lset  artpath      = . ..
- c4 h% r1 O7 k. ~9 w5 Eset  artwork_no_unit_warn =
8 P* ]- R5 I, L2 I1 M# Cset  autosave     =
set  autosave_time = 10
  y( [2 o  w, d1 W$ \. tset  base         = E:/working/tr5
set  batchhelppath = . C:/Cadence/SPB_16.6/share/pcb/batchhelp
set  bmppath      = . C:/Cadence/SPB_16.6/share/local/pcb/icons C:/Cadence/SPB_16.6/share/pcb/text/icons
set  brd_dbext    = brd
set  brd_mcm_tech = EXT=brd:EXTALT=mcm;tech:MSG=BRD/MCM/TECH:TITLE=Select a BRD/MCM/TECH file:
set  caetbin      = C:\adiva\bin
' q) l0 z" x9 r* \! K5 o. oset  caetdata     = C:\adiva\data
, i! y! G2 ~, [. k0 ^8 F, t& Y5 Fset  caethelp     = C:\adiva\manual
5 g/ i+ D4 f8 J# F, i/ W+ @set  cds_lic_file = 5280@chmj
set  cds_lic_only = 1
set  cds_sis_msglog_key = SISMsgLog
3 I: S+ v- k7 J/ ]7 Q! rset  cds_site     = C:/Cadence/SPB_16.6/share/local
set  cdsdoc       = algcmdref
, A+ U4 j6 i: w! m6 P" ]set  cdsplat      = wint
set  cdsroot      = C:\Cadence\SPB_16.6
set  cdsversion   = 16.6
set  chdl_lib_inst_dir = C:\Cadence\SPB_16.6
( F0 J  `3 G- H$ T( ?) `/ xset  cio_dbext    = cio
set  class        = BOARD GEOMETRY
( c( U5 m1 g. X* Aset  clippath     = .
set  commonprogramfiles = C:\Program Files (x86)\Common Files
set  commonprogramfiles(x86) = C:\Program Files (x86)\Common Files
set  commonprogramw6432 = C:\Program Files\Common Files
  M  X* N. K; T" U( [set  compalib     = C:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols C:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols
+ i+ f% i/ w% Sset  complibpath  = C:/Cadence/SPB_16.6/share/pcb/allegrolib
2 V3 ^. y& F  {( S2 `set  computername = CHMJ
" j% n- L2 @2 t& d! l3 Q  Y! Q0 c% z( `set  comspec      = C:\Windows\system32\cmd.exe
( P9 O4 z' V$ `; W& Aset  concept_inst_dir = C:\Cadence\SPB_16.6
set  cwd          = E:/working/tr5
7 @. X' R/ C: g: \& Mset  dclpath      = . .. C:/Cadence/SPB_16.6/share/pcb/pcb_lib C:/Cadence/SPB_16.6/share/pcb/allegrolib
( h$ @0 M. ?/ _+ f5 l6 ?- C. ?set  devpath      = D:\Allegro_LIB\Allegro_LIB\
$ U7 d8 S! h& hset  dfaauditpath = . C:/Cadence/SPB_16.6/share/local/pcb/assembly C:/Cadence/SPB_16.6/share/pcb/assembly
set  dfacnspath   = . dfa .. ../dfa C:/Cadence/SPB_16.6/share/local/pcb/dfa
set  display_backingstore = on
set  display_nohilitefont =
  a# P7 J& E! b7 b& S5 n5 ]set  display_norepair = rats
3 y0 ]3 o- ~, X- X: _+ n2 Fset  display_shapefill = 4
4 d7 w5 k4 w; U& z8 n5 |3 Lset  display_shapefill_analysis = 2
set  dpm_dbext    = dpm
# ?' t7 G  {2 P3 ^5 k/ e/ S9 Bset  dps_dbext    = dps
set  drawing_4mils =
3 C" h. T! m. N) @set  drc_diff_pair_overide = 0
! f" {) k# m7 J9 y5 m8 r) p6 i* ]set  envpath      = C:/Users/chenmaojie/AppData/Roaming/SPB_Data/pcbenv C:/Cadence/SPB_16.6/share/pcb/text
, N3 E. g0 U* O- Wset  ext_artwork  = art
set  ext_drill    = drl
set  film_nosort  =
) ]3 y  Y3 M; K& c  O" e' Z5 qset  formpath     = . C:/Cadence/SPB_16.6/share/local/pcb/forms C:/Cadence/SPB_16.6/share/pcb/text/forms
set  fp_no_host_check = NO
set  global       = C:/Cadence/SPB_16.6/share/pcb/text
set  globalpath   = . C:/Cadence/SPB_16.6/share/pcb/text
set  helppath     = . C:/Cadence/SPB_16.6/share/pcb/help C:/Cadence/SPB_16.6/share/pcb/text/help
set  home         = C:/Users/chenmaojie/AppData/Roaming/SPB_Data
0 }' `2 P/ V$ N2 Vset  homedrive    = C:
set  homepath     = \Users\chenmaojie
set  ignore_popup_action =
6 D. A9 s( B4 ?# \6 n$ C( Tset  imagepath    = . C:/Cadence/SPB_16.6/share/pcb/examples/image
set  kanjifont1   = kanjifont1
set  kanjifont2   = kanjifont2
set  kanjifontpath = . C:/Cadence/SPB_16.6/share/pcb/text/fonts/kanji
2 v6 g  v& y0 [- `3 _& Zset  ldfpath      = .
set  localappdata = C:\Users\chenmaojie\AppData\Local
+ C/ w; w8 m3 f' S) L' t3 ]) Aset  localenv     = C:/Users/chenmaojie/AppData/Roaming/SPB_Data/pcbenv
set  localpath    = . C:/Users/chenmaojie/AppData/Roaming/SPB_Data/pcbenv C:/Cadence/SPB_16.6/share/local/pcb . C:/Cadence/SPB_16.6/share/pcb/text
0 O# J4 T  d( J0 x$ N2 ]set  logonserver  = \\CHMJ
: J4 P. `# n$ R% b3 d# k  Xset  materialpath = . C:/Users/chenmaojie/AppData/Roaming/SPB_Data/pcbenv C:/Cadence/SPB_16.6/share/local/pcb C:/Cadence/SPB_16.6/share/pcb/text
set  mcm_dbext    = mcm
2 L% e1 a1 Y/ j7 [' M& Y2 g* Bset  menuload     = allegro
/ u. N0 I! l4 X5 i4 v! b) ~1 e* Fset  menupath     = . C:/Cadence/SPB_16.6/share/local/pcb/menus C:/Cadence/SPB_16.6/share/pcb/text/cuimenus
8 d' i" p& @, T/ i5 ^0 o* T* ~( ~set  module       = TR5_A0.brd
1 N0 ~# ]" u4 z5 \- y6 Wset  modulepath   = . C:/Cadence/SPB_16.6/share/local/pcb/modules
set  ncdpath      = . .. C:/Cadence/SPB_16.6/share/local/pcb/nclegend C:/Cadence/SPB_16.6/share/pcb/text/nclegend
* f! e' L0 |- j# p. T7 D( Kset  noshow_current_selections =
+ t  u! F, c% A/ a, k% E( o- Hset  number_of_processors = 4
set  oa_plugin_path = C:\Cadence\SPB_16.6\Share\oaPlugIns
; d7 q- h' `) Iset  os           = Windows_NT
+ B! ?. e7 m: n# i3 I# D* t0 R+ bset  padpath      = E:\layout working\SPO2 WITH MFI\SPO2 LIB\ D:\ALLEGRO\ E:\LAYOUT WORKING\PACKAGE\1394\ E:\LAYOUT WORKING\PACKAGE\11.10\
set  path         = C:\MentorGraphics\Allegro Export ODB++\nv\bin C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common C:\Windows\system32 C:\Windows C:\Windows\System32\Wbem C:\Windows\System32\WindowsPowerShell\v1.0\ C:\Program Files (x86)\WinMerge C:\Program Files\TortoiseSVN\bin C:\Program Files (x86)\Skype\Phone\ C:\Cadence\SPB_16.6\openaccess\bin\win32\opt C:\Cadence\SPB_16.6\tools\capture C:\Cadence\SPB_16.6\tools\Pspice C:\Cadence\SPB_16.6\tools\specctra\bin C:\Cadence\SPB_16.6\tools\fet\bin C:\Cadence\SPB_16.6\tools\libutil\bin C:\Cadence\SPB_16.6\tools\bin C:\Cadence\SPB_16.6\tools\pcb\bin
2 C  v" o9 s' m8 F( G3 ~set  pathext      = .COM .EXE .BAT .CMD .VBS .VBE .JS .JSE .WSF .WSH .MSC
. E7 U$ _+ `* ]# {+ hset  pcb_cursor   = cross
8 e9 }2 _+ ^, U3 a; p& hset  pcell_lib_path = C:/Cadence/SPB_16.6/share/local/pcb/../../RFsip/sip_pcells . sip_pcells .. ../sip_pcells
$ @. K3 O. O8 Z* ]- [  M2 Wset  pdfpath      = . C:/Cadence/SPB_16.6/share/pcb/help/pdf
set  pm_cmdmap    = allegro
# [) q) @$ L7 e2 |/ c3 ]* ]set  prfeditpath  = . configure/prfedit C:/Users/chenmaojie/AppData/Roaming/SPB_Data/pcbenv/configure/prfedit C:/Cadence/SPB_16.6/share/pcb/configure/prfedit
set  processor_architecture = x86
9 `. w0 h% P% y) O7 e; |" Bset  processor_architew6432 = AMD64
7 @- i4 U5 _. Qset  processor_identifier = Intel64 Family 6 Model 37 Stepping 5, GenuineIntel
set  processor_level = 6
5 @3 m0 v: x, Y- e- r/ j$ F" [9 Qset  processor_revision = 2505
set  programdata  = C:\ProgramData
set  programfiles = C:\Program Files (x86)
set  programfiles(x86) = C:\Program Files (x86)
set  programw6432 = C:\Program Files
set  psmodulepath = C:\Windows\system32\WindowsPowerShell\v1.0\Modules\
; }2 e/ S! p* Bset  psmpath      = E:\layout working\SPO2 WITH MFI\SPO2 LIB\ D:\ALLEGRO\ E:\LAYOUT WORKING\PACKAGE\1394\ E:\layout working\package\11.10\
set  public       = C:\Users\Public
4 T. C+ b7 F" \" ]2 z% m: D. ?set  roaminc      = 96
6 \3 k3 x: f- _  wset  scfpath      = . scfs .. ../scfs
) G' E% i* g5 h- N) z7 Vset  scriptpath   = . C:/Cadence/SPB_16.6/share/local/pcb/scripts C:/Cadence/SPB_16.6/share/pcb/text/script
set  sessionname  = Console
set  si_model_path = .
set  signal_install_dir = C:/Cadence/SPB_16.6/share/pcb/signal
set  signal_optlib_dir = C:/Cadence/SPB_16.6/share/pcb/signal/optlib
1 I2 n" G$ E$ Q5 Pset  signoisepath = . C:/Users/chenmaojie/AppData/Roaming/SPB_Data/pcbenv C:/Cadence/SPB_16.6/share/local/pcb/signal C:/Cadence/SPB_16.6/share/pcb/signal C:/Cadence/SPB_16.6/share/pcb/signal/optlib C:/Cadence/SPB_16.6/share/pcb/text
set  sip_dbext    = sip
5 |# k7 w. q2 u) p# ~4 vset  slide_arcs   =
1 n; v& r/ |  f; o1 P' jset  sproutepath  = C:/Cadence/SPB_16.6/share/pcb/configure/sproute
- Y9 r: F/ O+ `* x6 a! _8 e( Eset  subclass     = OUTLINE
0 q, v* a# J3 i$ n( G1 V5 \4 f% o" xset  systemdrive  = C:
set  systemroot   = C:\Windows
1 P+ T( o! z1 Nset  techpath     = . C:/Cadence/SPB_16.6/share/local/pcb/tech C:/Cadence/SPB_16.6/share/pcb/text/tech
7 N4 @+ L0 E, ?set  telenv       = C:/Cadence/SPB_16.6/share/pcb/text/env
set  temp         = C:\Users\CHENMA~1\AppData\Local\Temp
! Q, Z$ ^$ H8 G  nset  textpath     = . C:/Cadence/SPB_16.6/share/local/pcb/extracta C:/Cadence/SPB_16.6/share/pcb/text/views
5 N1 j3 c+ S) Lset  tilepath     = . C:/Cadence/SPB_16.6/share/local/pcb/modules
7 L  d$ x" b; ~) u5 L" {+ }set  tmp          = C:\Users\CHENMA~1\AppData\Local\Temp
set  topfilelib   = C:/Cadence/SPB_16.6/share/pcb/pcb_lib/templates C:/Cadence/SPB_16.6/share/pcb/allegrolib/templates
1 f3 s5 U. U. g' l2 Eset  topology_template_path = . templates .. ../templates C:/Cadence/SPB_16.6/share/local/pcb/topology C:/Cadence/SPB_16.6/share/pcb/pcb_lib/templates C:/Cadence/SPB_16.6/share/pcb/allegrolib/templates
set  units        = C:/Cadence/SPB_16.6/share/pcb/text/units.dat
1 Y$ w5 X0 y( h# y; X2 Q4 oset  userdomain   = chmj
7 x# }6 W! w7 }* G7 V+ P$ mset  username     = chenmaojie
" |. l6 b) p+ g9 }( ~6 gset  userprofile  = C:\Users\chenmaojie
set  vectorfontpath = . C:/Cadence/SPB_16.6/share/pcb/text
set  viewlog      = E:/working/tr5/signoise.log
: l9 Q, s4 ^# I3 c, rset  viewpath     = . C:/Cadence/SPB_16.6/share/local/pcb/views
3 @9 k! H: H! l! K0 N  @set  wbpath       = . C:/Cadence/SPB_16.6/share/local/pcb/wbtiers
set  windir       = C:\Windows
; t, @' p$ ]2 @# U! B' \% c( ~6 [set  windows_tracing_flags = 3
set  windows_tracing_logfile = C:\BVTBin\Tests\installpackage\csilogfile.log
* |8 x; C! L7 ^9 o  U0 Jset  wint         =
set  wirebond_hud_update_frequency = 25
: O; ^$ ~# r% u' aset  wirebond_suppress_bondwire_drcs =
set  wizard_template_path = . .. C:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols/template
" T& J: H' S3 [4 N8 b; Dset  xtalk_table_path = . xtalk_tables .. ../xtalk_tables C:/Cadence/SPB_16.6/share/local/pcb/xtalk C:/Cadence/SPB_16.6/share/pcb/pcb_lib/xtalk_tables
set __compat_layer = DisableThemes
set _allegro_adv_optimize =
set _allegro_aibt_built_in =
) k/ p& K& o' g5 rset _allegro_cns_regions_ok = 1
6 [# x  h0 m% T1 \set _allegro_cstm_nclegend_ok = 1
  @& m+ g  T8 B1 a* u! Q, kset _allegro_diffpair_ok = 1
; j' Z8 G7 O8 D. {5 S0 i3 e! ^set _allegro_diffpair_static_ok = 1
4 l0 p5 }: N9 n, u+ ~: sset _allegro_ecsetflatten = 1
- v4 e: N2 k" i% a$ F; Xset _allegro_elec_cns_ok = 1
set _allegro_electrical_checks = 1
- g# o9 z' q- e0 q  c; kset _allegro_gre_all = 1
set _allegro_gre_ifd = 1
, Y3 o1 a  g9 E7 q+ O/ i) ?set _allegro_gre_view = 1
set _allegro_group_route = 1
$ {! t9 L3 U: t, X- R0 zset _allegro_ibd_all = 1
. u% o; r6 G7 z9 z( rset _allegro_ibd_view = 1
set _allegro_mini_ok = 1
! B: f6 g+ V. |3 i4 q. bset _allegro_pcb_gxl =
set _allegro_ratt_ok = 1
set _module = TR5_A0.brd
) O5 p1 h3 z1 k$ `5 M3 W% @8 }+ Y/ Sset _module_base = TR5_A0
# ^/ B$ }- _1 Q) e# Tset _program = allegro
9 E6 @7 L& s( E7 L( T4 \6 `5 |' f
! ]8 h2 |. p& B& ]
9 \) }( q. T; i1 d9 y
) u0 }4 }: G5 q3 p0 y+ a1 y
) V9 F" g' d9 }, p6 n% r* s4 _这个是我allegro   的设置

% H3 n% H% e$ Q- f

mjchen

SigNoise Errors/Warnings
% d$ \+ P4 h! w: y% A+ wStarted by xrwright on 1 Dec 2013 10:05 AM. Topic has 1 replies and 548 views.
Last post on 2 Dec 2013 5:06 AM by Dennis Nagle.
Hi,
4 X6 }% I& ?7 G5 r
All of the sudden whenever I open Cross-section and try to change Coupling Type or go to do a diff route on this particular board, an error dialog box named "SigNoise Errors/Warnings" pops up which shows this  list:

WARNINGS:
* I; l! @* D2 I" S# TIml model STL_2S_1R_TRACE6 is duplicated 2 times in libraries
         interconn.iml ..\..\..\..\Cadence\SPB_16.6\share\pcb\signal\cds_interconn.iml.
Iml model STL_2S_1R_TRACE48 is duplicated 2 times in libraries
         interconn.iml ..\..\..\..\Cadence\SPB_16.6\share\pcb\signal\cds_interconn.iml.
Iml model STL_2S_1R_TRACE36 is duplicated 2 times in libraries
         interconn.iml ..\..\..\..\Cadence\SPB_16.6\share\pcb\signal\cds_interconn.iml.
8 r& _% [* E' C4 A6 I' e& ~0 PIml model STL_2S_1R_TRACE24 is duplicated 2 times in libraries
         interconn.iml ..\..\..\..\Cadence\SPB_16.6\share\pcb\signal\cds_interconn.iml.
Iml model STL_2S_1R_TRACE16 is duplicated 2 times in libraries
         interconn.iml ..\..\..\..\Cadence\SPB_16.6\share\pcb\signal\cds_interconn.iml.
; K- {2 c: d% A! Y& o" i) nIml model STL_2S_1R_CPW76 is duplicated 2 times in libraries
( Z, C  U6 t" e7 Q, N         interconn.iml ..\..\..\..\Cadence\SPB_16.6\share\pcb\signal\cds

) e, h+ y- A; T& y6 _* t......

......

: ~) w& E& x: |It continues for a lot more lines showing different models. These errors are also replicated in the dialog area at the bottom of the screen.

It's only happening for this board and no others.
- F0 a3 E7 [6 |6 B# K
Anyone know how I can correct this? Thanks!

: ]" }* _) G7 Y4 h8 k6 URobert  
3 m* [& ^+ W0 v9 N
) }) Q, a) x/ ?xrwright xrwright
1 Dec 2013 10:05 AM Reply
1 Reply
# ^* p& z7 _% L" L
$ D* Z; [+ o8 S" ]3 B( pDennis Nagle Dennis Nagle
2 Dec 2013 5:06 AM
! p2 {" P4 }) D$ J0 N/ NRobert,

The easy solution is to delete your local copy of interconn.iml - this file should be located in your working directory where the .brd is. This file is just a local cache of field solver output. Each of those "STL_2S_1R ...." entries is a coupled trace model which contains the differential impedance.

The bigger questions are what your desires are at this stage of the design (and/or whether someone else like the SI engineer is using the same directory). If you don't need or want to see differential impedance calculated in the Layout Cross Section dialog, then diable the checkbox in the lower right hand corner of the dialog for "Show Diff Impedance". This is what is forcing the field solver to be called. You also may or may not want to disable the imedance DRC if you are also seeing these messages generated when routing a diff pair.
6 M; D' {1 c4 S0 U+ M. O" U
The messages also indicate that algorithmic models are enabled and that you are using the full wave solver. If you don't understand what these are and want to fully understand the implications, feel free to contact me offline.
; Q) m5 k% [9 [* \
Regards,
% X" M0 x" Z; H% F/ E! E/ R3 ^-Dennis Nagle
9 T5 T% r8 B7 mCadence

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Reply

dzkcool

一点一点来排查吧。
建议不要把路径设置到有空格的目录，例如padpath的路径。
看情形，你的Home路径好像也没设置，用的是系统默认的，建议改一下。
si_model_path的路径只有一个点？我的是这样的：
set  si_model_path = . D:/Cadence/SPB_16.6/share/local/pcb/signal D:/Cadence/SPB_16.6/share/pcb/signal

% u" N3 g$ x$ i1 X' A& w你的板子叠层设置界面也截个图出来看下吧。

dzkcool

mjchen 发表于 2015-6-25 11:36
SigNoise Errors/Warnings
Started by xrwright on 1 Dec 2013 10:05 AM. Topic has 1 replies and 548 vi ...

' x/ B3 y* A6 R" {5 M看看是不是有等长参考模型，如果有，再全部重新提取生成一遍。
4 g0 l' }* s0 ^! U: f5 M
* ?) g6 j) ~+ E! I

武紫旭

看下你环境变量里temp及tmp路径在哪里，你把temp及tmp文件清空一下就好了，以前遇到过。

mjchen

还是不行啊   

mjchen

我从来都没有设置过home路径    不知道怎么设置
+ G- K2 \3 Q5 M( o& {

mjchen

求救
) |# k+ K" s( @2 _, T/ \& S9 ~

dzkcool

mjchen 发表于 2015-6-25 10:57
我从来都没有设置过home路径    不知道怎么设置

xp系统的设置方法，供参考

8 M; y  z" p7 m' V& X& N9 y: L. ?

mjchen

哎   

mjchen

我好蛋疼   

kinglangji

确实蛋疼...我感觉是文件的问题....去别人机器试试,如果都有上个文件呗.

mjchen

最后重新装系统，就好了

taotaonuli

我也碰到一模一样的问题了，只要是设置模型就会这样，重装了两次软件都这样，咋办

勒凹特

你的pcbenv文件是否在\Cadence\SPB_Data路劲下，我之前是因为将pcbenv文件夹放到了其他路劲下出现了这个问题。