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装完还是显示052
9 p6 W9 D8 z8 X4 p; n0 o" q) I$ _Fixed CCRs: SPB 17.2 HF053
+ P: v. w) N2 Z9 }2 a03-01-2019
2 N: a' q( T0 J$ @" c========================================================================================================================================================
; D& j" G0 ~9 D3 ?CCRID Product ProductLevel2 Title6 T7 f2 A$ j! t3 l& N' E
========================================================================================================================================================1 Q: f& N8 m2 n- d
2035766 ADW DSN_MIGRATION EDM release 17.2-2016: design migration UI is cut off on right
0 @- s) Y* L( [+ p r& P/ L) I# h2044872 ADW PART_BROWSER Component Browser: Only one PTF file read for multiple PTF files under Part Table all referenced in master.tag
0 f7 t5 K* E6 Q0 P0 B) P- D2025147 ADW TDO-SHAREPOIN Design Management stops responding when a board file is deleted and then checked in with the same name
% W5 t D% p+ U2 m1 u1 [/ J2025201 ADW TDO-SHAREPOIN Getting error message (SPDWSD-20) when logging in to team design0 T% z) p9 {3 }* ^! @
2052046 ADW TDO-SHAREPOIN Joining projects is downloading 0-byte files due to SSL error8 e0 m: p1 L- ?6 k" Z! U) m
2056694 ADW TDO-SHAREPOIN Design Management stops responding on checking in an object with the same name as a previously deleted object
{+ S D0 s% k: x' M6 ]5 I2047512 ALLEGRO_EDITOR 3D_CANVAS Mechanical components do not move when bending in 3D Viewer
4 h/ u, I- H q3 @7 p: P. ~2048086 ALLEGRO_EDITOR 3D_CANVAS Wirebonds are not linked to diepad when component is embedded body down
5 R' t1 t i1 h" O7 i4 [% h8 U: l' }2051277 ALLEGRO_EDITOR 3D_CANVAS 3D View Vias are Offset from Board in Z direction
0 n. p4 z& l% j9 @. {7 s2054327 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas error: All bend operations are disabled due to licensing and/or DLL installation9 h( ?$ `& j" Z0 O7 r4 o
2056547 ALLEGRO_EDITOR 3D_CANVAS 3D model not shown for component with STEP file assigned
l, m) o# _9 c" ]4 `2044980 ALLEGRO_EDITOR ARTWORK 'Import - Artwork': PCB Editor stops responding and no artworks are loaded
: @# a: I" y9 w2061203 ALLEGRO_EDITOR CROSS_SECTION Importing cross-section from single stackup to multiple stackup adding additional layers to the primary zone( m" B) H4 O" v r: Z$ R- V
1826533 ALLEGRO_EDITOR DATABASE Dyn_Thermal_Con_Type not behaving as defined in Symbol Editor after placing on PCB file.) B. M1 w1 V0 o9 w# p
1857282 ALLEGRO_EDITOR DATABASE PCB Editor slow when Manhattan and Path length tooltip enabled in datatip customization
& R* y' `, P9 W- Z2052767 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes on editing padstack
0 Q/ t! B" L# \! _- Z1825692 ALLEGRO_EDITOR DRAFTING Dimension line text moved by Update Symbols
8 a+ v+ J0 c3 I# [' U% z1874814 ALLEGRO_EDITOR DRAFTING 'Connect Lines' does not merge overlapping lines
# @: X4 q' ] u4 r. k1874935 ALLEGRO_EDITOR DRAFTING Angular dimension text has extra spaces added before the degree symbol.
& Y0 r$ J* Y8 j5 w3 N$ z1882597 ALLEGRO_EDITOR DRAFTING 'Trim Segment' should allow trimming for all intersecting segment types0 ]& p: U+ {: j! r
2052315 ALLEGRO_EDITOR DRC_CONSTR DRC (pad-shape) incorrect when both pad and drill are offset from pad origin.
5 ?8 p5 e8 J% R/ X/ m; \' o6 `5 M( i2040603 ALLEGRO_EDITOR EDIT_SHAPE Shape is not updating correctly after the 'move' command+ j# o" P7 x4 I% V9 N& R
2050177 ALLEGRO_EDITOR INTERACTIV Letters need to remain aligned and uniform after performing Boolean ANDNOT operation8 D! m3 }2 I5 f* ]- W4 ?
2052586 ALLEGRO_EDITOR IPC IPC356 showing shorts and disconnects for chip-on-board design, Y3 x3 P* z% @8 z; c3 Y; n9 V1 e" j
2044350 ALLEGRO_EDITOR MANUFACT Cross Section table showing multiple decimal digits for the Tolerance column
+ R; C/ }' S8 D2051150 ALLEGRO_EDITOR NC Counterbore/Countersink holes not being shown in the NC legend table.
: y9 ]. r1 C F' t1 w1 E# s2058199 ALLEGRO_EDITOR NC 'Manufacture - NC - Drill Legend' does not populate the CounterBore/CounterSink row values in the Drill Chart table2 n4 E- Q' L; E* P
2061809 ALLEGRO_EDITOR NC Counter bore NC Legend does not show any data$ `9 U+ f) ^: k2 V+ L' P
2063477 ALLEGRO_EDITOR NC Counter bore NC Legend does not show its value
) l" z$ I$ V r. F3 X9 t4 O+ T2033849 ALLEGRO_EDITOR PLACEMENT PCB Editor stops responding when removing a plane that the Place Replicate command added
+ {1 J4 O" M, A+ j6 M% n- R2037509 ALLEGRO_EDITOR PLACEMENT Move or Rotate or Mirror of a module/group makes PCB Editor to crash with no .SAV file created2 E- f: a: t: U) n. E
2047480 ALLEGRO_EDITOR SCHEM_FTB Importing netlist using Capture-CM flow in PCB Editor is crashing netrev
( {& H7 U! K; u$ K2046276 ALLEGRO_EDITOR SHAPE Add notch is not snapping to the grid point
5 o b# F. Y4 [8 O. u5 x2047572 ALLEGRO_EDITOR SHAPE Voiding elements on static shape do not void adjacent layer keep-outs and PCB Editor stops responding; y$ d4 W5 L) B0 Q# Z
2048483 ALLEGRO_EDITOR SHAPE Shapes not getting updated post backdrill update2 ?3 J* I! h k3 B
2050120 ALLEGRO_EDITOR SHAPE Dynamic fill is flooding over other etch shapes within a symbol.
8 p5 w4 H( W$ c. [, M$ v) m2058017 ALLEGRO_EDITOR SHAPE Shape not voiding correctly when fillets are present
) D% T. N3 G9 i4 [2 U* z8 H2010569 ALLEGRO_EDITOR SKILL Using SKILL to add 'nil' to a DRC object following a 'println' statement crashes PCB Editor in hotfix 048.; Y1 E% v: X. ~4 ]8 {( x: ^
2055055 ALLEGRO_EDITOR SKILL Using SKILL to add a 'nil' property value to a String causes Allegro PCB Editor to crash
" l1 w' T7 c3 W8 J/ g) i3 Z% w3 o1961689 ALLEGRO_EDITOR SYMBOL Pin Numbers are moved from center with Pin Rotation when adding pins to Footprint: I I* o/ O# ^. y( M
2034949 ALLEGRO_EDITOR SYMBOL Angular dimension from DRA not created in PCB
! f" h5 {- L- ]/ ]- P) `; I; \5 @4 j2046242 ALLEGRO_EDITOR UI_GENERAL Searching User Preference Summary results in crash
! O; c% t8 \3 y% P/ ^( r7 e2053496 ALLEGRO_EDITOR UI_GENERAL Confirmation dialog box is behind canvas" z% w' P% U/ u$ h6 ?5 b
2063423 ALLEGRO_EDITOR UI_GENERAL Blocking dialog popped up by axlUIPrompt() goes behind the canvas and is hidden3 E, `( } }$ V) w+ Q
1886781 ALLEGRO_VIEWER OTHER Opening Color192 in Allegro Free Viewer causes it to crash
$ ]' n! F5 O# x1699433 APD EDIT_ETCH Field solver runs when not expected
, M4 b3 V" e7 g# Y4 I. j L, @1937159 APD EDIT_ETCH Routing clines takes long time
2 u' _' Q9 e+ J+ I# W$ C: x/ s; J2050863 APD SHAPE Taper voiding process is different in Within the region/Out of Region' u& @7 ?0 ?1 `2 @; z0 O7 i2 S
2047391 CAPTURE PART_EDITOR Pin type cannot be changed in hotfix 0511 `, ?# M1 S. |+ V' Z% q
2049161 CAP_EDIF IMPORT Fatal error 'cannot determine grid' when converting third-party design to Capture
% w* T+ j7 q3 ^$ R/ W7 s+ H! I/ z7 f2053578 CONCEPT_HDL CONSTRAINT_MG Values specified for custom properties are not preserved
% W: k+ z8 u" W m6 e# L2047583 CONCEPT_HDL COPY_PROJECT Design Entry HDL crashing when trying to open page 52 of copied project' t* Z/ ^3 h1 N p: m; D k
2036239 CONCEPT_HDL CORE When cutting/pasting, multiple error pop-ups appear for the same notification" {# c7 U% [( }: G/ q$ R
2037572 CONCEPT_HDL CORE Warning (SPCOCD-578): Soft VOLTAGE property found is misleading and should be auto resolved when closing CM
! |6 h/ z! \; x6 `2037578 CONCEPT_HDL CORE VOLTAGE property gets deleted after copying it from a non-synchronized source
: a4 S5 z V6 i3 B! u* A) w0 N3 p- P2046958 CONCEPT_HDL CORE Moving block pins from symbol right to left places pin names outside the symbol8 H) b( M, v9 I3 j1 Y
2032480 CONSTRAINT_MGR CONCEPT_HDL Incorrect matchgroups created when working with multiple level nested hierarchical blocks" J# h+ x+ W! G: t0 }
2045274 CONSTRAINT_MGR CONCEPT_HDL Running SKILL script or navigating pages in the hierarchy viewer crashes schematic editor
* K+ N: ?$ I5 Z/ w) w4 M2046765 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout 'dump libraries' crashes when exporting library
! g: `9 T. ~6 u, p# _# {2067970 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout cannot dump libraries, viewlog is empty5 l$ x$ X2 k! i! T- j# p
1981749 SYSTEM_CAPTURE ARCHIVER System Capture: Archiving a design from the Tcl command window results in error
5 ?6 U/ A1 i- H" e1968437 SYSTEM_CAPTURE ASSIGN_SIGNAL Net name pasted in lower-case though UPPERCASE INPUT is enabled
7 E! }9 {% B8 ]6 n( o& l/ _" w1 m1983063 SYSTEM_CAPTURE AUTOSHAPES Auto Shapes are being shown as part of components
8 m& `9 r0 G4 i& @& `2 y/ R1968463 SYSTEM_CAPTURE CANVAS_EDIT System Capture should not allow illegal characters to be entered for net names
# D. E; d2 n4 ?( A5 A% A2006593 SYSTEM_CAPTURE CANVAS_EDIT Asterisk in a search string is not treated as a wildcard character% W. N" L8 Y: O. Q7 I( I
1721863 SYSTEM_CAPTURE CONNECTIVITY_ Net Names move to random locations when the components are moved around the canvas
& L, A% g7 U, Q# q& O6 g% e3 S1960130 SYSTEM_CAPTURE CONNECTIVITY_ Disconnected nets when using the mirror option
/ j4 R$ i: R9 P1985029 SYSTEM_CAPTURE EDIT_OPERATIO Net aliases do not drag with circuit, they appear to move after the circuit is dropped
' h3 B( I. M. f8 v1895142 SYSTEM_CAPTURE EXPORT_PCB System Capture reports incorrect unsaved changes when closed after running export physical7 W# s0 F/ a. R# ]- P1 A8 ?/ A
1628596 SYSTEM_CAPTURE FIND_REPLACE Alias issue in Find: Results do not show the resolved physical net names7 U- G6 A; S, V& P$ W
1988297 SYSTEM_CAPTURE FIND_REPLACE Edit > Find and Replace does not replace a net with an existing net on the canvas
o3 b6 R; u9 r- _3 Z& G. f1843885 SYSTEM_CAPTURE FORMAT_OBJECT Renaming a net causes it to lose custom color assignment( M0 N, h$ Z: ^% U. L
1969308 SYSTEM_CAPTURE FORMAT_OBJECT System Capture: Clicking arrows to increase/decrease font size does not work correctly when clicked fast# g/ _: z9 {2 U* H' K T& m
1990060 SYSTEM_CAPTURE FORMAT_OBJECT Bold, italics, and underline formats not visually shown on all selected objects concurrently3 O/ ^+ q( a5 G: W# B
1993208 SYSTEM_CAPTURE FORMAT_OBJECT Setting font prior to placing text does not work, pop-up does not work, and bucket results in scrolling page( K6 w5 t* G. g5 O) f, e9 Q
1981775 SYSTEM_CAPTURE IMPORT_PCB Import Physical takes a long time on some designs to launch the UI
. z$ ^- Y/ Z/ T0 t( b) J+ \5 L1982320 SYSTEM_CAPTURE IMPORT_PCB In the B2F flow none of the *view files are created
3 J2 y" N/ k+ Y- ^4 T2010996 SYSTEM_CAPTURE INSERT_PICTUR Image in title block is at a wrong location in design: correctly placed in library
6 j' A, r' \% D2 ]1967614 SYSTEM_CAPTURE MISCELLANEOUS Dragging a circuit with net aliases does not move the net aliases with it' j& r7 _' u# ]9 c8 l7 w$ j$ V4 H
1980999 SYSTEM_CAPTURE NEW_PROJECT System Capture stops working with message regarding Part Manager initialization for a design based on DE-HDL
; J7 _) t9 G9 h* [1973437 SYSTEM_CAPTURE OPEN_CLOSE_PR Opening a design crashes System Capture
* N8 Z% v( n. D7 o# c9 [7 {2 w8 ^1986566 SYSTEM_CAPTURE OPEN_CLOSE_PR System Captures stops responding on opening project, cleaning project displays project already open message
0 h( A) n5 a/ H# t9 [# v$ n! Z4 W1993093 SYSTEM_CAPTURE OPEN_CLOSE_PR Add option to override the lock file similar to Allegro PCB Editor! K- ^" D; z& P
2042360 SYSTEM_CAPTURE OPEN_CLOSE_PR System Capture will not open nor gives error message when previous lock file present inside the logic folder% J( q, E1 w. O
1992247 SYSTEM_CAPTURE PART_MANAGER Part Manager displays message for undo and redo stack even after specifying not to show message
3 H9 `. W q a" u; k2048000 SYSTEM_CAPTURE PERFORMANCE Performance issue when instantiating and moving a component
) S0 g7 N: m" x! X1892120 SYSTEM_CAPTURE PROPERTY_EDIT Some parts missing reference designators and some have two properties, RefDes and REFDES
2 ]* r* `' _* O4 {1970009 SYSTEM_CAPTURE PROPERTY_EDIT System Capture: Right-clicking RefDes with conflict in 'Edit Properties' shows the Hyperlink option
2 T' x2 Q! l/ S# e' j2042707 SYSTEM_CAPTURE VARIANT_MANAG variant.lst file under 'physical' folder not updated when closing Variant Editor- I, ]1 l8 ~, `. I! e- Q
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发表于 2019-4-6 21:51
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