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Table of Contents
, s& E# H9 U: e9 l% ~Audience ............................................................................................. iii
, U# d/ ]) j# X V9 _Related Documents ............................................................................. iii
' \1 s& ?8 |9 V- |/ FConventions ........................................................................................ iv& C( O' Q( [2 m. ?8 c" u
Obtaining Customer Support .............................................................. vi I. }/ k' @+ e. U- M
Other Sources of Information ............................................................ vii7 \, E5 p9 E3 E/ b* {
Revision History ............................................................................... viii
2 x9 u; p" @$ `Chapter 1 - Overview of Models ..................................................................... 1-1
/ q, Q" z; v T) YUsing Models to Define Netlist Elements .............................................. 1-2
' G% B( X6 \8 x) _7 H! P' QSupported Models for Specific Simulators ....................................... 1-23 j( S4 i7 `; q8 W! K
Selecting Models .............................................................................. 1-3. T- |' v3 }( Z1 ?: ^% {
Example ............................................................................................ 1-3! _0 o$ s J5 K: y7 C2 W
Chapter 2 - Using Passive Device Models....................................................... 2-1' |' ^+ P# A4 S- T
Resistor Device Model and Equations .................................................... 2-26 D) `) ^* e# E' z' Q/ }
Wire RC Model ................................................................................. 2-2$ d% E( p* e* G3 F$ }# n
Resistor Model Equations ................................................................. 2-5
& i1 M% ] Y9 h" M+ x, G+ LCapacitor Device Model and Equations ............................................... 2-10
9 n r4 d4 p5 g# R$ qCapacitance Model ......................................................................... 2-10
; @0 a' b9 s6 F9 oCapacitor Device Equations ........................................................... 2-11" Y; }7 |! G0 _8 \8 D
Inductor Device Model and Equations ................................................. 2-14 _9 J: U; q9 F, i3 l
Inductor Core Models ..................................................................... 2-15
7 z1 j; R7 U0 Z4 a9 B1 VMagnetic Core Element Outputs .................................................... 2-18+ u1 a& _7 `: |: |) p- i! G
Inductor Device Equations ............................................................. 2-19
9 h. n# N& t& I5 G. F8 ~* c+ `Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21
" R6 e5 k, g& h# zPower Sources ....................................................................................... 2-30
, [) Y) f) V, h6 `Independent Sources ....................................................................... 2-30$ _4 v, W& M4 w& y& {# t
Controlled Sources .......................................................................... 2-330 o9 y W( Z. V* H8 M
Chapter 3 - Using Diodes ................................................................................. 3-1) U3 O$ E5 L% ? s. L! e7 Q. H6 H$ C0 F
Diode Types ............................................................................................ 3-24 P" S. x( P! b; U
Using Diode Model Statements .............................................................. 3-3* _6 k" w* t! D1 ]
Setting Control Options .................................................................... 3-3
, {! V* @/ `; d. j$ @* N7 JSpecifying Junction Diode Models ......................................................... 3-5
( U* p$ O4 P2 \2 k A6 p2 xUsing the Junction Model Statement ................................................ 3-63 q) k- e* I$ }% x6 a
Using Junction Model Parameters .................................................... 3-7
/ t0 g$ ]% q8 N2 E+ e- `6 LGeometric Scaling for Diode Models ............................................. 3-13
8 ~8 J9 S, m* t& x9 ]0 [. W) C- sDefining Diode Models ................................................................... 3-15
4 K) L/ F2 Q- y4 f. Q! ADetermining Temperature Effects on Junction Diodes ................... 3-18
' h7 Z" I) O: L) s9 L! GUsing Junction Diode Equations ........................................................... 3-210 g) W4 J, x5 K9 b
Using Junction DC Equations ......................................................... 3-22; [. n0 D0 S- ]; {8 p
Using Diode Capacitance Equations ............................................... 3-25
- V! ~, }' q: F& V% iUsing Noise Equations .................................................................... 3-27
+ I5 W- s' S% X1 |" D1 RTemperature Compensation Equations ........................................... 3-28
- ?2 I" F$ x* t' L" g9 ]. A# \$ sUsing the Junction Cap Model .............................................................. 3-32
4 |7 F4 i1 S) @9 p2 d$ ZSetting Juncap Model Parameters ................................................... 3-33
, A+ R" n( g, k. e- OTheory ............................................................................................. 3-335 j& L1 ~/ M$ X5 f
JUNCAP Model Equations ............................................................. 3-381 V- T( `9 g7 Q
Using the Fowler-Nordheim Diode ...................................................... 3-46; S0 g, J! `) V: k% g+ ^9 {
Converting National Semiconductor Models ........................................ 3-48
) L$ O4 u# U5 X2 a5 Y2 p# u7 \" RChapter 4 - Using BJT Models ........................................................................ 4-1! [; H, J5 Q ]/ R1 _
Using BJT Models .................................................................................. 4-2! `5 H( G0 p0 w0 z4 e# O
Selecting Models ............................................................................... 4-2
$ ^/ Q# \8 d: V7 t+ VBJT Model Statement ............................................................................. 4-4
# @! E) w4 B- S6 a, I) nUsing BJT Basic Model Parameters ................................................. 4-50 o9 r9 t0 G3 M% K* Y9 h
Handling BJT Model Temperature Effects ..................................... 4-15
p% Y' O$ m& TBJT Device Equivalent Circuits ............................................................ 4-214 H( F% X, O5 S, z4 }% }& x/ M G
Scaling ............................................................................................. 4-21
: @* ]- X6 |; d# l! V! {Understanding the BJT Current Convention ................................... 4-21+ m0 j2 |% A- h
Using BJT Equivalent Circuits ....................................................... 4-22
2 u6 H* a/ m! `8 ^3 T% T2 X2 i" RBJT Model Equations (NPN and PNP) ................................................. 4-30
5 a& Z8 G# y/ Z) s) D( z' yUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30; E/ v! t+ Q% T
Using DC Model Equations ............................................................ 4-32* k5 g; F$ n: U0 L ?7 U
Using Substrate Current Equations ................................................. 4-33$ l$ t4 E% I# Q2 s6 S" D9 ` {
Using Base Charge Equations ......................................................... 4-340 `' C# ?' e8 V- U9 I. |7 N
Using Variable Base Resistance Equations .................................... 4-35
3 @! B* I, Z& @& R$ SUsing BJT Capacitance Equations ........................................................ 4-36. }; i# T1 ^, N8 V& A
Using Base-Emitter Capacitance Equations ................................... 4-36
1 v6 d; i# x* R# |2 V' SDetermining Base Collector Capacitance ....................................... 4-388 U1 t6 q% R, q3 Y
Using Substrate Capacitance ........................................................... 4-40 A$ f% t, }/ T
Defining BJT Noise Equations ............................................................. 4-427 X6 w2 }9 K, f0 \ d4 C4 q- ]
BJT Temperature Compensation Equations ......................................... 4-44 z; T2 Y% g: U! t7 m4 u8 y
Using Energy Gap Temperature Equations .................................... 4-44! {3 j1 Q# H# B( R" b
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44 G& b0 P+ N3 V5 Y" B
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46. a$ O) i3 L" J: h$ `
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
) l5 u& Q7 v9 F% [, D% VUsing Capacitance Temperature Equations .................................... 4-49
9 r9 A# `9 Z) ^& V& gParasitic Resistor Temperature Equations ...................................... 4-51
/ F7 r3 a1 O q( M( C( c# XUsing BJT Level=2 Temperature Equations .................................. 4-52
- g$ y: E9 r, a$ B% WBJT Quasi-Saturation Model ................................................................ 4-53
6 W( ^6 A; o0 Y# x8 sUsing Epitaxial Current Source Iepi ............................................... 4-55/ O( z4 s, @' l2 t* }' N
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55
3 x& w7 X" i. G8 ]Converting National Semiconductor Models ........................................ 4-58$ u: _; I# }: a* P& L8 L }% s
VBIC Bipolar Transistor Model ........................................................... 4-60/ { F( X0 P% g7 n+ X: ^
Understanding the History of VBIC ............................................... 4-60
9 m+ C/ O; }3 `. x" R5 HVBIC Parameters ............................................................................ 4-61
; x( h [( T2 b( J* x. F+ j" e; l1 lNoise Analysis ................................................................................ 4-62( I& X, p; W8 x1 P. m
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71 F7 W0 H) p6 R) F
Level 6 Element Syntax .................................................................. 4-71* ^+ c* l5 r7 f. z) O
Level 6 Model Parameters .............................................................. 4-729 i' D6 {$ D7 ~' |
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
; [5 `8 @4 v# t3 p% j NNotes ............................................................................................... 4-79
, ~0 F) m* X6 v3 |Level 6 Model Parameters (504) ..................................................... 4-80
0 X6 p7 o6 i, l* S; ~$ LLevel 8 HiCUM Model ......................................................................... 4-94/ Z% B6 `, u- r
What is the HiCUM Model? ........................................................... 4-94
: L4 S" q E. ~! K: B3 N. ~$ mHiCUM Model Advantages ............................................................ 4-94
; u% Y4 ?& r, @+ t! SAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-96. v2 f; H: L4 y7 ~& Q" V
Model Implementation .................................................................... 4-96
2 h3 r2 t5 s& K, Z# L" T' ?Internal Transistors ......................................................................... 4-97
6 N$ n* t6 a6 n5 {: kLevel 9 VBIC99 Model ...................................................................... 4-110
% F7 `+ B1 m# |Element Syntax of BJT Level 9 .................................................... 4-110
C% W6 X! u' K: jEffects of VBIC99 ........................................................................ 4-112/ g: [# a& W0 m) b1 F- m
Model Implementation .................................................................. 4-112
- y2 I. w; q) KExample ........................................................................................ 4-119
v4 Z" g+ n. |1 a- EVBIC99 Notes for HSPICE Users ................................................ 4-123! t6 G' D; x7 Y. m$ j1 a+ u& r
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
# ~1 m0 u. P0 `: n! n3 C$ T) xModel Parameters ......................................................................... 4-124
9 L$ ^1 D0 i+ Q uEquivalent Circuits ........................................................................ 4-129
, c) [# N2 K% v& KDC Operating Point Output .......................................................... 4-131: _& R+ B. x+ P/ X1 h! x; D
Model Equations ........................................................................... 4-132
. ^, ?4 G) l% e1 {+ Q/ iTemperature Dependence of the Parameters ................................ 4-142# A7 J0 L7 N9 m+ M$ T
Level 11 UCSD HBT Model .............................................................. 4-1466 T# w; B2 M% g7 W' H% d& c+ W1 d. w
Using the UCSD HBT Model ....................................................... 4-146
6 }/ ~) f4 H% [- ^Description of Parameters ............................................................. 4-1479 ?) \* h" z- _. k% \6 i' [) ^
Model Equations ........................................................................... 4-152
6 G9 y$ Q. Y6 W" F2 n7 i8 wEquivalent Circuit ......................................................................... 4-163- J$ P x3 h+ E5 V u9 `9 e
Example Avant! True-Hspice Model Statement ........................... 4-165
% y* `9 [, W0 ~" z* s* SChapter 5 - Using JFET and MESFET Models............................................. 5-1# ]& _+ A/ T5 i* C
Understanding JFETs .............................................................................. 5-2
- z1 l# r' Z9 ?/ M: VSpecifying a Model ................................................................................. 5-33 @1 d; Z* I& ?# @; P8 y
Understanding the Capacitor Model ....................................................... 5-50 v9 j E$ i9 I% n) a4 Z9 z
Model Applications ........................................................................... 5-5
: S$ `9 z7 T- S8 j% |7 _5 aControl Options ................................................................................. 5-6
/ v, o- e( ]$ ^5 A& Z5 S$ H- V% jJFET and MESFET Equivalent Circuits ................................................. 5-7
( _3 k2 @) M x6 QScaling ............................................................................................... 5-7
1 t( U6 \& D" l) J; |" a' WUnderstanding JFET Current Convention ........................................ 5-7
& s4 g* ? W4 l) U. sJFET Equivalent Circuits .................................................................. 5-8
9 F4 x: \! ^9 R% p i6 L7 @: @JFET and MESFET Model Statements ................................................. 5-132 A5 l# m1 g/ v4 L7 \ L m
JFET and MESFET Model Parameters ........................................... 5-136 l: P; q/ Q3 H8 m
Gate Diode DC Parameters ............................................................. 5-15
9 M) t# B* P% Y+ t) eJFET and MESFET Capacitances ................................................... 5-257 I) h6 G0 I) `% y9 @' \
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29$ f& n: E; h9 N% I* J6 D
JFET and MESFET DC Equations ................................................. 5-312 E1 p# E+ A x: u
JFET and MESFET Noise Models ....................................................... 5-35
; v; [$ z$ [2 XNoise Parameters ........................................................................... 5-35
" S1 |8 d; J9 f- r& I/ Q3 b5 PNoise Equations .............................................................................. 5-35
& M1 U8 V4 \4 n o* Q& ~: [Noise Summary Printout Definitions .............................................. 5-36
' s' r2 Q- u/ B, v* RJFET and MESFET Temperature Equations ........................................ 5-37
8 [ a7 t& k6 q- R( K% \$ a. R* NTemperature Compensation Equations ........................................... 5-40/ X: f2 }4 p9 R+ J7 {& ]# R
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发表于 2008-3-25 17:14
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thanks a lot ,very good materials